Pull requests: NationalSecurityAgency/ghidra

223 Open 1,021 Closed

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Pull requests list

AArch32: vsel "gt" condition missing NG & OV flag equality check Feature: Processor/ARM Status: Triage Information is being gathered

#6531 opened May 17, 2024 by Sleigh-InSPECtor Loading…

AArch32: sha1su1.32 had destructive left shifts on 32-bit values before zext Feature: Processor/ARM Status: Triage Information is being gathered

#6530 opened May 17, 2024 by Sleigh-InSPECtor Loading…

AArch32: sha1su0.32 had a destructive 64-bit left shift on a 64-bit value before zext Feature: Processor/ARM Status: Triage Information is being gathered

#6529 opened May 17, 2024 by Sleigh-InSPECtor Loading…

AArch32: ldaexd addr src register aliased as first dest register causing second word load at the value of first load Feature: Processor/ARM Status: Triage Information is being gathered

#6526 opened May 16, 2024 by Sleigh-InSPECtor Loading…

1

x86: opsize override prefix not handled for 16-bit MOVSX/MOVZX Feature: Processor/x86 Status: Triage Information is being gathered

#6525 opened May 16, 2024 by Sleigh-InSPECtor Loading…

x86: Fix aliasing issues with SIMD instructions Feature: Processor/x86 Status: Triage Information is being gathered

#6524 opened May 16, 2024 by Sleigh-InSPECtor Loading…

x86: Fix evaluation order of CMOV Feature: Processor/x86 Status: Triage Information is being gathered

#6523 opened May 16, 2024 by Sleigh-InSPECtor Loading…

x86: Use longMode context bit instead of bit64 in more places Feature: Processor/x86 Status: Triage Information is being gathered

#6522 opened May 16, 2024 by Sleigh-InSPECtor Loading…

x86: Sign-extend 32-bit immediates for 64-bit SBB instructions Feature: Processor/x86 Status: Triage Information is being gathered

#6521 opened May 16, 2024 by Sleigh-InSPECtor Loading…

x86: Fix overlap issue with INCSS/RDSSP Feature: Processor/x86 Status: Triage Information is being gathered

#6520 opened May 16, 2024 by Sleigh-InSPECtor Loading…

AArch64: Separate fmls vector subtraction into vector elements Feature: Processor/AARCH64 Status: Triage Information is being gathered

#6519 opened May 16, 2024 by Sleigh-InSPECtor Loading…

RISCV: cleaned up fmin/fmax Feature: Processor/RISC-V Status: Triage Information is being gathered

#6518 opened May 16, 2024 by Sleigh-InSPECtor Loading…

RISCV: Implemented fclass Feature: Processor/RISC-V Status: Triage Information is being gathered

#6517 opened May 16, 2024 by Sleigh-InSPECtor Loading…

AArch64: Fix output datatype in frint instructions Feature: Processor/AARCH64 Status: Triage Information is being gathered

#6516 opened May 16, 2024 by Sleigh-InSPECtor Loading…

x86: Fix issue with PACKUSWB when the value to convert is exactly 0x00ff Feature: Processor/x86 Status: Triage Information is being gathered

#6514 opened May 15, 2024 by Sleigh-InSPECtor Loading…

x86: Add missing float-to-integer cast operation to CVTSD2SI/CVTSD2SI Feature: Processor/x86 Status: Triage Information is being gathered

#6513 opened May 15, 2024 by Sleigh-InSPECtor Loading…

x86: Fix issue with comparison of bits 96 to 128 in CMPPS instruction Feature: Processor/x86 Status: Triage Information is being gathered

#6512 opened May 15, 2024 by Sleigh-InSPECtor Loading…

x86: Ensure that PEXTR instructions with memory destinations write to memory Feature: Processor/x86 Status: Triage Information is being gathered

#6511 opened May 15, 2024 by Sleigh-InSPECtor Loading…

x86: Make redundant encoding of Grp1 instructions (0x82 alias) is invalid in long mode Feature: Processor/x86 Status: Triage Information is being gathered

#6510 opened May 15, 2024 by Sleigh-InSPECtor Loading…

RISCV: add rm to fcvt.d. Feature: Processor/RISC-V Status: Triage Information is being gathered Type: Bug Something isn't working

#6509 opened May 15, 2024 by Sleigh-InSPECtor Loading…

RISCV: handle divide by 0 Feature: Processor/RISC-V Status: Triage Information is being gathered Type: Bug Something isn't working

#6508 opened May 15, 2024 by Sleigh-InSPECtor Loading…

RISCV: CSR fixes Feature: Processor/RISC-V Status: Triage Information is being gathered Type: Bug Something isn't working

#6507 opened May 15, 2024 by Sleigh-InSPECtor Loading…

RISCV: Compressed Disasembly Feature: Processor/RISC-V Status: Triage Information is being gathered Type: Bug Something isn't working

#6500 opened May 13, 2024 by Sleigh-InSPECtor Loading…

RISCV: remove used of rdW and sign extend in fcvt/fmv Feature: Processor/RISC-V Status: Triage Information is being gathered Type: Bug Something isn't working

#6492 opened May 9, 2024 by Sleigh-InSPECtor Loading…

7

RISCV: clear lsb in compressed jump instructions Feature: Processor/RISC-V Status: Triage Information is being gathered

#6483 opened May 6, 2024 by Sleigh-InSPECtor Loading…