RISCV: add rm to fcvt.d. #6509
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RISCV: add rm to fcvt.d. #6509
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GhidorahRex
added
Type: Bug
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As part of a research project testing the accuracy of the sleigh specifications compared to real hardware, we observed a difference in the disassembly of the
fcvt.d.[s/w/wu]instructions. Bits 12-14 of the instruction represent the rounding mode to use and can take a value from 0-7. The current behaviour restricts this field to 0 in the disassembly of the instruction. This causes anyfcvt.d.[s/w/wu]instruction which has a rounding mode other than 'round to nearest' to failed to disassemble.