Non-ISA specifications do not add new instructions, create or change opcodes, or in any way modify the RISC-V ISA. They do help us to develop an ecosystem around the ISA Specifications.
Things you'll find here include:
If you don't find what you're looking for here, try one of our other GitHub organizations:
Documentation for the RISC-V Supervisor Binary Interface
This TG will define AP-TEE-IO ABI extensions to provide Confidential VM-assigned devices with secure direct access to confidential memory as well as MMIO, removing the dependence on para-virtualized I/O.
This repo holds the work area and revisions of a QoS register interface for caches and memory controllers specification. The QoS register interface is a non-ISA specification that supports configuring resource allocations to applications and monitoring the resource usage by applications.
RISC-V Platform Management Interface Specification. OS-agnostic messaging interface for system management and control
The Boot and Runtime Services (BRS) specification provides the software requirements for system vendors and Operating System Vendors (OSVs) to interoperate with one another by providing expectations for the Operating System (OS) to utilize in acts of device discovery, system management, and other rich operations provided in this specification.
Documenting the expected behaviour and supported command-line switches for GNU and LLVM based RISC-V toolchains
