{"payload":{"pageCount":2,"repositories":[{"type":"Public","name":"rvv-intrinsic-doc","owner":"riscv-non-isa","isFork":false,"description":"","allTopics":[],"primaryLanguage":{"name":"C","color":"#555555"},"pullRequestCount":5,"issueCount":16,"starsCount":266,"forksCount":84,"license":"BSD 3-Clause \"New\" or \"Revised\" License","participation":[2,0,0,0,4,3,3,16,18,0,3,2,6,17,13,0,2,4,8,7,28,5,1,0,0,1,0,3,1,0,0,0,0,0,2,0,0,0,0,0,1,0,0,0,2,1,9,2,7,0,0,21],"lastUpdated":{"hasBeenPushedTo":true,"timestamp":"2024-06-11T20:35:54.055Z"}},{"type":"Public","name":"riscv-arch-test","owner":"riscv-non-isa","isFork":false,"description":"","allTopics":[],"primaryLanguage":{"name":"Assembly","color":"#6E4C13"},"pullRequestCount":29,"issueCount":54,"starsCount":472,"forksCount":183,"license":"Apache License 2.0","participation":[9,6,1,0,1,1,6,5,2,4,0,1,0,2,12,6,3,6,0,8,2,3,11,0,4,0,2,6,4,3,1,2,0,2,1,0,0,0,0,0,7,1,2,4,4,11,15,1,6,3,1,1],"lastUpdated":{"hasBeenPushedTo":true,"timestamp":"2024-06-11T19:50:51.082Z"}},{"type":"Public","name":"riscv-iommu","owner":"riscv-non-isa","isFork":false,"description":"RISC-V IOMMU Specification","allTopics":[],"primaryLanguage":{"name":"C","color":"#555555"},"pullRequestCount":1,"issueCount":1,"starsCount":68,"forksCount":14,"license":"Creative Commons Attribution 4.0 International","participation":[3,0,0,6,0,5,0,2,0,0,2,0,2,0,0,1,0,2,0,2,3,5,0,0,0,0,0,0,3,0,0,0,0,0,0,0,0,1,1,2,0,0,0,4,7,2,6,5,2,0,7,12],"lastUpdated":{"hasBeenPushedTo":true,"timestamp":"2024-06-11T19:25:03.203Z"}},{"type":"Public","name":"riscv-rpmi","owner":"riscv-non-isa","isFork":false,"description":"RISC-V Platform Management Interface Specification. OS-agnostic messaging interface for system management and control","allTopics":["platform","messaging","standards","interoperability","riscv","rpmi","riscv-rpmi"],"primaryLanguage":{"name":"Makefile","color":"#427819"},"pullRequestCount":1,"issueCount":14,"starsCount":2,"forksCount":4,"license":"Creative Commons Attribution 4.0 International","participation":null,"lastUpdated":{"hasBeenPushedTo":true,"timestamp":"2024-06-11T09:58:43.537Z"}},{"type":"Public","name":"riscv-rqsc","owner":"riscv-non-isa","isFork":false,"description":"Specification Documentation Repository for the RQSC RISC-V Quality of Services Controllers Table definition","allTopics":[],"primaryLanguage":{"name":"Makefile","color":"#427819"},"pullRequestCount":1,"issueCount":0,"starsCount":0,"forksCount":0,"license":"Creative Commons Attribution 4.0 International","participation":[0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,2,0],"lastUpdated":{"hasBeenPushedTo":true,"timestamp":"2024-06-10T21:16:05.884Z"}},{"type":"Public","name":"riscv-c-api-doc","owner":"riscv-non-isa","isFork":false,"description":"Documentation of the RISC-V C API","allTopics":[],"primaryLanguage":null,"pullRequestCount":11,"issueCount":16,"starsCount":61,"forksCount":34,"license":"Creative Commons Attribution 4.0 International","participation":[0,0,1,1,1,5,7,1,0,2,0,1,0,2,0,0,0,4,1,4,1,0,2,0,5,2,2,0,1,0,0,2,0,4,0,0,0,0,0,0,0,0,0,2,0,0,0,0,0,0,0,1],"lastUpdated":{"hasBeenPushedTo":true,"timestamp":"2024-06-10T18:25:45.804Z"}},{"type":"Public","name":"riscv-brs","owner":"riscv-non-isa","isFork":false,"description":"The Boot and Runtime Services (BRS) specification provides the software requirements for system vendors and Operating System Vendors (OSVs) to interoperate with one another by providing expectations for the Operating System (OS) to utilize in acts of device discovery, system management, and other rich operations provided in this specification. ","allTopics":["platform","firmware","standards","interoperability","uefi","devicetree","acpi","smbios","risc-v","brs-i","brs-b","ebbr"],"primaryLanguage":{"name":"TeX","color":"#3D6117"},"pullRequestCount":1,"issueCount":13,"starsCount":30,"forksCount":12,"license":"Creative Commons Attribution 4.0 International","participation":[1,0,0,1,7,2,0,12,0,10,9,0,8,1,0,2,1,0,4,1,0,0,0,8,4,0,0,0,0,0,0,7,1,0,6,6,0,0,0,0,0,0,12,19,6,0,0,0,5,0,3,1],"lastUpdated":{"hasBeenPushedTo":true,"timestamp":"2024-06-10T17:29:59.416Z"}},{"type":"Public","name":"riscv-external-debug-security","owner":"riscv-non-isa","isFork":false,"description":"The RISC-V External Debug Security Specification","allTopics":[],"primaryLanguage":{"name":"Makefile","color":"#427819"},"pullRequestCount":0,"issueCount":4,"starsCount":9,"forksCount":2,"license":"Creative Commons Attribution 4.0 International","participation":null,"lastUpdated":{"hasBeenPushedTo":true,"timestamp":"2024-06-08T08:26:45.173Z"}},{"type":"Public","name":"riscv-sbi-doc","owner":"riscv-non-isa","isFork":false,"description":"Documentation for the RISC-V Supervisor Binary Interface","allTopics":[],"primaryLanguage":{"name":"Makefile","color":"#427819"},"pullRequestCount":3,"issueCount":12,"starsCount":325,"forksCount":85,"license":"Creative Commons Attribution 4.0 International","participation":null,"lastUpdated":{"hasBeenPushedTo":true,"timestamp":"2024-06-08T07:11:21.832Z"}},{"type":"Public","name":"tg-nexus-trace","owner":"riscv-non-isa","isFork":false,"description":"RISC-V Nexus Trace TG documentation and reference code","allTopics":["nexus","trace","risc-v"],"primaryLanguage":{"name":"C","color":"#555555"},"pullRequestCount":0,"issueCount":4,"starsCount":34,"forksCount":29,"license":"Creative Commons Attribution 4.0 International","participation":[0,4,0,7,0,0,0,0,0,0,0,0,14,0,0,0,0,0,0,0,1,0,0,2,1,2,5,0,0,0,0,2,0,0,0,0,11,13,24,0,3,21,0,0,0,0,14,1,1,7,0,9],"lastUpdated":{"hasBeenPushedTo":true,"timestamp":"2024-06-07T00:06:25.648Z"}},{"type":"Public","name":"iopmp-spec","owner":"riscv-non-isa","isFork":false,"description":"This repository contains the specification source for the RISC-V IOPMP Specification. This document proposes a Physical Memory Protection Unit of Input/Output devices, IOPMP for short, to regulate the accesses issued from the bus masters.","allTopics":[],"primaryLanguage":{"name":"Makefile","color":"#427819"},"pullRequestCount":0,"issueCount":4,"starsCount":4,"forksCount":0,"license":"Creative Commons Attribution 4.0 International","participation":null,"lastUpdated":{"hasBeenPushedTo":true,"timestamp":"2024-06-06T09:37:09.070Z"}},{"type":"Public","name":"riscv-security-model","owner":"riscv-non-isa","isFork":false,"description":"RISC-V Security Model","allTopics":[],"primaryLanguage":{"name":"Makefile","color":"#427819"},"pullRequestCount":2,"issueCount":0,"starsCount":27,"forksCount":13,"license":"Creative Commons Attribution 4.0 International","participation":null,"lastUpdated":{"hasBeenPushedTo":true,"timestamp":"2024-06-04T14:32:34.567Z"}},{"type":"Public","name":"server-soc","owner":"riscv-non-isa","isFork":false,"description":"The repo holds the draft non-ISA Server SoC specification being developed by the Server SoC specification TG and to release intermediate releases of the specification on milestones. Further downstream this repo will be used to release specifications for public review.","allTopics":[],"primaryLanguage":{"name":"TeX","color":"#3D6117"},"pullRequestCount":0,"issueCount":0,"starsCount":16,"forksCount":6,"license":"Creative Commons Attribution 4.0 International","participation":null,"lastUpdated":{"hasBeenPushedTo":true,"timestamp":"2024-06-04T13:35:17.559Z"}},{"type":"Public","name":"riscv-server-platform","owner":"riscv-non-isa","isFork":false,"description":"The RISC-V Server Platform specification defines a standardized set of hardware and sofware capabilities, that portable system software, such as operating systems and hypervisors, can rely on being present in a RISC-V server platform.","allTopics":["platform","server","os","standards","interoperability","uefi","hypervisors","acpi","risc-v","brs-i","server-platform","server-soc"],"primaryLanguage":{"name":"Makefile","color":"#427819"},"pullRequestCount":0,"issueCount":5,"starsCount":6,"forksCount":1,"license":"Creative Commons Attribution 4.0 International","participation":null,"lastUpdated":{"hasBeenPushedTo":true,"timestamp":"2024-06-03T21:38:43.592Z"}},{"type":"Public","name":"riscv-toolchain-conventions","owner":"riscv-non-isa","isFork":false,"description":"Documenting the expected behaviour and supported command-line switches for GNU and LLVM based RISC-V toolchains","allTopics":[],"primaryLanguage":null,"pullRequestCount":8,"issueCount":14,"starsCount":135,"forksCount":29,"license":"Creative Commons Attribution 4.0 International","participation":null,"lastUpdated":{"hasBeenPushedTo":true,"timestamp":"2024-05-30T08:51:19.575Z"}},{"type":"Public","name":"riscv-ras-eri","owner":"riscv-non-isa","isFork":false,"description":"The (RAS Error-record Register Interface) RERI provides a specification to augment RAS features in RISC-V SOC hardware to standardize reporting and logging of errors by means of a memory-mapped register interface to enable error detection, provide the facility to log the detected errors (including their severity, nature, and location), and confiā€¦","allTopics":[],"primaryLanguage":{"name":"TeX","color":"#3D6117"},"pullRequestCount":0,"issueCount":0,"starsCount":3,"forksCount":4,"license":"Creative Commons Attribution 4.0 International","participation":null,"lastUpdated":{"hasBeenPushedTo":true,"timestamp":"2024-05-24T21:35:14.547Z"}},{"type":"Public","name":"riscv-cbqri","owner":"riscv-non-isa","isFork":false,"description":"This repo holds the work area and revisions of a QoS register interface for caches and memory controllers specification. The QoS register interface is a non-ISA specification that supports configuring resource allocations to applications and monitoring the resource usage by applications.","allTopics":[],"primaryLanguage":{"name":"Makefile","color":"#427819"},"pullRequestCount":0,"issueCount":0,"starsCount":2,"forksCount":6,"license":"Creative Commons Attribution 4.0 International","participation":null,"lastUpdated":{"hasBeenPushedTo":true,"timestamp":"2024-05-23T15:22:13.580Z"}},{"type":"Public","name":"riscv-acpi-rimt","owner":"riscv-non-isa","isFork":false,"description":"RISC-V ACPI I/O Mapping Table Specification","allTopics":[],"primaryLanguage":{"name":"Makefile","color":"#427819"},"pullRequestCount":0,"issueCount":0,"starsCount":2,"forksCount":1,"license":"Creative Commons Attribution 4.0 International","participation":null,"lastUpdated":{"hasBeenPushedTo":true,"timestamp":"2024-05-22T17:18:55.217Z"}},{"type":"Public","name":"riscv-elf-psabi-doc","owner":"riscv-non-isa","isFork":false,"description":"A RISC-V ELF psABI Document","allTopics":[],"primaryLanguage":{"name":"Python","color":"#3572A5"},"pullRequestCount":27,"issueCount":55,"starsCount":652,"forksCount":155,"license":"Creative Commons Attribution 4.0 International","participation":null,"lastUpdated":{"hasBeenPushedTo":true,"timestamp":"2024-05-22T08:48:03.398Z"}},{"type":"Public","name":"riscv-ap-tee-io","owner":"riscv-non-isa","isFork":false,"description":"This TG will define AP-TEE-IO ABI extensions to provide Confidential VM-assigned devices with secure direct access to confidential memory as well as MMIO, removing the dependence on para-virtualized I/O.","allTopics":["tee-io"],"primaryLanguage":{"name":"Makefile","color":"#427819"},"pullRequestCount":0,"issueCount":7,"starsCount":8,"forksCount":4,"license":"Creative Commons Attribution 4.0 International","participation":null,"lastUpdated":{"hasBeenPushedTo":true,"timestamp":"2024-05-19T10:01:02.213Z"}},{"type":"Public","name":"riscv-asm-manual","owner":"riscv-non-isa","isFork":false,"description":"RISC-V Assembly Programmer's Manual","allTopics":[],"primaryLanguage":null,"pullRequestCount":7,"issueCount":7,"starsCount":1373,"forksCount":225,"license":"Creative Commons Attribution 4.0 International","participation":null,"lastUpdated":{"hasBeenPushedTo":true,"timestamp":"2024-05-15T08:57:28.857Z"}},{"type":"Public","name":"riscv-iommu-invalidation","owner":"riscv-non-isa","isFork":false,"description":"IOMMU Address Translation Cache Invalidation Commands Extensions","allTopics":[],"primaryLanguage":{"name":"Makefile","color":"#427819"},"pullRequestCount":0,"issueCount":0,"starsCount":0,"forksCount":0,"license":"Creative Commons Attribution 4.0 International","participation":null,"lastUpdated":{"hasBeenPushedTo":true,"timestamp":"2024-05-02T20:00:11.066Z"}},{"type":"Public","name":"riscv-ap-tee","owner":"riscv-non-isa","isFork":false,"description":"This repo holds the work area and revisions of the non-ISA specification created by the RISC-V AP-TEE TG. This specification defines the programming interfaces (ABI) to support the Confidential VM Extension (CoVE) confidential computing architecture for RISC-V application-processor platforms.","allTopics":["security","virtualization","tee","tsm","confidential-computing","confidential-vm","h-extension","smmtt","supervisor-domains"],"primaryLanguage":{"name":"Makefile","color":"#427819"},"pullRequestCount":0,"issueCount":2,"starsCount":44,"forksCount":16,"license":"Creative Commons Attribution 4.0 International","participation":null,"lastUpdated":{"hasBeenPushedTo":true,"timestamp":"2024-04-27T02:38:24.447Z"}},{"type":"Public","name":"riscv-trace-spec","owner":"riscv-non-isa","isFork":false,"description":"RISC-V Processor Trace Specification","allTopics":[],"primaryLanguage":{"name":"C","color":"#555555"},"pullRequestCount":0,"issueCount":9,"starsCount":137,"forksCount":43,"license":"Creative Commons Attribution 4.0 International","participation":null,"lastUpdated":{"hasBeenPushedTo":true,"timestamp":"2024-04-19T18:55:58.139Z"}},{"type":"Public","name":"riscv-semihosting","owner":"riscv-non-isa","isFork":false,"description":"","allTopics":[],"primaryLanguage":{"name":"Makefile","color":"#427819"},"pullRequestCount":0,"issueCount":2,"starsCount":22,"forksCount":7,"license":"Creative Commons Attribution Share Alike 4.0 International","participation":null,"lastUpdated":{"hasBeenPushedTo":true,"timestamp":"2024-04-19T05:45:15.879Z"}},{"type":"Public","name":"e-trace-encap","owner":"riscv-non-isa","isFork":false,"description":"E-Trace Encapsulation Specification","allTopics":[],"primaryLanguage":{"name":"Makefile","color":"#427819"},"pullRequestCount":0,"issueCount":0,"starsCount":3,"forksCount":0,"license":"Creative Commons Attribution 4.0 International","participation":null,"lastUpdated":{"hasBeenPushedTo":true,"timestamp":"2024-04-09T12:29:47.910Z"}},{"type":"Public","name":"riscv-acpi-ffh","owner":"riscv-non-isa","isFork":false,"description":"The repo will be used to hold the draft non-ISA RISC-V ACPI Functional Fixed Hardware (FFH) specification","allTopics":[],"primaryLanguage":{"name":"Makefile","color":"#427819"},"pullRequestCount":0,"issueCount":2,"starsCount":3,"forksCount":3,"license":"Creative Commons Attribution 4.0 International","participation":null,"lastUpdated":{"hasBeenPushedTo":true,"timestamp":"2024-02-01T14:14:40.508Z"}},{"type":"Public","name":"server-soc-ts","owner":"riscv-non-isa","isFork":false,"description":"Test suite for Server SoC","allTopics":[],"primaryLanguage":null,"pullRequestCount":0,"issueCount":0,"starsCount":3,"forksCount":2,"license":"Apache License 2.0","participation":null,"lastUpdated":{"hasBeenPushedTo":true,"timestamp":"2024-01-12T03:23:23.383Z"}},{"type":"Public","name":"riscv-arch-test-reports","owner":"riscv-non-isa","isFork":false,"description":"","allTopics":[],"primaryLanguage":{"name":"HTML","color":"#e34c26"},"pullRequestCount":0,"issueCount":0,"starsCount":11,"forksCount":5,"license":null,"participation":null,"lastUpdated":{"hasBeenPushedTo":true,"timestamp":"2023-12-27T00:55:59.020Z"}},{"type":"Public","name":"riscv-rvm-csi","owner":"riscv-non-isa","isFork":false,"description":"RVM-CSI (RISC-V eMbedded - Common Software Interface) aims to provide a source-level portability layer providing a simplified transition path between different microcontrollers based on RISC-V. This repo contains the specification documentation, and language-specific source files for implementing the API (initially, C header files).","allTopics":[],"primaryLanguage":{"name":"C","color":"#555555"},"pullRequestCount":0,"issueCount":1,"starsCount":8,"forksCount":4,"license":"Creative Commons Attribution 4.0 International","participation":null,"lastUpdated":{"hasBeenPushedTo":true,"timestamp":"2023-11-10T15:50:36.288Z"}}],"repositoryCount":35,"userInfo":null,"searchable":true,"definitions":[],"typeFilters":[{"id":"all","text":"All"},{"id":"public","text":"Public"},{"id":"source","text":"Sources"},{"id":"fork","text":"Forks"},{"id":"archived","text":"Archived"},{"id":"template","text":"Templates"}],"compactMode":false},"title":"Repositories"}