👋 Hi there, this is Qiong Li.

• 🌱 I'm a graduate student at ICAIS Lab @ Nanjing University, majoring in Integrated Circuit Engineering.
• 👀 I'm researching on Posit-based Hardware as well as its Applications in Deep Learning.
• 🤔 I'm currently working on Integration of Posit format with RISC-V.
• 🔭 My main coding language is Verilog/SystemVerilog, but I'm also familiar with C, Python, MATLAB, etc.
• 💬 Ask me about ...