Low-Power-and-Area-Efficient-Carry-Select-Adder-CSLA

Verilog implementation modified carry select adder

It make use of single RCA and Binary to Excess-1 Converter (BEC) instead of using dual RCAs to reduce area and power consumption The number of logic gates used in BEC is less than that of RCA. Thus BEC replaces the RCA with Cin=1