Verilog implementation of my brainf*ck processor for Tiny Tapeout 6
-
Updated
Apr 19, 2024 - Verilog
Verilog implementation of my brainf*ck processor for Tiny Tapeout 6
Wolf sheep cabbage river crossing puzzle ASIC design (🐺🐐🥬🚣)
A minimal, stack-based programming language created for The Skull CTF
Tiny Tapeout 7 project: LED matrix character display controlled via UART
256 bits (32 bytes) of DFF (RTL) memory in one Tiny Tapeout tile
Tiny Tapeout 04 Logic IC. Erics submission of his first real microchip doing basic safety chain control
Plays a tune over a piezo speaker connected to GPIO pins
Plays a tune over a piezo speaker connected to GPIO pins
Add a description, image, and links to the tinytapeout topic page so that developers can more easily learn about it.
To associate your repository with the tinytapeout topic, visit your repo's landing page and select "manage topics."