A R216 virtual machine (or emulator) written in C++
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Updated
Aug 27, 2018 - C++
A R216 virtual machine (or emulator) written in C++
A 16-bit, 5-stage RISC processor. RTL description in Verilog. Includes assembler, simulator, and example programs.
Minimal implementation of a QR code generator in Assembly for RISC-V architectures.
16 bit games console system-on-chip
Coding in Assembly for university projects
A project to design and simulate a 16-bit RISC Multicycle Processor
A C program that execute D-RISC code, as specified in the Architettura degli Elaboratori course of University of Pisa
MyRISC is an educational processor based on the MIPS architecture.
SRP16 is free and open ISA for 16-bit CPUs and Microcontrollers.
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