alu
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Exploring CPU optimization of ALU-bound code through counting
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May 20, 2024 - Rust
🖥️ A collection of SystemVerilog modules and Assembly programs. This repo includes examples of decoders, encoders, binary adders, and interactive games such as Guessing Game implemented in hardware description and assembly languages, illustrating practical applications in digital systems and microprocessor interfacing.
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May 19, 2024 - Assembly
The Read Origin Protocol (ROP) is a computational protocol that aims to discover the source of all reads, including those originating from repeat sequences, recombinant B and T cell receptors, and microbial communities.
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Apr 17, 2024 - Shell
The project involves designing a Simple RISC Computer (SRC) processor with 23 instructions, 32 registers, a control unit, data path, and memory components, aiming to create a functional CPU architecture capable of executing instructions.
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Apr 9, 2024 - HTML
"Repository containing a collection of Verilog code modules and test bench for digital design projects. "
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Apr 1, 2024 - Verilog
Home brew CPU Hardware with 1-bit ALU implementation using 74LSxx, a micro-code and assembler coded in C#.
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Mar 27, 2024 - C#
Syntacore scr1 iALU verification example
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Mar 7, 2024 - SystemVerilog
MikroLeo project files (schematic, PCB, assembler, emulator/debugger, circuit simulation file, documentation, example of programs etc). MikroLeo is a 4-bit microcomputer developed mainly for educational purposes and distributed for free under open-source licenses.
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Feb 29, 2024 - Python
This is an 8 bit computer Built out of TTL logic chips (7400 series) inspired by the SAP-1 architecture it contains the fundamental building blocks of any computer, a system clock, ALU, flash, RAM and an output display. below is the table of contents for a detailed description of every part and a final demonstration.
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Jan 10, 2024
Simulating in C++ how a 8BIT ALU works. Define the register values (binary), choose one of eight operations and execute the ALU. Includes Flags registers
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Nov 11, 2023 - Jupyter Notebook
Logic gates, simplification of Boolean functions, design and testing of combinational and sequential circuits including code converters, multiplexers, adders, and synchronous counters. For non-electrical and non-computer engineering majors only.
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Nov 10, 2023
4-bit calculator with all operations we set up for calculator. It have some main parts which are FSM(Finite State Machine) which has MOP(Micro-operations). Datapath that includes calculator's brain which is ALU(Arithmetic Logic Unit), multiplexers and hexadecimal decoder.
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Oct 22, 2023 - VHDL
Implementation of an arithmetic and logic unit in Verilog for the Basys3 board (Digilent). Computer Architecture 2023. FCEFyN, UNC, Argentina
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Oct 13, 2023 - Verilog
Исходные коды к главам книги "Цифровой синтез: практический курс" (под ред. А.Ю. Романова и Ю.В. Панчула)
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Sep 15, 2023 - Verilog
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