Arduino Core for STM32 2.0.0

Important note:

The board package index has changed to better follow the package index specification. New link is:

https://github.com/stm32duino/BoardManagerFiles/raw/main/package_stmicroelectronics_index.json

Main changes

As the number of variants continues to grow and in order to ease navigation, they have been grouped in sub-folders per series.

To improve variants support and generic ones several enhancements/fixes has been done:

• Each variant is linked to its mcu/package
• All pins capabilities is possible without modifying the PeriperhalPins.c PinMap array. ALTx pin naming allows to use all alternative possibilities which use other Hardware peripheral instances.
• All remap pins are supported (F0/G0)
• All dual pad pins are supported (H7)
• Analog definition clean up
• Several fixes in existing variants

All generic variants are now automatically generated thanks the STM32_open_pin_data repository which provides all the information required for the pin configuration of products based on STM32 MCU. All the generic variants are generated in the variant folder, this means all the generic STM32 MCU are generated. Only the linker script and the clock config are missing. A board_entry.txt file is generated to ease board declaration.

Note that flash size used can be increased by 2k as now all pins are available in the PeripheralPins.c. To decrease it you can redefine the \ PinMap arrays at sketch level to only provide access to the used pins. See the Wiki custom pinmap array section.

This release includes:

Add support of:

• Nucleo L552ZE-Q

• Nucleo F070RB

• Nucleo G031K8

• STM32F3DISCOVERY

• B-G431B-ESC1

• B-L4S5I-IOT01A

• OLIMEXINO-STM32F3

• vcc-gnd.com Mini

• Aurora One

• Several generic variant:

  • STM32F030C8
  • STM32F030F4
  • STM32F030R8
  • STM32F031K6T
  • STM32F042C4, STM32F042C6
  • STM32F051K6U, STM32F051K8U
  • STM32F070CB
  • STM32F070RB
  • STM32F072C8, STM32F072CB
  • STM32F072R8, STM32F072RB
  • STM32F091RB, STM32F091RC
  • STM32F100C4, STM32F100C6
  • STM32F100C8, STM32F100CB
  • STM32F207ZC, STM32F207ZE, STM32F207ZF, STM32F207G
  • STM32F217ZE, STM32F217G
  • STM32F302R6, STM32F302R8
  • STM32F303CB, STM32F303CC
  • STM32F303K6, STM32F303K8
  • STM32F303RD, STM32F303RE
  • STM32F303RB, STM32F303RC
  • STM32F303VBT, STM32F303VCT
  • STM32F334K4, STM32F334K6, STM32F334K8
  • STM32F401VB, STM32F401VC, STM32F401VD, STM32F401VE
  • STM32F407ZE, STM32F407ZG
  • STM32F413ZG, STM32F413ZH
  • STM32F417ZE, STM32F417ZG
  • STM32F423ZH
  • STM32F427ZG, STM32F427ZI
  • STM32F429ZE, STM32F429ZG, STM32F429ZI
  • STM32F437ZG, STM32F437ZI
  • STM32F439ZG, STM32F439ZI
  • STM32F446VC, STM32F446VE
  • STM32F745ZE, STM32F745ZG
  • STM32F746BE, STM32F746BG, STM32F746NE, STM32F746NG
  • STM32F746ZE, STM32F746ZG
  • STM32F750N8
  • STM32F750Z8
  • STM32F756BG, STM32F756NG
  • STM32F756ZG
  • STM32F765VG, STM32F765VI
  • STM32F765ZG, STM32F765ZI
  • STM32F767VG, STM32F767VI
  • STM32F767ZG, STM32F767ZI
  • STM32F777VI
  • STM32F777ZI
  • STM32G030K6, STM32G030K8
  • STM32G031J4, STM32G031J6
  • STM32G031K4, STM32G031K6, STM32G031K8
  • STM32G041J6
  • STM32G041K6, STM32G041K8
  • STM32G071R6, STM32G071R8, STM32G071RB
  • STM32G081RB
  • STM32G431C6U, STM32G431C8U, STM32G431CBU
  • STM32G441CBU
  • STM32G431K6, STM32G431K8, STM32G431KB
  • STM32G441KB
  • STM32G431R6, STM32G431R8, STM32G431RB
  • STM32G441RB
  • STM32G473RB, STM32G473RC, STM32G473RE
  • STM32G474RB, STM32G474RC, STM32G474RE
  • STM32G483RE
  • STM32G484RE
  • STM32H742VG, STM32H742VI
  • STM32H742ZG, STM32H742ZI
  • STM32H743IG, STM32H743II
  • STM32H743VG, STM32H743VI
  • STM32H743ZG, STM32H743ZI
  • STM32H747AG, STM32H747AI
  • STM32H747IG, STM32H747II
  • STM32H750ZB
  • STM32H750IB, STM32H750II
  • STM32H750VB
  • STM32H753VI
  • STM32H753ZI
  • STM32H757AI
  • STM32H757II
  • STM32L010RB
  • STM32L031K4T, STM32L031K6T
  • STM32L041K6T
  • STM32L051C6, STM32L051C8
  • STM32L052R6T, STM32L052R8T
  • STM32L053R6T, STM32L053R8T
  • STM32L063R8T
  • STM32L072CBY, STM32L072CZE, STM32L072CZY
  • STM32L072KBT, STM32L072KZT
  • STM32L072RBT, STM32L072RZT
  • STM32L073CZY
  • STM32L073RBT, STM32L073RZT
  • STM32L082CZY
  • STM32L082KBT, STM32L082KZT
  • STM32L083RBT, STM32L083RZT
  • STM32L100C6, STM32L100C6-A
  • STM32L151C6, STM32L151C8, STM32L151CB
  • STM32L151C6-A, STM32L151C8-A, STM32L151CB-A
  • STM32L152C6, STM32L152C8, STM32L152CB
  • STM32L152C6-A, STM32L152C8-A, STM32L152CB-A
  • STM32L151RE
  • STM32L152RE
  • STM32L162RE
  • STM32L412K8, STM32L412KB, STM32L422KB
  • STM32L432KB, STM32L432KC, STM32L442KC
  • STM32L433RC-P
  • STM32L452RC, STM32L452RE, STM32L462RE
  • STM32L452RE-P
  • STM32L475VC, STM32L475VE, STM32L475VG
  • STM32L476VC, STM32L476VE, STM32L476VG
  • STM32L476RC, STM32L476RE, STM32L476RG
  • STM32L486VG
  • STM32L496ZE, STM32L496ZG
  • STM32L496ZG-P
  • STM32L4A6ZG
  • STM32L4A6ZG-P
  • STM32L4R5VG, STM32L4R5VI
  • STM32L4R5ZGTx, STM32L4R5ZITx
  • STM32L4R5ZI-P
  • STM32L4R7VITx
  • STM32L4R7ZITx
  • STM32L4R9ZGJx, STM32L4R9ZIJx
  • STM32L4S5VI
  • STM32L4S5ZITx
  • STM32L4S7VI
  • STM32L4S7ZITx
  • STM32L4S9ZIJx
  • STM32L552ZC-Q, STM32L552ZE-Q
  • STM32L562ZE-Q
  • STM32WB55CC, STM32WB55CE, STM32WB55CG
  • STM32WB55RC, STM32WB55RE, STM32WB55RG

HAL Drivers and CMSIS added:

• [L5] STM32L5xx CMSIS Drivers to v1.0.4
• [L5] STM32L5xx HAL Drivers to v1.0.4

HAL Drivers and CMSIS updated:

• [F0] STM32F0xx CMSIS Drivers to v2.3.5
• [F0] STM32F0xx HAL Drivers to v1.7.5
• [F1] STM32F1xx HAL Drivers to v1.1.7
• [F1] STM32F1xx CMSIS Drivers to v4.3.2
• [F2] STM32F2xx HAL Drivers to v1.2.6
• [F2] STM32F2xx CMSIS Drivers to v2.2.4
• [F3] STM32F3xx CMSIS Drivers to v2.3.5
• [F3] STM32F3xx HAL Drivers to v1.5.5
• [F4] STM32F4xx HAL Drivers to v1.7.12
• [F4] STM32F4xx CMSIS Drivers to v2.6.6
• [F7] STM32F7xx CMSIS Drivers to v1.2.6
• [F7] STM32F7xx HAL Drivers to v1.2.9
• [G4] STM32G4xx CMSIS Drivers to v1.2.1
• [G4] STM32G4xx HAL Drivers to v1.2.1
• [H7] STM32H7xx CMSIS Drivers to v1.10.0
• [H7] STM32H7xx HAL Drivers to v1.10.0
• [L0] STM32L0xx CMSIS Drivers to v1.9.1
• [L0] STM32L0xx HAL Drivers to v1.10.4
• [L1] STM32L1xx HAL Drivers to v1.4.3
• [L1] STM32L1xx CMSIS Drivers to v2.3.1
• [L4] STM32L4xx CMSIS Drivers to v1.7.1
• [L4] STM32L4xx HAL Drivers to v1.13.0
• [MP1] STM32MP1xx CMSIS Drivers to v1.4.0
• [MP1] STM32MP1xx HAL Drivers to v1.4.0
• [WB] STM32WBxx CMSIS Drivers to v1.8.0
• [WB] STM32WBxx HAL Drivers to v1.8.0

Middleware updated:

• USB Device library to v2.6.0
• USB Host library to v3.3.4

Core dependencies:

• Updates STM32 Tools 2.0.0
• Moved from CMSIS 5.5.1 to 5.7.0
• Move from xpack-arm-none-eabi-gcc-9.2.1-1.1 to xpack-arm-none-eabi-gcc-9.3.1-1.3.

Enhancements/improvements:

• variant: Group each variant per STM32 series
  As the number of variants continues to grow and in order to ease navigation,
  they have been grouped in sub-folders per STM32 series.
• Rename PinMap_PWM to PinMap_TIM
• Extend Arduino pin naming to the max possibilities (64)
• Clean up old way to define Ax pins definition
• Rework analog pin management. Use mask to ease analog pin management and ease alternative
  analog pins introduction.
• Add Alternate pins (ALTx) management
  The PinName mentioned Px_y_ALTz (described in the PeripheralPins.c/PinNames.h files)
  are alternative possibilities which use other HW peripheral instances.
  To access those alternative PinName name using a pin number can be performed like this:
  • PYn_ALTx
  • Ax | ALTx
  • Dx | ALTx
  • x | ALTx
• Change Ax constants to an enum
• Move genpinmap from Arduino_Tools repository and renamed stm32variant.py
• Allow use of a custom peripheral pins file
  Syntax in the board.txt:
  xxx.build.peripheral_pins=-DCUSTOM_PERIPHERAL_PINS
  Example to use a custom peripheral pins file for Nucleo_L476RG:
  Nucleo_64.menu.pnum.NUCLEO_L476RG.build.peripheral_pins=-DCUSTOM_PERIPHERAL_PINS
  Then add a file with ".c" extension like "PeripheralPins_<board>.c" in the variantfolder.
  At sketch folder:
  CUSTOM_PERIPHERAL_PINS could now be overridden using the build_opt.h, ex:
  -DCUSTOM_PERIPHERAL_PINS=\"PeripheralPins_NUCLEO_L476RG.c\"
• Update variant header management
  By default the variant.h will include variant_generic.h file.
  *.build.variant_h=variant_{build.board}.h can be added in the boards.txt to define the dedicated header to a board.
• Enable HSEM HAL module by default
• Enable HAL MDMA by default
• Rework hardware semaphore usage. This new implementation is more generic and support MP1 as well WB.
  H7 could be added easily later if dual core support is implemented.
• Move the STM32 rtc drivers from core to library
• Move the STM32 low power drivers from core to library
• Move the STM32 eeprom driver from core to built-in library
• Use more efficient mode for STM32L4XX stop mode (#1097)
• Moved Stream.flush() to Print.flush() (#1170)
• Added Print.availableForWrite() (#1170)
• Wire: Implement requestFrom(uint8_t address, size_t quantity, bool sendStop)
• CMSIS DSP: Update include path and source files
• Wire: change definition of MASTER_ADDRESS to avoid potential conflict
• Wire examples: rename old *.pde files to *.ino (#1319)
• Wire: modifying to be able to do multiple .write() calls in i2cRequestEvent() as Slave
• Allow users to tweak the I2C timeout (#1233)
• [PNUCLEO_WB55RG] BLE support configuration
• U(S)ART: Add USART10 support
• U(S)ART: Update SERIAL_UART_INSTANCE for LPUART1 (101 instead of 0)
• U(S)ART: Remove repetitive NVIC SetPriority calls
• Add I2S and SAI support in the HAL conf
• dtostrf should not print fractional part if prec is 0
• Prevent redefine of HSE_VALUE if already user-overridden (#1281)
• L1: USB: Manage internal pull-up
• ADC: Manage channel bank. For STM32L1xx, in Cat.3, Cat.4, Cat.5 and Cat.6 devices
  there are up to 42 multiplexed channels organized in 2 banks. Channels ADC_IN0 to ADC_IN31 are available
  in Bank A and channels ADC_IN0b to ADC_IN31b are available in Bank B.
• servo: optional default servo angle on attach
• Enable PWR clock systematically when available
• Group system IP clock enable in separate function called at init
• spi: wait for end of transfer before returning from spi_transfer()
• Define USE_FULL_LL_DRIVER at top level
• Clean up Vddio2 Independent I/Os supply setting
• Clean up generic HAL conf file. Enable IPCC by default
• DAC: STM32F3 dac may have output switch instead of output buffer (#1324)
• DAC: remove HAL_DAC_DeInit to avoid other channel deconfiguration
• Manage dualpad analog switch
• Remove redundant tools/ directory in STM32Tools
  Before path was:
  STM32/tools/STM32Tools/<version>/tools/
  now:
  STM32/tools/STM32Tools/<version>/

Fixes:

• Fix AFIO definition for F1
• Remap pin management (#1180)
• SoftwareSerial: stopListening at the begining
• SoftwareSerial: Fix analog pins usage (#1093)
• stm32L0xx or stm32L1xx soc series has an embedded EEPROM
• remove stm32L0x and stm32L1x EEPROM buffered functions
• HardwareTimer: pause() need to call HAL API to restore HAL state
• HardwareTimer: getTimerClkFreq() add comment to avoid confusion
• HardwareTimer: Fix assert failed when using TIMER_OUTPUT_COMPARE (#1244)
• HardwareTimer: Fix issue when no channel N state
• Fix flash offset on HY_TinySTM103T variant. (#1131)
• Align Print API of (unsigned) long long
• Fix flash latency for F4x5RG running full speed at 168MHz
• Fix typo on TIM13_BASE in IRQ handler.
• Wire: fix onReceiveEvent() not being triggered when a repeated start/no stop condition is sent in slave mode
• SPI: Fix CS pin check
• HardwareSerial: don't call STM32 HAL for every bytes to transfer (#1309)
• [G0] Fix USART IRQ handler (#1188)
• [CI] Manage arduino-cli version
• [CI] Harden exception handling
• [CI] Use dev branch for test
• Fix HAL not initialized on F105x series
• BlackPill F401CC: add USER_BTN on PA0
• BLACK_F407ZX: invert PF9 and PF10 in digitalPin[]
• Fix noTone() when no TIMER_TONE is defined
  …

Plus several other fixes: See 1.9.0...2.0.0

WiKi pages will be updated to accordiling.

Several components libraries are available on stm32duino organization.
They are also available through the Arduino library manager. Search for STM32duino 😉