deca- adding pllgame96 variants

somhi · May 7, 2023 · 5017f25 · 5017f25
1 parent 84a0939
commit 5017f25
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diff --git a/target/deca/pllgame96/48_48_pllbase/jtframe_pllgame96.ppf b/target/deca/pllgame96/48_48_pllbase/jtframe_pllgame96.ppf
@@ -0,0 +1,15 @@
+<?xml version="1.0" encoding="UTF-8" ?>
+<!DOCTYPE pinplan>
+<pinplan intended_family="Cyclone IV E" variation_name="jtframe_pllgame96" megafunction_name="ALTPLL" specifies="all_ports">
+<global>
+<pin name="areset" direction="input" scope="external" />
+<pin name="inclk0" direction="input" scope="external" source="clock" />
+<pin name="c0" direction="output" scope="external" source="clock" />
+<pin name="c1" direction="output" scope="external" source="clock" />
+<pin name="c2" direction="output" scope="external" source="clock" />
+<pin name="c3" direction="output" scope="external" source="clock" />
+<pin name="c4" direction="output" scope="external" source="clock" />
+<pin name="locked" direction="output" scope="external" />
+
+</global>
+</pinplan>
diff --git a/target/deca/pllgame96/48_48_pllbase/jtframe_pllgame96.qip b/target/deca/pllgame96/48_48_pllbase/jtframe_pllgame96.qip
@@ -0,0 +1,5 @@
+set_global_assignment -name IP_TOOL_NAME "ALTPLL"
+set_global_assignment -name IP_TOOL_VERSION "17.1"
+set_global_assignment -name IP_GENERATED_DEVICE_FAMILY "{Cyclone IV E}"
+set_global_assignment -name VERILOG_FILE [file join $::quartus(qip_path) "jtframe_pllgame96.v"]
+set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) "jtframe_pllgame96.ppf"]