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XBEGIN instruction should have a branch type #353

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flobernd opened this issue Jun 23, 2022 Discussed in #352 · 0 comments
Open
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XBEGIN instruction should have a branch type #353

flobernd opened this issue Jun 23, 2022 Discussed in #352 · 0 comments
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A-decoder Area: Decoder C-bug Category: This is a bug (or a fix for a bug, when applied to PRs) P-low Priority: Low

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Discussed in #352

Originally posted by jonomango June 23, 2022
Hello,

I've noticed that the XBEGIN instruction has meta.branch_type set to ZYDIS_BRANCH_TYPE_NONE when decoded, even though it is considered a conditional branch (meta.category is set to ZYDIS_CATEGORY_COND_BR). I understand that there currently isn't a branch type that would fit for XBEGIN, so I was wondering if this was an intentional design choice or maybe specified in the Intel SDM somewhere.

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  • Mark C7 F8 XBEGIN rel16/rl32 instruction as "near branch"
@flobernd flobernd added C-bug Category: This is a bug (or a fix for a bug, when applied to PRs) A-decoder Area: Decoder P-low Priority: Low labels Jun 23, 2022
@flobernd flobernd self-assigned this Jun 23, 2022
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A-decoder Area: Decoder C-bug Category: This is a bug (or a fix for a bug, when applied to PRs) P-low Priority: Low
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