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Understand that the suggested systick tick rate configuration (OS_CFG_TICK_RATE_HZ) for uCOS is 10 to 1000Hz.
We need to schedule 2 high freq tasks (or more in future) to execute them periodically at fixed speed of 10Khz (or higher).
Each of these task will need to run a algorithm and floating point calculations and require relatively high timing accuracy.
Each task execution time quantum is around 15us, and it was running at ARM Cortex-m7 with 800Mhz core frequency.
I think it is not suitable to "over-clock" the tick rate to 10Khz (which could increase overall overhead), hence, currently i am using a hardware timer triggering a hardware-interrupt and post an event flags to the respective task to wakeup and run periodically.
The problem currently is due to we need to make the timer ISR as Kernel aware, and the timer interrupt priority has to make below boundary level. This causing the hardware timer sometime will be preempted by the kernel context-switching, thus we are getting some jittering effects at the timer ISR performance.
Would like to know Is there a better way to schedule a task faster than the systick tick rate?
or is there a way to make kernel-aware timer interrupt highest priority than kernel to avoid the preemption?
(with the requirement of relatively high timing consistency)
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Hello,
Understand that the suggested systick tick rate configuration (OS_CFG_TICK_RATE_HZ) for uCOS is 10 to 1000Hz.
We need to schedule 2 high freq tasks (or more in future) to execute them periodically at fixed speed of 10Khz (or higher).
Each of these task will need to run a algorithm and floating point calculations and require relatively high timing accuracy.
Each task execution time quantum is around 15us, and it was running at ARM Cortex-m7 with 800Mhz core frequency.
I think it is not suitable to "over-clock" the tick rate to 10Khz (which could increase overall overhead), hence, currently i am using a hardware timer triggering a hardware-interrupt and post an event flags to the respective task to wakeup and run periodically.
The problem currently is due to we need to make the timer ISR as Kernel aware, and the timer interrupt priority has to make below boundary level. This causing the hardware timer sometime will be preempted by the kernel context-switching, thus we are getting some jittering effects at the timer ISR performance.
Would like to know Is there a better way to schedule a task faster than the systick tick rate?
or is there a way to make kernel-aware timer interrupt highest priority than kernel to avoid the preemption?
(with the requirement of relatively high timing consistency)
Thanks
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