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buck50.cxx
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// buck50: Test and measurement firmware for “Blue Pill” STM32F103 development board
// Copyright (C) 2019,2020 Mark R. Rubin aka "thanks4opensource"
//
// This file is part of buck50.
//
// The buck50 program is free software: you can redistribute it
// and/or modify it under the terms of the GNU General Public License
// as published by the Free Software Foundation, either version 3 of
// the License, or (at your option) any later version.
//
// The buck50 program is distributed in the hope that it will be
// useful, but WITHOUT ANY WARRANTY; without even the implied warranty
// of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
// General Public License for more details.
//
// You should have received a copy of the GNU General Public License
// (LICENSE.txt) along with the buck50 program. If not, see
// <https://www.gnu.org/licenses/gpl.html>
#include <cstdint>
#include <core_cm3.hxx>
#include <stm32f103xb.hxx>
#include <sys_tick_timer.hxx>
#include <usb_dev_cdc_acm.hxx>
#if STM32F103XB_MAJOR_VERSION == 1
#if STM32F103XB_MINOR_VERSION < 3
#warning STM32F103XB_MINOR_VERSION < 3
#endif
#else
#error STM32F103XB_MAJOR_VERSION != 1
#endif
using namespace stm32f103xb ;
using namespace stm32f10_12357_xx;
#if 1 // (section identification for code browsing)
//
// constants
//
#define _JBLEN (10)
typedef uint32_t jmp_buf[_JBLEN];
static const uint32_t IDENTITY = 0xea017af5;
static const uint8_t MAX_BRIDGE_DATA_LEN = 62 ,
MAX_ADC_CHANNEL_NUM = 7 ,
VERSION [] = {0, 9, 2},
CONNECT_SIG_BYTE_0 = 0xf2 ;
// See wait_connect_signature()
// All with high bit set to hopefully avoid ascii control chars
static const unsigned CONNECT_SIGNATURE_LENGTH = 17;
static const uint8_t CONNECT_SIGNATURE[CONNECT_SIGNATURE_LENGTH]
= {CONNECT_SIG_BYTE_0 ,
0x9e, 0xc4, 0xaa, 0xdf,
0xd8, 0xca, 0x8f, 0xbd,
0xbe, 0xa9, 0xfe, 0x83,
0x99, 0xd1, 0xae, 0xeb};
// access USB send buf as uint32_t or uint16_t
static const unsigned RECV_BUF_UINT32S = UsbDevCdcAcm::CDC_OUT_DATA_SIZE >> 2,
SEND_BUF_UINT32S = UsbDevCdcAcm::CDC_IN_DATA_SIZE >> 2,
RECV_BUF_UINT16S = UsbDevCdcAcm::CDC_OUT_DATA_SIZE >> 1,
SEND_BUF_UINT16S = UsbDevCdcAcm::CDC_IN_DATA_SIZE >> 1;
static const unsigned MAX_TRIGGERS = 256;
// Fixed value. For safety against infinite loops (interruptible by user
// input over USB from host anyway). Used only by live() (asm analog sampling
// has no check, can't take time to set timer, etc) so not realtime-critical.
// Max conversion time is 252 12MHz cycles, so in 72MHz main CPU clocks ...
uint32_t ADC_TIMEOUT = 300 * 72 / 12; // 25 microseconds
extern uint32_t STORAGE , // from .ld file
STORAGE_END; // " " "
#endif // #if 1 (constants)
#if 1 // (section identification for code browsing)
//
// types
//
namespace Command { // enum class would require casting to/from uint8_t
static const uint8_t IDENTITY = 1,
VERSION = 2,
RESET = 3,
LIVE = 4,
HALT = 5,
DIGITAL_SAMPLING = 6,
ANALOG_SAMPLING = 7,
SEND_SAMPLES = 8,
PWM = 9,
PARALLEL_BRIDGE = 10,
USART_BRIDGE = 11,
SPI_BRIDGE = 12,
COUNTER = 13,
FLASH_WAIT_PRE = 14,
I2C_BRIDGE = 15,
SERIAL_NUMBER = 16,
BLINK_USER_LED = 17,
CONNECT_SIG = CONNECT_SIG_BYTE_0;
}
// namespaced static const enum classes would require casting to/from uint8_t
//
namespace HaltCode {
static const uint8_t
SETJMP = 0, // setjmp() API
NONE = 0,
MEMORY = 1,
DURATION = 2,
USB = 3;
}
namespace SamplingMode {
static const uint8_t MHZ_6 = 0 ,
IRREGULAR = 1 ,
UNIFORM = 2 ,
MHZ_4 = 3 ,
ANALOG = 0x0f,
UNSET = 0xff;
}
namespace InProgress {
// no good way to access static consts
// or #defines in asm
// manually search for "InProgress::" and
// edit if any change
static const uint16_t IDLE = 0x0000 ,
TRIGGER_MASK = 0x00ff ,
TRIGGERING = 0x0100 ,
EXTERN_TRIG = 0x0200 ,
ANALOG = 0x0400 ,
TRIGGERED = 0x0800 ,
SAMPLING = 0x1000 ,
COUNTING = 0x2000 ,
SAMPLING_ETC = TRIGGER_MASK
| TRIGGERING
| EXTERN_TRIG
| ANALOG
| TRIGGERED
| SAMPLING ,
IN_PROGRESS = TRIGGERING
| ANALOG
| TRIGGERED
| SAMPLING
| COUNTING ;
}
namespace AnalogSlope {
static const uint8_t NEGATIVE = 0,
POSITIVE = 1;
}
// ordered from "best" to "worst"
// USART_n and I2C_n are context dependent, don't conflict with each other
enum class PeriphStatus {
OK = 0 , // 0
EMPTY , // 1
HALTED , // 2
TIMEOUT , // 3
BUSY , // 4
OVERRUN , // 5
ERROR , // 6
USART_BREAK , // 7
USART_NOISE , // 8
USART_PARITY , // 9
USART_FRAMING, // 10
I2C_NOSTART , // 11
I2C_NOADDR , // 12
I2C_NACK , // 13
I2C_NOBTF , // 14
I2C_NORXNE , // 15
I2C_NOSTOP , // 16
};
struct Trigger {
union {
struct {
uint8_t mask,
pass,
fail,
bits;
};
uint32_t word;
};
};
/* Circular buffer. Assume that host will never send message(s) totalling
more than _SIZE (64 byte CDC_OUT_DATA_SIZE) before firmware consumes
them by calling flush(), but don't assume that host CDC-ACM driver always
sends complete message in one USB packet. See fill() which doesn't call
_fill() if client's requested size is already buffered, so _fill()
doesn't call UsbDev::recv_done() to unblock USB flow control (NAKs).
Also assume that host always sends modulo 4 bytes sized packets -- but
check and handle if not, as per when CDC-ACM startup packets.
*/
class UsbRecv {
public:
UsbRecv()
:
_begin(0),
_level(0)
{}
uint8_t byte(unsigned ndx) const;
uint16_t shrt(unsigned ndx) const;
uint32_t word(unsigned ndx) const;
unsigned fill(unsigned need);
void flush(unsigned used); // move inline
protected:
static const uint8_t
_SIZE = UsbDevCdcAcm::CDC_OUT_DATA_SIZE, // must be 64
_MODULO_BYTES_MASK = 0x3f ,
_MODULO_SHRTS_MASK = _MODULO_BYTES_MASK >> 1 ,
_MODULO_WORDS_MASK = _MODULO_BYTES_MASK >> 2 ;
void _fill();
union {
uint8_t _bytes[_SIZE ];
uint16_t _shrts[_SIZE >> 1];
uint32_t _words[_SIZE >> 2];
};
unsigned _begin,
_level;
};
class Sbrk {
public:
Sbrk()
: _brk(reinterpret_cast<uint8_t*>(&STORAGE))
{}
uint8_t* operator()(
const unsigned bytes)
{
uint8_t* current = _brk;
_brk += (bytes + 3) & 0xfffffffc; // keep 32 bit aligned
return current;
}
protected:
uint8_t* _brk;
};
union AdcLive {
struct {
unsigned channel : 4,
samp_hold : 4,
hysteresis : 8,
exponent : 8,
weight : 8;
};
unsigned word;
};
static const uint8_t NIBBLE_COUNTS[16] = {0, 1, 1, 2,
1, 2, 2, 3,
1, 2, 2, 3,
2, 3, 3, 4};
INLINE_DECL uint8_t INLINE_ATTR num_bits_set(
const uint8_t bits)
{
return NIBBLE_COUNTS[bits >> 4] + NIBBLE_COUNTS[bits & 0xf];
}
#endif // #if 1 (types)
#if 1 // (section identification for code browsing)
//
// command message layouts
//
namespace gpioa_command {
static const uint8_t
COMMAND = 0,
GPIO_SPEED = 1, // GPIO output max speed
OPEN_PULL = 2; // (0,1) push-pull/open-drain
}
namespace spi_command {
static const uint8_t
// usb_recv.bytes(NDX)
COMMAND = 0, // Command::SPI_BRIDGE or (0,1) enable/disable
MASTER = 1, // (0,1) slave,master
BITS = 2, // aggregate of ...
// bits positions
XMIT_ONLY = 5, // (0,1) xmit&recv,xmit_only
SELECT = 4, // (0,1) software,hardware
ENDIAN = 3, // (0,1) MSB,LSB first
POLARITY = 2, // (0,1) line at idle
PHASE = 1, // (0,1) clock latch edge
MISO = 0, // (0,1) pushpull/opendrain
// usb_recv.bytes(NDX)
BAUD = 3, // (0-7) clock/pow(2,baud)
PULL = 4, // (0,1,2) floating/up/down
SPEED = 5, // GPIO output max speed
TX_LEN = 6, // data length
NSS = 7, // (0,1,2) floatg/low/active
// usb_recv.word(NDX)
NSS_DLAY = 2, // gpio, PA-4
TX_TMOUT = 3, // Spi::Sr::TXE timeout
RATE = 4, // master send rate
RX_WAIT = 5, // slave wait contiguous MOSI
// usb_recv.bytes(NDX)
CMD_LEN = 24; // command length
} // namespace spi_command
namespace i2c_command {
static const uint8_t
// usb_recv.bytes(NDX)
COMMAND = 0, // Command::I2C_BRIDGE or (0,1) enable/disable
// usb_recv.bytes(NDX)
BITS = 1, // aggregate of ...
// bits positions
MASTER = 3, // (0,1),slave,master
STD_FAST = 2, // (0,1) I2C standard,fast mode
DUTY = 1, // (0,1) 50-50,16/9 duty cycle
GEN_CALL = 0, // (0,1) disable/enable general call address
// usb_recv.bytes(NDX)
GPIO = 2, // (2,1,3) 2,10,50 MHz gpio speed
DEST = 3, // I2C destination address
OAR1 = 4, // own address 1
OAR2 = 5, // " " 2 or >127 for "unused"
DFLT_SIZE = 6, // length of default tx data
RX_SIZE = 7, // number of bytes to receive
// recv_unit16s[NX}
CCR = 5, // ccr field of ccr register
// usb_recv.word(NDX)
TIMEOUT = 3, // master send timeout
// usb_recv.bytes(NDX)
CMD_LEN = 16,
// limits
MAX_TX_DFLT = 16,
MAX_TX_RX = 60;
} // namespace i2c_command
namespace usart_command {
static const uint8_t
// usb_recv.bytes(NDX)
CMD = 0, // placeholder/alignment
BITS_1 = 1, // aggregate of ...
BITS_2 = 2, // aggregate of ...
// bits_1 positions
XMIT = 6, // (0,1) disabled,enabled
RECV = 5, // " " "
CLOCK = 4, // (0,1) async,synchro
LENGTH = 3, // (0,1) 8,9 bits
POLRTY = 2, // (0,1) line at idle
PHASE = 1, // (0,1) 1st,2nd latch edge
LSTCLK = 0, // (0,1) 1st,2nd latch edge
// bits_2 positions
RTS = 2, // (0,1) disabled,enabled
CTS = 1, // (0,1) disabled,enabled
USART = 0, // (0,1) PA0-3 or PA8-10
// usb_recv.bytes(NDX)
PARITY = 3, // (0,2,3) none,even,odd
STOP = 4, // (0-3) 1, 0.5, 2, or 1.5
SPEED = 5, // GPIO output max speed
TX_DFLT = 6, // data to xmit in live() or usart_bridge if synchro
RX_LEN = 7, // max rx data len
// usb_recv.shrt(NDX)
BAUD = 5, // 16 bits
// usb_recv.word(NDX)
TX_TMO = 3, // TX timeout
RX_WAIT = 4, // concat time
RATE = 5, // rate time
// usb_recv.bytes(NDX)
CMD_LEN = 24; // command length
} // namespace usart_command
namespace live_command {
static const uint8_t
// usb_recv.bytes(NDX)
CMD = 0, // placeholder/alignment
GPIO = 1, // (0,1) gpioa disabled/enabled
USART = 2, // (0,1) usart disabled/enabled
SPI = 3, // (0,1) spi disabled/enabled
I2C = 4, // (0,1) i2c disabled/enabled
ADCS = 5, // (0,8) adcs enabled (count)
// usb_recv.word(NDX)
DURATION_LO = 2, // (0-0xffffffff)
DURATION_HI = 3, // (0-0xffffffff)
RATE_LO = 4, // (0-0xffffffff)
RATE_HI = 5, // (0-0xffffffff)
// usb_recv.bytes(NDX)
CMD_LEN = 24; // command length
} // namespace live_command
namespace adc_command {
static const uint8_t
// usb_recv.bytes(NDX)
CHAN_RATE = 0, // (((0-7) channel) << 4) | ((0-15 ) sample rate code)
HYST = 1, // (0-255) hysteresis
EXPN = 2, // (0-255) filter exponent
WGHT = 3, // (0-255) filter weight
CMD_LEN = 4;
} // namespace adc_command
#endif // #if 1 (command message layouts_
#if 1 // (section identification for code browsing)
//
// globals
//
// ordered by size to avoid unnecessary memory-wasting padding
uint8_t send_buf[UsbDevCdcAcm::CDC_IN_DATA_SIZE ] __attribute__
((aligned(4)));
UsbRecv usb_recv;
uint32_t *send_uint32s = reinterpret_cast<uint32_t*>(send_buf);
uint16_t *send_uint16s = reinterpret_cast<uint16_t*>(send_buf);
jmp_buf longjump_buf = {0};
// 128 sufficient size from analysis of assembly output and experimentation
// add 16 (words) for safety
uint32_t STACK[144] __attribute__((section (".stack")));
UsbDevCdcAcm usb_dev;
arm::SysTickTimer sys_tick_timer;
Trigger *triggers = reinterpret_cast<Trigger*>(&STORAGE_END) - MAX_TRIGGERS;
// must be global for asm and send_samples() access
uint32_t sampling_mode = SamplingMode::UNSET;
uint32_t *samples = &STORAGE_END, // init in case SEND_SAMPLES
*samples_end = &STORAGE_END; // before START_SAMPLING
// globals for setting in analog_sampling() and returning in send_samples()
uint32_t analog_sample_rate; // s/h+adc for host to calculate rate
uint16_t num_analog_words ; // two samples/word, either two single channel
// samples, or one from each dual channel
// high byte == InProgress code, low byte == state number where triggered at
uint16_t in_progress = InProgress::IDLE;
// reason why sampling ended, see HaltCode, above
uint8_t halt_code = HaltCode::NONE;
// more globals for setting in analog_sampling() and returning in send_samples()
union {
struct {
unsigned trigger : 4,
second : 4;
};
uint8_t byte ;
} analog_channels;
uint8_t num_analog_channels;
#endif // #if 1 (globals)
#if 1 // (section identification for code browsing)
//
// general utilities
//
INLINE_DECL int INLINE_ATTR memcmp(
const uint8_t *one,
const uint8_t *two,
const unsigned len)
{
for (unsigned ndx = 0 ; ndx < len ; ++ndx)
if (one[ndx] != two[ndx]) return one[ndx] - two[ndx];
return 0;
}
INLINE_DECL uint8_t INLINE_ATTR *memcpy(
uint8_t *dest ,
const uint8_t *source,
const unsigned length)
{
for (unsigned ndx = 0 ; ndx < length ; ++ndx)
#pragma GCC diagnostic push
#pragma GCC diagnostic ignored "-Wmaybe-uninitialized"
dest[ndx] = source[ndx];
#pragma GCC diagnostic pop
return dest;
}
INLINE_DECL uint8_t INLINE_ATTR UsbRecv::byte(
unsigned ndx) const
{
return _bytes[(_begin + ndx) & _MODULO_BYTES_MASK];
}
INLINE_DECL uint16_t INLINE_ATTR UsbRecv::shrt(
unsigned ndx) const
{
return _shrts[((_begin >> 1) + ndx) & _MODULO_SHRTS_MASK];
}
INLINE_DECL uint32_t INLINE_ATTR UsbRecv::word(
unsigned ndx) const
{
return _words[((_begin >> 2) + ndx) & _MODULO_WORDS_MASK];
}
void UsbRecv::_fill()
{
unsigned rcvd = usb_dev.recv_lnth(UsbDevCdcAcm::CDC_ENDPOINT_OUT);
if (!rcvd)
return;
// Should only be getting non-modulo-4-sized packets from CDC-ACM
// startup, which are ignored, so okay to pad.
// But also pad in case host sends non-mod-4
rcvd = (rcvd + 3) & 0xfffffffc;
if (_level + rcvd > _SIZE)
rcvd = _SIZE - _level;
unsigned end = (_begin + _level) & _MODULO_BYTES_MASK;
_level += rcvd;
unsigned end16 = end >> 1;
// OK if write extra LSB of last uint16_t because just overwriting
// already-used byte, or at worst completely filling with _SIZE
// and stops just short of wraparound
for (unsigned ndx = 0 ; ndx < (rcvd >> 1) ; ++ndx) {
_shrts[end16] = usb_dev.read(UsbDevCdcAcm::CDC_ENDPOINT_OUT, ndx);
end16 = (end16 + 1) & _MODULO_SHRTS_MASK ;
}
usb_dev.recv_done(UsbDevCdcAcm::CDC_ENDPOINT_OUT);
}
unsigned UsbRecv::fill(
unsigned need) // must be <= UsbDevCdcAcm::CDC_OUT_DATA_SIZE
{
if (need == 0 && _level == 0)
_fill(); // poll/check
while (_level < need)
_fill();
return _level;
}
void UsbRecv::flush(
unsigned used)
{
// only flush modulo 4 bytes
used = (used + 3) & 0xfffffffc;
if (used > _level)
used = _level;
_begin = (_begin + used) & _MODULO_BYTES_MASK;
_level -= used ;
}
template <typename ENR, typename RSTR, typename ENR_BITS, typename RSTR_BITS>
inline void __attribute__((always_inline)) rcc_periph_enable_and_reset(
volatile ENR &enr ,
volatile RSTR &rstr ,
const ENR_BITS enr_bits ,
const RSTR_BITS rstr_bits)
{
// "best practices"
//
enr |= enr_bits ; // enable
volatile ENR enr_read(enr); // read ensures peripheral has enabled
rstr |= rstr_bits; // put into reset
rstr -= rstr_bits; // take out of reset
}
inline uint16_t __attribute__((always_inline, optimize(3))) abs(
const int value)
{
return value < 0 ? -value : value;
}
void inline __attribute__((always_inline)) user_led_on()
{
gpioc->bsrr = Gpio::Bsrr::BR13; // set low turn on user LED
}
void inline __attribute__((always_inline)) user_led_off()
{
gpioc->bsrr = Gpio::Bsrr::BS13; // set low turn off user LED
}
INLINE_DECL void INLINE_ATTR usb_send(
uint8_t length)
{
while (!usb_dev.send(UsbDevCdcAcm::CDC_ENDPOINT_IN, send_buf, length))
asm("wfi");
}
void usb_send_w_zlp(
uint8_t length)
{
usb_send(length);
if (length == UsbDevCdcAcm::CDC_OUT_DATA_SIZE)
// send zero length packet to indicate end of data
usb_send(0);
}
void duration_timer(
const uint32_t duration ,
const bool start = true)
{
rcc_periph_enable_and_reset(rcc->apb1enr ,
rcc->apb1rstr ,
Rcc::Apb1enr ::TIM3EN ,
Rcc::Apb1rstr::TIM3RST);
gen_tim_3->psc = 0xffff; // 72MHz/0x10000 = 0.000910222... secs/tick
// generate "update event" to load PSC register into actual
// prescaler counter shadow register
gen_tim_3->egr = GenTim_2_3_4::Egr::UG;
// clear timer, especially UIF so following doesn't generate
// immediate (or slightly delayed) interrupt)
gen_tim_3->sr = 0;
// but ST craziness:
// 1) need to set prescaler
// 2) need to set UG bit in EGR register to actually take effect
// 3) works first time -- doesn't generate pending interrupt
// 4) PSC isn't change by code, and peripheral maintains even in face
// of enabling/disabling in APB1ENR
// 5) second and subsequent times immediately generates
// so need to clear interrupt (doesn't hurt to do first time)
arm::nvic->icpr.set(arm::NvicIrqn::TIM3);
gen_tim_3->arr = duration;
gen_tim_3->dier = GenTim_2_3_4::Dier::UIE;
arm::nvic->iser.set(arm::NvicIrqn::TIM3);
if (start)
gen_tim_3->cr1 = GenTim_2_3_4::Cr1::OPM | GenTim_2_3_4::Cr1::CEN;
}
#endif // #if 1 (general utilities)
#if 1 // (section identification for code browsing)
//
// interrupt handler utilities
//
// noinline because needs to be callable from assembly
extern "C" void __attribute__((noinline)) halt_timers()
{
gen_tim_3->cr1 = 0; // always stop duration timer
gen_tim_3->sr = 0; // clear interrupt flags else keeps interrupting
arm::nvic->icpr.set(arm::NvicIrqn::TIM3); // in case interrupt pending
arm::nvic->icer.set(arm::NvicIrqn::TIM3); // disable interrupt
rcc->apb1enr -= Rcc::Apb1enr::TIM3EN;
adv_tim_1->cr1 = 0; // stop SysTick overflow timer
rcc->apb2enr -= Rcc::Apb2enr::TIM1EN;
}
#endif // #if 1 (interrupt handler utilities)
#if 1 // (section identification for code browsing)
//
// global initialization
//
void usb_mcu_init()
{
#ifdef USB_DEV_FLASH_WAIT_STATES
#if USB_DEV_FLASH_WAIT_STATES == 1
// enable flash prefetch buffer, one wait state
flash->acr |= Flash::Acr::PRFTBE | Flash::Acr::LATENCY_1_WAIT_STATE;
#elif USB_DEV_FLASH_WAIT_STATES == 2
// enable flash prefetch buffer, two wait states
flash->acr |= Flash::Acr::PRFTBE | Flash::Acr::LATENCY_2_WAIT_STATES;
#endif
#endif
rcc->cr |= Rcc::Cr::HSEON;
while(!rcc->cr.any(Rcc::Cr::HSERDY));
rcc->cfgr |= Rcc::Cfgr::HPRE_DIV_1
| Rcc::Cfgr::PPRE2_DIV_1
| Rcc::Cfgr::PPRE1_DIV_2; // apb1 max 36 MHz
// but tim2-5 automatic 2x back
// to 72 MHz
rcc->cfgr.ins( Rcc::Cfgr::PLLSRC // PLL input from HSE (8 MHz)
| Rcc::Cfgr::PLLMULL_9);// Multiply by 9 (8*9=72 MHz)
rcc->cr |= Rcc::Cr::PLLON;
while(!rcc->cr.any(Rcc::Cr::PLLRDY));
rcc->cfgr.ins(Rcc::Cfgr::SW_PLL); // use PLL as system clock
while(!rcc->cfgr.all(Rcc::Cfgr::SWS_PLL)); // wait for confirmation
rcc->cfgr.clr(Rcc::Cfgr::USBPRE); // 1.5x USB prescaler
rcc_periph_enable_and_reset(rcc->apb1enr ,
rcc->apb1rstr ,
Rcc::Apb1enr ::USBEN ,
Rcc::Apb1rstr::USBRST);
// enable ports and alternate functions (leave enabled)
rcc_periph_enable_and_reset(
rcc->apb2enr ,
rcc->apb2rstr ,
Rcc::Apb2enr ::AFIOEN // peripherals
| Rcc::Apb2enr ::IOPAEN // USB,/usart/tim2/spi/adc
| Rcc::Apb2enr ::IOPBEN // sampling/tim1/I2C
| Rcc::Apb2enr ::IOPCEN, // user LED
Rcc::Apb2rstr::AFIORST // peripherals
| Rcc::Apb2rstr::IOPARST // USB/usart/tim2/spi/adc
| Rcc::Apb2rstr::IOPBRST // sampling/tim1/I2C
| Rcc::Apb2rstr::IOPCRST); // user LED
arm::nvic->iser.set(arm::NvicIrqn::USB_LP_CAN1_RX0);
// full main clock speed
sys_tick_timer.init(arm::SysTick::Ctrl::CLK_SRC_CPU);
} // usb_mcu_init()
void gpio_init()
{
afio->mapr = Afio::Mapr::SWJ_CFG_NO_NJTRST; // get NJRST off PB4
// enable USB alternate function on USB+ and USB- data pins
// alternate function output, open-drain (for paranoia), speed 50MHz
gpioa->crh.ins( Gpio::Crh::CNF11_ALTFUNC_OPEN_DRAIN
| Gpio::Crh::CNF12_ALTFUNC_OPEN_DRAIN
| Gpio::Crh::MODE11_OUTPUT_50_MHZ
| Gpio::Crh::MODE12_OUTPUT_50_MHZ );
// all pull down, including PB14 (wait all high until trigger start)
// and PB15 (wait all high to ackknowlege triggered)
// is 0x00000010 by default despite RM0008 claiming 0x00000000
gpiob->odr = 0;
// enable digital input pins as pull/pull-down (latter default in ODR)
gpiob->crl.ins( Gpio::Crl:: CNF0_INPUT_PULL_UP_DOWN
| Gpio::Crl:: CNF1_INPUT_PULL_UP_DOWN
| Gpio::Crl:: CNF2_INPUT_FLOATING // BOOT1 jumpered low
| Gpio::Crl:: CNF3_INPUT_PULL_UP_DOWN
| Gpio::Crl:: CNF4_INPUT_PULL_UP_DOWN
| Gpio::Crl:: CNF5_INPUT_PULL_UP_DOWN
| Gpio::Crl:: CNF6_INPUT_PULL_UP_DOWN
| Gpio::Crl:: CNF7_INPUT_PULL_UP_DOWN
| Gpio::Crl:: MODE0_INPUT
| Gpio::Crl:: MODE1_INPUT
| Gpio::Crl:: MODE2_INPUT
| Gpio::Crl:: MODE3_INPUT
| Gpio::Crl:: MODE4_INPUT
| Gpio::Crl:: MODE5_INPUT
| Gpio::Crl:: MODE6_INPUT
| Gpio::Crl:: MODE7_INPUT );
gpiob->crh.ins( Gpio::Crh:: CNF8_INPUT_PULL_UP_DOWN
| Gpio::Crh:: CNF9_INPUT_PULL_UP_DOWN
| Gpio::Crh:: CNF10_INPUT_PULL_UP_DOWN
| Gpio::Crh:: CNF11_INPUT_PULL_UP_DOWN
| Gpio::Crh:: CNF12_INPUT_PULL_UP_DOWN
| Gpio::Crh:: CNF13_INPUT_PULL_UP_DOWN
| Gpio::Crh:: CNF14_INPUT_PULL_UP_DOWN
| Gpio::Crh:: CNF15_INPUT_PULL_UP_DOWN
| Gpio::Crh:: MODE8_INPUT
| Gpio::Crh:: MODE9_INPUT
| Gpio::Crh::MODE10_INPUT
| Gpio::Crh::MODE11_INPUT
| Gpio::Crh::MODE12_INPUT
| Gpio::Crh::MODE13_INPUT
| Gpio::Crh::MODE14_INPUT
| Gpio::Crh::MODE15_INPUT );
// enable on-board user LED, turned off
gpioc->bsrr = Gpio::Bsrr::BS13;
gpioc->crh.ins( Gpio::Crh::CNF13_OUTPUT_OPEN_DRAIN
| Gpio::Crh::MODE13_OUTPUT_2_MHZ );
}
#endif // #if 1 (global initialization)
#if 1 // (section identification for code browsing)
//
// peripheral setup utilities
//
void spi_activate()
{
namespace spi = spi_command;
const uint8_t spi_bits = usb_recv.byte (spi::BITS ),
baud = usb_recv.byte (spi::BAUD ),
pull = usb_recv.byte (spi::PULL ),
gpio_speed = usb_recv.byte (spi::SPEED ),
nss = usb_recv.byte (spi::NSS );
const bool master = usb_recv.byte (spi::MASTER ),
select = spi_bits & (1 << spi::SELECT ),
endian = spi_bits & (1 << spi::ENDIAN ),
polarity = spi_bits & (1 << spi::POLARITY),
phase = spi_bits & (1 << spi::PHASE ),
miso = spi_bits & (1 << spi::MISO );
const Gpio::Crl::mskd_t speed4 = Gpio::Crl::mskd_t(Gpio::Crl::MASK ,
gpio_speed ,
Gpio::Crl::MODE4_POS ),
speed5 = Gpio::Crl::mskd_t(Gpio::Crl::MASK ,
gpio_speed ,
Gpio::Crl::MODE5_POS ),
speed6 = Gpio::Crl::mskd_t(Gpio::Crl::MASK ,
gpio_speed ,
Gpio::Crl::MODE6_POS ),
speed7 = Gpio::Crl::mskd_t(Gpio::Crl::MASK ,
gpio_speed ,
Gpio::Crl::MODE7_POS );
rcc_periph_enable_and_reset(rcc->apb2enr ,
rcc->apb2rstr ,
Rcc::Apb2enr ::SPI1EN ,
Rcc::Apb2rstr::SPI1RST);
if (master) {
spi1->cr1 = Spi::Cr1::SPE
| Spi::Cr1::MASTER
| Spi::Cr1::SSM
| Spi::Cr1::SSI
| Spi::Cr1::bits_t( endian, Spi::Cr1::LSBFIRST_POS)
| Spi::Cr1::bits_t(polarity, Spi::Cr1:: CPOL_POS )
| Spi::Cr1::bits_t( phase, Spi::Cr1:: CPHA_POS )
| Spi::Cr1::br ( baud & Spi::Cr1:: BR_MASK );
spi1->cr2 = Spi::Cr2::SSOE; // drive NSS pin low to select slave
// connect to I/O pins
//
Gpio::Crl::mskd_t miso_pin,
nss_pin ;
switch (nss) {
case 0:
// floating
nss_pin = Gpio::Crl::MODE4_INPUT
| Gpio::Crl:: CNF4_INPUT_FLOATING;
break;
case 1:
// permanently low
nss_pin = speed4 | Gpio::Crl::CNF4_OUTPUT_PUSH_PULL;
gpioa->bsrr |= Gpio::Bsrr::BR4 ;
break;
case 2:
default:
// SPI sets low when CLOCK+MOSI active
// NO!! Contrary to RM0008 obfuscation, peripheral does not
// control NSS pin on a per-"frame" (8/16 bit xfer) basis
// nss_pin = speed4 | Gpio::Crl:: CNF4_ALTFUNC_PUSH_PULL;
nss_pin = speed4 | Gpio::Crl::CNF4_OUTPUT_PUSH_PULL;
gpioa->bsrr |= Gpio::Bsrr::BS4 /* high */ ;
break;
}
if (pull == 0)
miso_pin = Gpio::Crl:: CNF6_INPUT_FLOATING;
else {
miso_pin = Gpio::Crl:: MODE6_INPUT
| Gpio::Crl:: CNF6_INPUT_PULL_UP_DOWN;
gpioa->bsrr |= pull == 1
? Gpio::Bsrr::BS6 // miso pull up
: Gpio::Bsrr::BR6; // miso pull down, pull==2,
// shouldn't use
}
gpioa->crl.ins( speed5 // spi1 sclk, PA5
| speed7 // spi1 mosi, PA7
| nss_pin // spi1 nss , PA4
| Gpio::Crl:: CNF5_ALTFUNC_PUSH_PULL // spi1 sclk, PA5
| miso_pin // spi1 miso, PA6
| Gpio::Crl:: CNF7_ALTFUNC_PUSH_PULL); // spi1 mosi, PA7
}
else { // slave
Spi::Cr1::bits_t select_bit = select
? Spi::Cr1::bits_t(0) // hardware
: Spi::Cr1::SSM ; // software
spi1->cr1 = Spi::Cr1::SPE
| Spi::Cr1::SLAVE
| select_bit
| Spi::Cr1::bits_t( endian, Spi::Cr1::LSBFIRST_POS)
| Spi::Cr1::bits_t(polarity, Spi::Cr1:: CPOL_POS)
| Spi::Cr1::bits_t( phase, Spi::Cr1:: CPHA_POS)
| Spi::Cr1::br ( baud & Spi::Cr1:: BR_MASK);
spi1->cr2 = 0; // NSS
// connect to I/O pins
//
if (miso) // bit set to 1, open-drain