From 68bce76971d922864c75e7bfa8cbe3e09a798250 Mon Sep 17 00:00:00 2001 From: Simon Wright Date: Fri, 19 Feb 2021 14:43:30 +0000 Subject: [PATCH 01/10] Fixed error in previous commit. * common/gcc8/environment_task.adb (Activation_Chain_Dummy): corrupted by bad paste. --- common/gcc8/environment_task.adb | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/common/gcc8/environment_task.adb b/common/gcc8/environment_task.adb index 4d75683..e2b9c45 100644 --- a/common/gcc8/environment_task.adb +++ b/common/gcc8/environment_task.adb @@ -40,7 +40,7 @@ package body Environment_Task is -- For creating the environment task; declared here to avoid -- accessibility level issues. Environment_Task_Elaborated : aliased Boolean; -(Environment_Task_Secondary_Stack_Size Activation_Chain_Dummy : System.Tasking.Activation_Chain + Activation_Chain_Dummy : System.Tasking.Activation_Chain with Suppress_Initialization; Environment_TCB : aliased System.Tasking.Ada_Task_Control_Block (System.Tasking.Null_Entry); From ffcc19bb9f99fec428f618f094b3e066ebbb6897 Mon Sep 17 00:00:00 2001 From: Simon Wright Date: Sat, 20 Feb 2021 17:50:23 +0000 Subject: [PATCH 02/10] Update 64-bit arithmetic for GCC 11. * common/s-aridou.adb: new, copied from FSF GCC 11. * common/s-aridou.ads: likewise. * common/s-arit64.adb: recopied from FSF GCC 11. * common/s-arit64.ads: likewise. --- common/s-aridou.adb | 678 ++++++++++++++++++++++++++++++++++++++++++++ common/s-aridou.ads | 94 ++++++ common/s-arit64.adb | 641 ++--------------------------------------- common/s-arit64.ads | 32 ++- 4 files changed, 810 insertions(+), 635 deletions(-) create mode 100644 common/s-aridou.adb create mode 100644 common/s-aridou.ads diff --git a/common/s-aridou.adb b/common/s-aridou.adb new file mode 100644 index 0000000..05a8c9f --- /dev/null +++ b/common/s-aridou.adb @@ -0,0 +1,678 @@ +------------------------------------------------------------------------------ +-- -- +-- GNAT RUN-TIME COMPONENTS -- +-- -- +-- S Y S T E M . A R I T H _ D O U B L E -- +-- -- +-- B o d y -- +-- -- +-- Copyright (C) 1992-2020, Free Software Foundation, Inc. -- +-- -- +-- GNAT is free software; you can redistribute it and/or modify it under -- +-- terms of the GNU General Public License as published by the Free Soft- -- +-- ware Foundation; either version 3, or (at your option) any later ver- -- +-- sion. GNAT is distributed in the hope that it will be useful, but WITH- -- +-- OUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY -- +-- or FITNESS FOR A PARTICULAR PURPOSE. -- +-- -- +-- As a special exception under Section 7 of GPL version 3, you are granted -- +-- additional permissions described in the GCC Runtime Library Exception, -- +-- version 3.1, as published by the Free Software Foundation. -- +-- -- +-- You should have received a copy of the GNU General Public License and -- +-- a copy of the GCC Runtime Library Exception along with this program; -- +-- see the files COPYING3 and COPYING.RUNTIME respectively. If not, see -- +-- . -- +-- -- +-- GNAT was originally developed by the GNAT team at New York University. -- +-- Extensive contributions were provided by Ada Core Technologies Inc. -- +-- -- +------------------------------------------------------------------------------ + +with Ada.Unchecked_Conversion; + +package body System.Arith_Double is + + pragma Suppress (Overflow_Check); + pragma Suppress (Range_Check); + + function To_Uns is new Ada.Unchecked_Conversion (Double_Int, Double_Uns); + function To_Int is new Ada.Unchecked_Conversion (Double_Uns, Double_Int); + + Double_Size : constant Natural := Double_Int'Size; + Single_Size : constant Natural := Double_Int'Size / 2; + + ----------------------- + -- Local Subprograms -- + ----------------------- + + function "+" (A, B : Single_Uns) return Double_Uns is + (Double_Uns (A) + Double_Uns (B)); + function "+" (A : Double_Uns; B : Single_Uns) return Double_Uns is + (A + Double_Uns (B)); + -- Length doubling additions + + function "*" (A, B : Single_Uns) return Double_Uns is + (Double_Uns (A) * Double_Uns (B)); + -- Length doubling multiplication + + function "/" (A : Double_Uns; B : Single_Uns) return Double_Uns is + (A / Double_Uns (B)); + -- Length doubling division + + function "&" (Hi, Lo : Single_Uns) return Double_Uns is + (Shift_Left (Double_Uns (Hi), Single_Size) or Double_Uns (Lo)); + -- Concatenate hi, lo values to form double result + + function "abs" (X : Double_Int) return Double_Uns is + (if X = Double_Int'First + then 2 ** (Double_Size - 1) + else Double_Uns (Double_Int'(abs X))); + -- Convert absolute value of X to unsigned. Note that we can't just use + -- the expression of the Else since it overflows for X = Double_Int'First. + + function "rem" (A : Double_Uns; B : Single_Uns) return Double_Uns is + (A rem Double_Uns (B)); + -- Length doubling remainder + + function Le3 (X1, X2, X3, Y1, Y2, Y3 : Single_Uns) return Boolean; + -- Determines if (3 * Single_Size)-bit value X1&X2&X3 <= Y1&Y2&Y3 + + function Lo (A : Double_Uns) return Single_Uns is + (Single_Uns (A and (2 ** Single_Size - 1))); + -- Low order half of double value + + function Hi (A : Double_Uns) return Single_Uns is + (Single_Uns (Shift_Right (A, Single_Size))); + -- High order half of double value + + procedure Sub3 (X1, X2, X3 : in out Single_Uns; Y1, Y2, Y3 : Single_Uns); + -- Computes X1&X2&X3 := X1&X2&X3 - Y1&Y1&Y3 mod 2 ** (3 * Single_Size) + + function To_Neg_Int (A : Double_Uns) return Double_Int; + -- Convert to negative integer equivalent. If the input is in the range + -- 0 .. 2 ** (Double_Size - 1), then the corresponding nonpositive signed + -- integer (obtained by negating the given value) is returned, otherwise + -- constraint error is raised. + + function To_Pos_Int (A : Double_Uns) return Double_Int; + -- Convert to positive integer equivalent. If the input is in the range + -- 0 .. 2 ** (Double_Size - 1) - 1, then the corresponding non-negative + -- signed integer is returned, otherwise constraint error is raised. + + procedure Raise_Error; + pragma No_Return (Raise_Error); + -- Raise constraint error with appropriate message + + -------------------------- + -- Add_With_Ovflo_Check -- + -------------------------- + + function Add_With_Ovflo_Check (X, Y : Double_Int) return Double_Int is + R : constant Double_Int := To_Int (To_Uns (X) + To_Uns (Y)); + + begin + if X >= 0 then + if Y < 0 or else R >= 0 then + return R; + end if; + + else -- X < 0 + if Y > 0 or else R < 0 then + return R; + end if; + end if; + + Raise_Error; + end Add_With_Ovflo_Check; + + ------------------- + -- Double_Divide -- + ------------------- + + procedure Double_Divide + (X, Y, Z : Double_Int; + Q, R : out Double_Int; + Round : Boolean) + is + Xu : constant Double_Uns := abs X; + Yu : constant Double_Uns := abs Y; + + Yhi : constant Single_Uns := Hi (Yu); + Ylo : constant Single_Uns := Lo (Yu); + + Zu : constant Double_Uns := abs Z; + Zhi : constant Single_Uns := Hi (Zu); + Zlo : constant Single_Uns := Lo (Zu); + + T1, T2 : Double_Uns; + Du, Qu, Ru : Double_Uns; + Den_Pos : Boolean; + + begin + if Yu = 0 or else Zu = 0 then + Raise_Error; + end if; + + -- Set final signs (RM 4.5.5(27-30)) + + Den_Pos := (Y < 0) = (Z < 0); + + -- Compute Y * Z. Note that if the result overflows Double_Uns, then + -- the rounded result is zero, except for the very special case where + -- X = -2 ** (Double_Size - 1) and abs(Y*Z) = 2 ** Double_Size, when + -- Round is True. + + if Yhi /= 0 then + if Zhi /= 0 then + + -- Handle the special case when Round is True + + if Yhi = 1 + and then Zhi = 1 + and then Ylo = 0 + and then Zlo = 0 + and then X = Double_Int'First + and then Round + then + Q := (if Den_Pos then -1 else 1); + else + Q := 0; + end if; + + R := X; + return; + else + T2 := Yhi * Zlo; + end if; + + else + T2 := Ylo * Zhi; + end if; + + T1 := Ylo * Zlo; + T2 := T2 + Hi (T1); + + if Hi (T2) /= 0 then + + -- Handle the special case when Round is True + + if Hi (T2) = 1 + and then Lo (T2) = 0 + and then Lo (T1) = 0 + and then X = Double_Int'First + and then Round + then + Q := (if Den_Pos then -1 else 1); + else + Q := 0; + end if; + + R := X; + return; + end if; + + Du := Lo (T2) & Lo (T1); + + -- Check overflow case of largest negative number divided by -1 + + if X = Double_Int'First and then Du = 1 and then not Den_Pos then + Raise_Error; + end if; + + -- Perform the actual division + + pragma Assert (Du /= 0); + -- Multiplication of 2-limb arguments Yu and Zu leads to 4-limb result + -- (where each limb is a single value). Cases where 4 limbs are needed + -- require Yhi/=0 and Zhi/=0 and lead to early exit. Remaining cases + -- where 3 limbs are needed correspond to Hi(T2)/=0 and lead to early + -- exit. Thus, at this point, the result fits in 2 limbs which are + -- exactly Lo(T2) and Lo(T1), which corresponds to the value of Du. + -- As the case where one of Yu or Zu is null also led to early exit, + -- we have Du/=0 here. + Qu := Xu / Du; + Ru := Xu rem Du; + + -- Deal with rounding case + + if Round and then Ru > (Du - Double_Uns'(1)) / Double_Uns'(2) then + Qu := Qu + Double_Uns'(1); + end if; + + -- Case of dividend (X) sign positive + + if X >= 0 then + R := To_Int (Ru); + Q := (if Den_Pos then To_Int (Qu) else -To_Int (Qu)); + + -- Case of dividend (X) sign negative + + -- We perform the unary minus operation on the unsigned value + -- before conversion to signed, to avoid a possible overflow + -- for value -2 ** (Double_Size - 1), both for computing R and Q. + + else + R := To_Int (-Ru); + Q := (if Den_Pos then To_Int (-Qu) else To_Int (Qu)); + end if; + end Double_Divide; + + --------- + -- Le3 -- + --------- + + function Le3 (X1, X2, X3, Y1, Y2, Y3 : Single_Uns) return Boolean is + begin + if X1 < Y1 then + return True; + elsif X1 > Y1 then + return False; + elsif X2 < Y2 then + return True; + elsif X2 > Y2 then + return False; + else + return X3 <= Y3; + end if; + end Le3; + + ------------------------------- + -- Multiply_With_Ovflo_Check -- + ------------------------------- + + function Multiply_With_Ovflo_Check (X, Y : Double_Int) return Double_Int is + Xu : constant Double_Uns := abs X; + Xhi : constant Single_Uns := Hi (Xu); + Xlo : constant Single_Uns := Lo (Xu); + + Yu : constant Double_Uns := abs Y; + Yhi : constant Single_Uns := Hi (Yu); + Ylo : constant Single_Uns := Lo (Yu); + + T1, T2 : Double_Uns; + + begin + if Xhi /= 0 then + if Yhi /= 0 then + Raise_Error; + else + T2 := Xhi * Ylo; + end if; + + elsif Yhi /= 0 then + T2 := Xlo * Yhi; + + else -- Yhi = Xhi = 0 + T2 := 0; + end if; + + -- Here we have T2 set to the contribution to the upper half of the + -- result from the upper halves of the input values. + + T1 := Xlo * Ylo; + T2 := T2 + Hi (T1); + + if Hi (T2) /= 0 then + Raise_Error; + end if; + + T2 := Lo (T2) & Lo (T1); + + if X >= 0 then + if Y >= 0 then + return To_Pos_Int (T2); + pragma Annotate (CodePeer, Intentional, "precondition", + "Intentional Unsigned->Signed conversion"); + else + return To_Neg_Int (T2); + end if; + else -- X < 0 + if Y < 0 then + return To_Pos_Int (T2); + pragma Annotate (CodePeer, Intentional, "precondition", + "Intentional Unsigned->Signed conversion"); + else + return To_Neg_Int (T2); + end if; + end if; + + end Multiply_With_Ovflo_Check; + + ----------------- + -- Raise_Error -- + ----------------- + + procedure Raise_Error is + begin + raise Constraint_Error with "Double arithmetic overflow"; + end Raise_Error; + + ------------------- + -- Scaled_Divide -- + ------------------- + + procedure Scaled_Divide + (X, Y, Z : Double_Int; + Q, R : out Double_Int; + Round : Boolean) + is + Xu : constant Double_Uns := abs X; + Xhi : constant Single_Uns := Hi (Xu); + Xlo : constant Single_Uns := Lo (Xu); + + Yu : constant Double_Uns := abs Y; + Yhi : constant Single_Uns := Hi (Yu); + Ylo : constant Single_Uns := Lo (Yu); + + Zu : Double_Uns := abs Z; + Zhi : Single_Uns := Hi (Zu); + Zlo : Single_Uns := Lo (Zu); + + D : array (1 .. 4) of Single_Uns; + -- The dividend, four digits (D(1) is high order) + + Qd : array (1 .. 2) of Single_Uns; + -- The quotient digits, two digits (Qd(1) is high order) + + S1, S2, S3 : Single_Uns; + -- Value to subtract, three digits (S1 is high order) + + Qu : Double_Uns; + Ru : Double_Uns; + -- Unsigned quotient and remainder + + Mask : Single_Uns; + -- Mask of bits used to compute the scaling factor below + + Scale : Natural; + -- Scaling factor used for multiple-precision divide. Dividend and + -- Divisor are multiplied by 2 ** Scale, and the final remainder is + -- divided by the scaling factor. The reason for this scaling is to + -- allow more accurate estimation of quotient digits. + + Shift : Natural; + -- Shift factor used to compute the scaling factor above + + T1, T2, T3 : Double_Uns; + -- Temporary values + + begin + -- First do the multiplication, giving the four digit dividend + + T1 := Xlo * Ylo; + D (4) := Lo (T1); + D (3) := Hi (T1); + + if Yhi /= 0 then + T1 := Xlo * Yhi; + T2 := D (3) + Lo (T1); + D (3) := Lo (T2); + D (2) := Hi (T1) + Hi (T2); + + if Xhi /= 0 then + T1 := Xhi * Ylo; + T2 := D (3) + Lo (T1); + D (3) := Lo (T2); + T3 := D (2) + Hi (T1); + T3 := T3 + Hi (T2); + D (2) := Lo (T3); + D (1) := Hi (T3); + + T1 := (D (1) & D (2)) + Double_Uns'(Xhi * Yhi); + D (1) := Hi (T1); + D (2) := Lo (T1); + + else + D (1) := 0; + end if; + + else + if Xhi /= 0 then + T1 := Xhi * Ylo; + T2 := D (3) + Lo (T1); + D (3) := Lo (T2); + D (2) := Hi (T1) + Hi (T2); + + else + D (2) := 0; + end if; + + D (1) := 0; + end if; + + -- Now it is time for the dreaded multiple precision division. First an + -- easy case, check for the simple case of a one digit divisor. + + if Zhi = 0 then + if D (1) /= 0 or else D (2) >= Zlo then + Raise_Error; + + -- Here we are dividing at most three digits by one digit + + else + T1 := D (2) & D (3); + T2 := Lo (T1 rem Zlo) & D (4); + + Qu := Lo (T1 / Zlo) & Lo (T2 / Zlo); + Ru := T2 rem Zlo; + end if; + + -- If divisor is double digit and dividend is too large, raise error + + elsif (D (1) & D (2)) >= Zu then + Raise_Error; + + -- This is the complex case where we definitely have a double digit + -- divisor and a dividend of at least three digits. We use the classical + -- multiple-precision division algorithm (see section (4.3.1) of Knuth's + -- "The Art of Computer Programming", Vol. 2 for a description + -- (algorithm D). + + else + -- First normalize the divisor so that it has the leading bit on. + -- We do this by finding the appropriate left shift amount. + + Shift := Single_Size / 2; + Mask := Shift_Left (2 ** (Single_Size / 2) - 1, Shift); + Scale := 0; + + while Shift /= 0 loop + if (Hi (Zu) and Mask) = 0 then + Scale := Scale + Shift; + Zu := Shift_Left (Zu, Shift); + end if; + + Shift := Shift / 2; + Mask := Shift_Left (Mask, Shift); + end loop; + + Zhi := Hi (Zu); + Zlo := Lo (Zu); + + pragma Assert (Zhi /= 0); + -- We have Hi(Zu)/=0 before normalization. The sequence of Shift_Left + -- operations results in the leading bit of Zu being 1 by moving the + -- leftmost 1-bit in Zu to leading position, thus Zhi=Hi(Zu)/=0 here. + + -- Note that when we scale up the dividend, it still fits in four + -- digits, since we already tested for overflow, and scaling does + -- not change the invariant that (D (1) & D (2)) < Zu. + + T1 := Shift_Left (D (1) & D (2), Scale); + D (1) := Hi (T1); + T2 := Shift_Left (0 & D (3), Scale); + D (2) := Lo (T1) or Hi (T2); + T3 := Shift_Left (0 & D (4), Scale); + D (3) := Lo (T2) or Hi (T3); + D (4) := Lo (T3); + + -- Loop to compute quotient digits, runs twice for Qd(1) and Qd(2) + + for J in 0 .. 1 loop + + -- Compute next quotient digit. We have to divide three digits by + -- two digits. We estimate the quotient by dividing the leading + -- two digits by the leading digit. Given the scaling we did above + -- which ensured the first bit of the divisor is set, this gives + -- an estimate of the quotient that is at most two too high. + + Qd (J + 1) := (if D (J + 1) = Zhi + then 2 ** Single_Size - 1 + else Lo ((D (J + 1) & D (J + 2)) / Zhi)); + + -- Compute amount to subtract + + T1 := Qd (J + 1) * Zlo; + T2 := Qd (J + 1) * Zhi; + S3 := Lo (T1); + T1 := Hi (T1) + Lo (T2); + S2 := Lo (T1); + S1 := Hi (T1) + Hi (T2); + + -- Adjust quotient digit if it was too high + + -- We use the version of the algorithm in the 2nd Edition of + -- "The Art of Computer Programming". This had a bug not + -- discovered till 1995, see Vol 2 errata: + -- http://www-cs-faculty.stanford.edu/~uno/err2-2e.ps.gz. + -- Under rare circumstances the expression in the test could + -- overflow. This version was further corrected in 2005, see + -- Vol 2 errata: + -- http://www-cs-faculty.stanford.edu/~uno/all2-pre.ps.gz. + -- This implementation is not impacted by these bugs, due to the + -- use of a word-size comparison done in function Le3 instead of + -- a comparison on two-word integer quantities in the original + -- algorithm. + + loop + exit when Le3 (S1, S2, S3, D (J + 1), D (J + 2), D (J + 3)); + Qd (J + 1) := Qd (J + 1) - 1; + Sub3 (S1, S2, S3, 0, Zhi, Zlo); + end loop; + + -- Now subtract S1&S2&S3 from D1&D2&D3 ready for next step + + Sub3 (D (J + 1), D (J + 2), D (J + 3), S1, S2, S3); + end loop; + + -- The two quotient digits are now set, and the remainder of the + -- scaled division is in D3&D4. To get the remainder for the + -- original unscaled division, we rescale this dividend. + + -- We rescale the divisor as well, to make the proper comparison + -- for rounding below. + + Qu := Qd (1) & Qd (2); + Ru := Shift_Right (D (3) & D (4), Scale); + Zu := Shift_Right (Zu, Scale); + end if; + + -- Deal with rounding case + + if Round and then Ru > (Zu - Double_Uns'(1)) / Double_Uns'(2) then + + -- Protect against wrapping around when rounding, by signaling + -- an overflow when the quotient is too large. + + if Qu = Double_Uns'Last then + Raise_Error; + end if; + + Qu := Qu + Double_Uns'(1); + end if; + + -- Set final signs (RM 4.5.5(27-30)) + + -- Case of dividend (X * Y) sign positive + + if (X >= 0 and then Y >= 0) or else (X < 0 and then Y < 0) then + R := To_Pos_Int (Ru); + Q := (if Z > 0 then To_Pos_Int (Qu) else To_Neg_Int (Qu)); + + -- Case of dividend (X * Y) sign negative + + else + R := To_Neg_Int (Ru); + Q := (if Z > 0 then To_Neg_Int (Qu) else To_Pos_Int (Qu)); + end if; + end Scaled_Divide; + + ---------- + -- Sub3 -- + ---------- + + procedure Sub3 (X1, X2, X3 : in out Single_Uns; Y1, Y2, Y3 : Single_Uns) is + begin + if Y3 > X3 then + if X2 = 0 then + X1 := X1 - 1; + end if; + + X2 := X2 - 1; + end if; + + X3 := X3 - Y3; + + if Y2 > X2 then + X1 := X1 - 1; + end if; + + X2 := X2 - Y2; + X1 := X1 - Y1; + end Sub3; + + ------------------------------- + -- Subtract_With_Ovflo_Check -- + ------------------------------- + + function Subtract_With_Ovflo_Check (X, Y : Double_Int) return Double_Int is + R : constant Double_Int := To_Int (To_Uns (X) - To_Uns (Y)); + + begin + if X >= 0 then + if Y > 0 or else R >= 0 then + return R; + end if; + + else -- X < 0 + if Y <= 0 or else R < 0 then + return R; + end if; + end if; + + Raise_Error; + end Subtract_With_Ovflo_Check; + + ---------------- + -- To_Neg_Int -- + ---------------- + + function To_Neg_Int (A : Double_Uns) return Double_Int is + R : constant Double_Int := + (if A = 2 ** (Double_Size - 1) then Double_Int'First else -To_Int (A)); + -- Note that we can't just use the expression of the Else, because it + -- overflows for A = 2 ** (Double_Size - 1). + begin + if R <= 0 then + return R; + else + Raise_Error; + end if; + end To_Neg_Int; + + ---------------- + -- To_Pos_Int -- + ---------------- + + function To_Pos_Int (A : Double_Uns) return Double_Int is + R : constant Double_Int := To_Int (A); + begin + if R >= 0 then + return R; + else + Raise_Error; + end if; + end To_Pos_Int; + +end System.Arith_Double; diff --git a/common/s-aridou.ads b/common/s-aridou.ads new file mode 100644 index 0000000..f9c03e5 --- /dev/null +++ b/common/s-aridou.ads @@ -0,0 +1,94 @@ +------------------------------------------------------------------------------ +-- -- +-- GNAT COMPILER COMPONENTS -- +-- -- +-- S Y S T E M . A R I T H _ D O U B L E -- +-- -- +-- S p e c -- +-- -- +-- Copyright (C) 1992-2020, Free Software Foundation, Inc. -- +-- -- +-- GNAT is free software; you can redistribute it and/or modify it under -- +-- terms of the GNU General Public License as published by the Free Soft- -- +-- ware Foundation; either version 3, or (at your option) any later ver- -- +-- sion. GNAT is distributed in the hope that it will be useful, but WITH- -- +-- OUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY -- +-- or FITNESS FOR A PARTICULAR PURPOSE. -- +-- -- +-- As a special exception under Section 7 of GPL version 3, you are granted -- +-- additional permissions described in the GCC Runtime Library Exception, -- +-- version 3.1, as published by the Free Software Foundation. -- +-- -- +-- You should have received a copy of the GNU General Public License and -- +-- a copy of the GCC Runtime Library Exception along with this program; -- +-- see the files COPYING3 and COPYING.RUNTIME respectively. If not, see -- +-- . -- +-- -- +-- GNAT was originally developed by the GNAT team at New York University. -- +-- Extensive contributions were provided by Ada Core Technologies Inc. -- +-- -- +------------------------------------------------------------------------------ + +-- This package provides software routines for doing arithmetic on "double" +-- signed integer values in cases where either overflow checking is required, +-- or intermediate results are longer than the result type. + +generic + + type Double_Int is range <>; + + type Double_Uns is mod <>; + + type Single_Uns is mod <>; + + with function Shift_Left (A : Double_Uns; B : Natural) return Double_Uns + is <>; + + with function Shift_Right (A : Double_Uns; B : Natural) return Double_Uns + is <>; + + with function Shift_Left (A : Single_Uns; B : Natural) return Single_Uns + is <>; + +package System.Arith_Double is + pragma Pure; + + function Add_With_Ovflo_Check (X, Y : Double_Int) return Double_Int; + -- Raises Constraint_Error if sum of operands overflows Double_Int, + -- otherwise returns the signed integer sum. + + function Subtract_With_Ovflo_Check (X, Y : Double_Int) return Double_Int; + -- Raises Constraint_Error if difference of operands overflows Double_Int, + -- otherwise returns the signed integer difference. + + function Multiply_With_Ovflo_Check (X, Y : Double_Int) return Double_Int; + pragma Convention (C, Multiply_With_Ovflo_Check); + -- Raises Constraint_Error if product of operands overflows Double_Int, + -- otherwise returns the signed integer product. Gigi may also call this + -- routine directly. + + procedure Scaled_Divide + (X, Y, Z : Double_Int; + Q, R : out Double_Int; + Round : Boolean); + -- Performs the division of (X * Y) / Z, storing the quotient in Q + -- and the remainder in R. Constraint_Error is raised if Z is zero, + -- or if the quotient does not fit in Double_Int. Round indicates if + -- the result should be rounded. If Round is False, then Q, R are + -- the normal quotient and remainder from a truncating division. + -- If Round is True, then Q is the rounded quotient. The remainder + -- R is not affected by the setting of the Round flag. + + procedure Double_Divide + (X, Y, Z : Double_Int; + Q, R : out Double_Int; + Round : Boolean); + -- Performs the division X / (Y * Z), storing the quotient in Q and + -- the remainder in R. Constraint_Error is raised if Y or Z is zero, + -- or if the quotient does not fit in Double_Int. Round indicates if the + -- result should be rounded. If Round is False, then Q, R are the normal + -- quotient and remainder from a truncating division. If Round is True, + -- then Q is the rounded quotient. The remainder R is not affected by the + -- setting of the Round flag. + +end System.Arith_Double; diff --git a/common/s-arit64.adb b/common/s-arit64.adb index ce4f75a..a4d60f2 100644 --- a/common/s-arit64.adb +++ b/common/s-arit64.adb @@ -6,7 +6,7 @@ -- -- -- B o d y -- -- -- --- Copyright (C) 1992-2013, Free Software Foundation, Inc. -- +-- Copyright (C) 1992-2020, Free Software Foundation, Inc. -- -- -- -- GNAT is free software; you can redistribute it and/or modify it under -- -- terms of the GNU General Public License as published by the Free Soft- -- @@ -29,645 +29,36 @@ -- -- ------------------------------------------------------------------------------ -with Interfaces; use Interfaces; -with Ada.Unchecked_Conversion; +with System.Arith_Double; package body System.Arith_64 is - pragma Suppress (Overflow_Check); - pragma Suppress (Range_Check); + subtype Uns64 is Interfaces.Unsigned_64; + subtype Uns32 is Interfaces.Unsigned_32; - subtype Uns64 is Unsigned_64; - function To_Uns is new Ada.Unchecked_Conversion (Int64, Uns64); - function To_Int is new Ada.Unchecked_Conversion (Uns64, Int64); + use Interfaces; - subtype Uns32 is Unsigned_32; + package Impl is new Arith_Double (Int64, Uns64, Uns32); - ----------------------- - -- Local Subprograms -- - ----------------------- + function Add_With_Ovflo_Check64 (X, Y : Int64) return Int64 + renames Impl.Add_With_Ovflo_Check; - function "+" (A, B : Uns32) return Uns64; - function "+" (A : Uns64; B : Uns32) return Uns64; - pragma Inline ("+"); - -- Length doubling additions + function Subtract_With_Ovflo_Check64 (X, Y : Int64) return Int64 + renames Impl.Subtract_With_Ovflo_Check; - function "*" (A, B : Uns32) return Uns64; - pragma Inline ("*"); - -- Length doubling multiplication + function Multiply_With_Ovflo_Check64 (X, Y : Int64) return Int64 + renames Impl.Multiply_With_Ovflo_Check; - function "/" (A : Uns64; B : Uns32) return Uns64; - pragma Inline ("/"); - -- Length doubling division - - function "rem" (A : Uns64; B : Uns32) return Uns64; - pragma Inline ("rem"); - -- Length doubling remainder - - function "&" (Hi, Lo : Uns32) return Uns64; - pragma Inline ("&"); - -- Concatenate hi, lo values to form 64-bit result - - function Le3 (X1, X2, X3 : Uns32; Y1, Y2, Y3 : Uns32) return Boolean; - -- Determines if 96 bit value X1&X2&X3 <= Y1&Y2&Y3 - - function Lo (A : Uns64) return Uns32; - pragma Inline (Lo); - -- Low order half of 64-bit value - - function Hi (A : Uns64) return Uns32; - pragma Inline (Hi); - -- High order half of 64-bit value - - procedure Sub3 (X1, X2, X3 : in out Uns32; Y1, Y2, Y3 : Uns32); - -- Computes X1&X2&X3 := X1&X2&X3 - Y1&Y1&Y3 with mod 2**96 wrap - - function To_Neg_Int (A : Uns64) return Int64; - -- Convert to negative integer equivalent. If the input is in the range - -- 0 .. 2 ** 63, then the corresponding negative signed integer (obtained - -- by negating the given value) is returned, otherwise constraint error - -- is raised. - - function To_Pos_Int (A : Uns64) return Int64; - -- Convert to positive integer equivalent. If the input is in the range - -- 0 .. 2 ** 63-1, then the corresponding non-negative signed integer is - -- returned, otherwise constraint error is raised. - - procedure Raise_Error; - pragma No_Return (Raise_Error); - -- Raise constraint error with appropriate message - - --------- - -- "&" -- - --------- - - function "&" (Hi, Lo : Uns32) return Uns64 is - begin - return Shift_Left (Uns64 (Hi), 32) or Uns64 (Lo); - end "&"; - - --------- - -- "*" -- - --------- - - function "*" (A, B : Uns32) return Uns64 is - begin - return Uns64 (A) * Uns64 (B); - end "*"; - - --------- - -- "+" -- - --------- - - function "+" (A, B : Uns32) return Uns64 is - begin - return Uns64 (A) + Uns64 (B); - end "+"; - - function "+" (A : Uns64; B : Uns32) return Uns64 is - begin - return A + Uns64 (B); - end "+"; - - --------- - -- "/" -- - --------- - - function "/" (A : Uns64; B : Uns32) return Uns64 is - begin - return A / Uns64 (B); - end "/"; - - ----------- - -- "rem" -- - ----------- - - function "rem" (A : Uns64; B : Uns32) return Uns64 is - begin - return A rem Uns64 (B); - end "rem"; - - -------------------------- - -- Add_With_Ovflo_Check -- - -------------------------- - - function Add_With_Ovflo_Check (X, Y : Int64) return Int64 is - R : constant Int64 := To_Int (To_Uns (X) + To_Uns (Y)); - - begin - if X >= 0 then - if Y < 0 or else R >= 0 then - return R; - end if; - - else -- X < 0 - if Y > 0 or else R < 0 then - return R; - end if; - end if; - - Raise_Error; - end Add_With_Ovflo_Check; - - ------------------- - -- Double_Divide -- - ------------------- - - procedure Double_Divide + procedure Scaled_Divide64 (X, Y, Z : Int64; Q, R : out Int64; Round : Boolean) - is - Xu : constant Uns64 := To_Uns (abs X); - Yu : constant Uns64 := To_Uns (abs Y); - - Yhi : constant Uns32 := Hi (Yu); - Ylo : constant Uns32 := Lo (Yu); - - Zu : constant Uns64 := To_Uns (abs Z); - Zhi : constant Uns32 := Hi (Zu); - Zlo : constant Uns32 := Lo (Zu); - - T1, T2 : Uns64; - Du, Qu, Ru : Uns64; - Den_Pos : Boolean; - - begin - if Yu = 0 or else Zu = 0 then - Raise_Error; - end if; - - -- Compute Y * Z. Note that if the result overflows 64 bits unsigned, - -- then the rounded result is clearly zero (since the dividend is at - -- most 2**63 - 1, the extra bit of precision is nice here). - - if Yhi /= 0 then - if Zhi /= 0 then - Q := 0; - R := X; - return; - else - T2 := Yhi * Zlo; - end if; - - else - T2 := (if Zhi /= 0 then Ylo * Zhi else 0); - end if; - - T1 := Ylo * Zlo; - T2 := T2 + Hi (T1); - - if Hi (T2) /= 0 then - Q := 0; - R := X; - return; - end if; + renames Impl.Scaled_Divide; - Du := Lo (T2) & Lo (T1); - - -- Set final signs (RM 4.5.5(27-30)) - - Den_Pos := (Y < 0) = (Z < 0); - - -- Check overflow case of largest negative number divided by 1 - - if X = Int64'First and then Du = 1 and then not Den_Pos then - Raise_Error; - end if; - - -- Perform the actual division - - Qu := Xu / Du; - Ru := Xu rem Du; - - -- Deal with rounding case - - if Round and then Ru > (Du - Uns64'(1)) / Uns64'(2) then - Qu := Qu + Uns64'(1); - end if; - - -- Case of dividend (X) sign positive - - if X >= 0 then - R := To_Int (Ru); - Q := (if Den_Pos then To_Int (Qu) else -To_Int (Qu)); - - -- Case of dividend (X) sign negative - - else - R := -To_Int (Ru); - Q := (if Den_Pos then -To_Int (Qu) else To_Int (Qu)); - end if; - end Double_Divide; - - -------- - -- Hi -- - -------- - - function Hi (A : Uns64) return Uns32 is - begin - return Uns32 (Shift_Right (A, 32)); - end Hi; - - --------- - -- Le3 -- - --------- - - function Le3 (X1, X2, X3 : Uns32; Y1, Y2, Y3 : Uns32) return Boolean is - begin - if X1 < Y1 then - return True; - elsif X1 > Y1 then - return False; - elsif X2 < Y2 then - return True; - elsif X2 > Y2 then - return False; - else - return X3 <= Y3; - end if; - end Le3; - - -------- - -- Lo -- - -------- - - function Lo (A : Uns64) return Uns32 is - begin - return Uns32 (A and 16#FFFF_FFFF#); - end Lo; - - ------------------------------- - -- Multiply_With_Ovflo_Check -- - ------------------------------- - - function Multiply_With_Ovflo_Check (X, Y : Int64) return Int64 is - Xu : constant Uns64 := To_Uns (abs X); - Xhi : constant Uns32 := Hi (Xu); - Xlo : constant Uns32 := Lo (Xu); - - Yu : constant Uns64 := To_Uns (abs Y); - Yhi : constant Uns32 := Hi (Yu); - Ylo : constant Uns32 := Lo (Yu); - - T1, T2 : Uns64; - - begin - if Xhi /= 0 then - if Yhi /= 0 then - Raise_Error; - else - T2 := Xhi * Ylo; - end if; - - elsif Yhi /= 0 then - T2 := Xlo * Yhi; - - else -- Yhi = Xhi = 0 - T2 := 0; - end if; - - -- Here we have T2 set to the contribution to the upper half - -- of the result from the upper halves of the input values. - - T1 := Xlo * Ylo; - T2 := T2 + Hi (T1); - - if Hi (T2) /= 0 then - Raise_Error; - end if; - - T2 := Lo (T2) & Lo (T1); - - if X >= 0 then - if Y >= 0 then - return To_Pos_Int (T2); - else - return To_Neg_Int (T2); - end if; - else -- X < 0 - if Y < 0 then - return To_Pos_Int (T2); - else - return To_Neg_Int (T2); - end if; - end if; - - end Multiply_With_Ovflo_Check; - - ----------------- - -- Raise_Error -- - ----------------- - - procedure Raise_Error is - begin - raise Constraint_Error with "64-bit arithmetic overflow"; - end Raise_Error; - - ------------------- - -- Scaled_Divide -- - ------------------- - - procedure Scaled_Divide + procedure Double_Divide64 (X, Y, Z : Int64; Q, R : out Int64; Round : Boolean) - is - Xu : constant Uns64 := To_Uns (abs X); - Xhi : constant Uns32 := Hi (Xu); - Xlo : constant Uns32 := Lo (Xu); - - Yu : constant Uns64 := To_Uns (abs Y); - Yhi : constant Uns32 := Hi (Yu); - Ylo : constant Uns32 := Lo (Yu); - - Zu : Uns64 := To_Uns (abs Z); - Zhi : Uns32 := Hi (Zu); - Zlo : Uns32 := Lo (Zu); - - D : array (1 .. 4) of Uns32; - -- The dividend, four digits (D(1) is high order) - - Qd : array (1 .. 2) of Uns32; - -- The quotient digits, two digits (Qd(1) is high order) - - S1, S2, S3 : Uns32; - -- Value to subtract, three digits (S1 is high order) - - Qu : Uns64; - Ru : Uns64; - -- Unsigned quotient and remainder - - Scale : Natural; - -- Scaling factor used for multiple-precision divide. Dividend and - -- Divisor are multiplied by 2 ** Scale, and the final remainder - -- is divided by the scaling factor. The reason for this scaling - -- is to allow more accurate estimation of quotient digits. - - T1, T2, T3 : Uns64; - -- Temporary values - - begin - -- First do the multiplication, giving the four digit dividend - - T1 := Xlo * Ylo; - D (4) := Lo (T1); - D (3) := Hi (T1); - - if Yhi /= 0 then - T1 := Xlo * Yhi; - T2 := D (3) + Lo (T1); - D (3) := Lo (T2); - D (2) := Hi (T1) + Hi (T2); - - if Xhi /= 0 then - T1 := Xhi * Ylo; - T2 := D (3) + Lo (T1); - D (3) := Lo (T2); - T3 := D (2) + Hi (T1); - T3 := T3 + Hi (T2); - D (2) := Lo (T3); - D (1) := Hi (T3); - - T1 := (D (1) & D (2)) + Uns64'(Xhi * Yhi); - D (1) := Hi (T1); - D (2) := Lo (T1); - - else - D (1) := 0; - end if; - - else - if Xhi /= 0 then - T1 := Xhi * Ylo; - T2 := D (3) + Lo (T1); - D (3) := Lo (T2); - D (2) := Hi (T1) + Hi (T2); - - else - D (2) := 0; - end if; - - D (1) := 0; - end if; - - -- Now it is time for the dreaded multiple precision division. First - -- an easy case, check for the simple case of a one digit divisor. - - if Zhi = 0 then - if D (1) /= 0 or else D (2) >= Zlo then - Raise_Error; - - -- Here we are dividing at most three digits by one digit - - else - T1 := D (2) & D (3); - T2 := Lo (T1 rem Zlo) & D (4); - - Qu := Lo (T1 / Zlo) & Lo (T2 / Zlo); - Ru := T2 rem Zlo; - end if; - - -- If divisor is double digit and too large, raise error - - elsif (D (1) & D (2)) >= Zu then - Raise_Error; - - -- This is the complex case where we definitely have a double digit - -- divisor and a dividend of at least three digits. We use the classical - -- multiple division algorithm (see section (4.3.1) of Knuth's "The Art - -- of Computer Programming", Vol. 2 for a description (algorithm D). - - else - -- First normalize the divisor so that it has the leading bit on. - -- We do this by finding the appropriate left shift amount. - - Scale := 0; - - if (Zhi and 16#FFFF0000#) = 0 then - Scale := 16; - Zu := Shift_Left (Zu, 16); - end if; - - if (Hi (Zu) and 16#FF00_0000#) = 0 then - Scale := Scale + 8; - Zu := Shift_Left (Zu, 8); - end if; - - if (Hi (Zu) and 16#F000_0000#) = 0 then - Scale := Scale + 4; - Zu := Shift_Left (Zu, 4); - end if; - - if (Hi (Zu) and 16#C000_0000#) = 0 then - Scale := Scale + 2; - Zu := Shift_Left (Zu, 2); - end if; - - if (Hi (Zu) and 16#8000_0000#) = 0 then - Scale := Scale + 1; - Zu := Shift_Left (Zu, 1); - end if; - - Zhi := Hi (Zu); - Zlo := Lo (Zu); - - -- Note that when we scale up the dividend, it still fits in four - -- digits, since we already tested for overflow, and scaling does - -- not change the invariant that (D (1) & D (2)) >= Zu. - - T1 := Shift_Left (D (1) & D (2), Scale); - D (1) := Hi (T1); - T2 := Shift_Left (0 & D (3), Scale); - D (2) := Lo (T1) or Hi (T2); - T3 := Shift_Left (0 & D (4), Scale); - D (3) := Lo (T2) or Hi (T3); - D (4) := Lo (T3); - - -- Loop to compute quotient digits, runs twice for Qd(1) and Qd(2) - - for J in 0 .. 1 loop - - -- Compute next quotient digit. We have to divide three digits by - -- two digits. We estimate the quotient by dividing the leading - -- two digits by the leading digit. Given the scaling we did above - -- which ensured the first bit of the divisor is set, this gives - -- an estimate of the quotient that is at most two too high. - - Qd (J + 1) := (if D (J + 1) = Zhi - then 2 ** 32 - 1 - else Lo ((D (J + 1) & D (J + 2)) / Zhi)); - - -- Compute amount to subtract - - T1 := Qd (J + 1) * Zlo; - T2 := Qd (J + 1) * Zhi; - S3 := Lo (T1); - T1 := Hi (T1) + Lo (T2); - S2 := Lo (T1); - S1 := Hi (T1) + Hi (T2); - - -- Adjust quotient digit if it was too high - - loop - exit when Le3 (S1, S2, S3, D (J + 1), D (J + 2), D (J + 3)); - Qd (J + 1) := Qd (J + 1) - 1; - Sub3 (S1, S2, S3, 0, Zhi, Zlo); - end loop; - - -- Now subtract S1&S2&S3 from D1&D2&D3 ready for next step - - Sub3 (D (J + 1), D (J + 2), D (J + 3), S1, S2, S3); - end loop; - - -- The two quotient digits are now set, and the remainder of the - -- scaled division is in D3&D4. To get the remainder for the - -- original unscaled division, we rescale this dividend. - - -- We rescale the divisor as well, to make the proper comparison - -- for rounding below. - - Qu := Qd (1) & Qd (2); - Ru := Shift_Right (D (3) & D (4), Scale); - Zu := Shift_Right (Zu, Scale); - end if; - - -- Deal with rounding case - - if Round and then Ru > (Zu - Uns64'(1)) / Uns64'(2) then - Qu := Qu + Uns64 (1); - end if; - - -- Set final signs (RM 4.5.5(27-30)) - - -- Case of dividend (X * Y) sign positive - - if (X >= 0 and then Y >= 0) or else (X < 0 and then Y < 0) then - R := To_Pos_Int (Ru); - Q := (if Z > 0 then To_Pos_Int (Qu) else To_Neg_Int (Qu)); - - -- Case of dividend (X * Y) sign negative - - else - R := To_Neg_Int (Ru); - Q := (if Z > 0 then To_Neg_Int (Qu) else To_Pos_Int (Qu)); - end if; - end Scaled_Divide; - - ---------- - -- Sub3 -- - ---------- - - procedure Sub3 (X1, X2, X3 : in out Uns32; Y1, Y2, Y3 : Uns32) is - begin - if Y3 > X3 then - if X2 = 0 then - X1 := X1 - 1; - end if; - - X2 := X2 - 1; - end if; - - X3 := X3 - Y3; - - if Y2 > X2 then - X1 := X1 - 1; - end if; - - X2 := X2 - Y2; - X1 := X1 - Y1; - end Sub3; - - ------------------------------- - -- Subtract_With_Ovflo_Check -- - ------------------------------- - - function Subtract_With_Ovflo_Check (X, Y : Int64) return Int64 is - R : constant Int64 := To_Int (To_Uns (X) - To_Uns (Y)); - - begin - if X >= 0 then - if Y > 0 or else R >= 0 then - return R; - end if; - - else -- X < 0 - if Y <= 0 or else R < 0 then - return R; - end if; - end if; - - Raise_Error; - end Subtract_With_Ovflo_Check; - - ---------------- - -- To_Neg_Int -- - ---------------- - - function To_Neg_Int (A : Uns64) return Int64 is - R : constant Int64 := -To_Int (A); - - begin - if R <= 0 then - return R; - else - Raise_Error; - end if; - end To_Neg_Int; - - ---------------- - -- To_Pos_Int -- - ---------------- - - function To_Pos_Int (A : Uns64) return Int64 is - R : constant Int64 := To_Int (A); - - begin - if R >= 0 then - return R; - else - Raise_Error; - end if; - end To_Pos_Int; + renames Impl.Double_Divide; end System.Arith_64; diff --git a/common/s-arit64.ads b/common/s-arit64.ads index 4eb1153..90d5c25 100644 --- a/common/s-arit64.ads +++ b/common/s-arit64.ads @@ -6,7 +6,7 @@ -- -- -- S p e c -- -- -- --- Copyright (C) 1992-2012, Free Software Foundation, Inc. -- +-- Copyright (C) 1992-2020, Free Software Foundation, Inc. -- -- -- -- GNAT is free software; you can redistribute it and/or modify it under -- -- terms of the GNU General Public License as published by the Free Soft- -- @@ -43,42 +43,54 @@ package System.Arith_64 is subtype Int64 is Interfaces.Integer_64; - function Add_With_Ovflo_Check (X, Y : Int64) return Int64; + function Add_With_Ovflo_Check64 (X, Y : Int64) return Int64; -- Raises Constraint_Error if sum of operands overflows 64 bits, -- otherwise returns the 64-bit signed integer sum. - function Subtract_With_Ovflo_Check (X, Y : Int64) return Int64; + function Subtract_With_Ovflo_Check64 (X, Y : Int64) return Int64; -- Raises Constraint_Error if difference of operands overflows 64 -- bits, otherwise returns the 64-bit signed integer difference. - function Multiply_With_Ovflo_Check (X, Y : Int64) return Int64; - pragma Export (C, Multiply_With_Ovflo_Check, "__gnat_mulv64"); + function Multiply_With_Ovflo_Check64 (X, Y : Int64) return Int64; + pragma Export (C, Multiply_With_Ovflo_Check64, "__gnat_mulv64"); -- Raises Constraint_Error if product of operands overflows 64 -- bits, otherwise returns the 64-bit signed integer product. - -- GIGI may also call this routine directly. + -- Gigi may also call this routine directly. - procedure Scaled_Divide + procedure Scaled_Divide64 (X, Y, Z : Int64; Q, R : out Int64; Round : Boolean); -- Performs the division of (X * Y) / Z, storing the quotient in Q -- and the remainder in R. Constraint_Error is raised if Z is zero, - -- or if the quotient does not fit in 64-bits. Round indicates if + -- or if the quotient does not fit in 64 bits. Round indicates if -- the result should be rounded. If Round is False, then Q, R are -- the normal quotient and remainder from a truncating division. -- If Round is True, then Q is the rounded quotient. The remainder -- R is not affected by the setting of the Round flag. - procedure Double_Divide + procedure Scaled_Divide + (X, Y, Z : Int64; + Q, R : out Int64; + Round : Boolean) renames Scaled_Divide64; + -- Renamed procedure to preserve compatibility with earlier versions + + procedure Double_Divide64 (X, Y, Z : Int64; Q, R : out Int64; Round : Boolean); -- Performs the division X / (Y * Z), storing the quotient in Q and -- the remainder in R. Constraint_Error is raised if Y or Z is zero, - -- or if the quotient does not fit in 64-bits. Round indicates if the + -- or if the quotient does not fit in 64 bits. Round indicates if the -- result should be rounded. If Round is False, then Q, R are the normal -- quotient and remainder from a truncating division. If Round is True, -- then Q is the rounded quotient. The remainder R is not affected by the -- setting of the Round flag. + procedure Double_Divide + (X, Y, Z : Int64; + Q, R : out Int64; + Round : Boolean) renames Double_Divide64; + -- Renamed procedure to preserve compatibility with earlier versions + end System.Arith_64; From c4adccffb382339662e0cb0d4a1e455e1af98330 Mon Sep 17 00:00:00 2001 From: Simon Wright Date: Sat, 20 Feb 2021 18:13:02 +0000 Subject: [PATCH 03/10] Main update for GCC 11. * INSTALL.md (Compiler release): Include choices for GCC 11 (and GCC 10!) . * common/a-cobove.adb: wildcard selection of warning message to suppress, now that GCC includes quotations round "others". * common/a-cobove.ads (Vector.Elements): don't preset (others => <> fails if Element_Type doesn't have preelaborable initialization). * common/a-cohata.ads (Hash_Table_Type.Nodes): likewise, for Nodes_Type. * common/s-arit64.ads: added renamings to support Ada.Real_Time: {Add,Subtract,Multiply}With_Ovflow_Check64. * common/s-stalib.ads: import changes from FSF GCC 11, mainly removal of pragma Polling. * common/math/a-numeri.ads (["03C0"]): commented out, not supported - ? * stm32f4/build_runtime.gpr (Languages): add ASM. * stm32f4/adainclude/interrupt_vectors.s: new. * stm32f4/adainclude/startup.adb (Dummy_Handler): removed. (Handler): removed. (Vectors): removed, now in interrupt_vectors.s. * stm32f4/adalib/stm32f407-flash.ld (.isr_vector): moved into .text, no longer defines the initial stack pointer or entry point; now in interrupt_vectors.s. --- INSTALL.md | 2 + common/a-cobove.adb | 4 +- common/a-cobove.ads | 4 +- common/a-cohata.ads | 4 +- common/math/a-numeri.ads | 5 +- common/s-arit64.ads | 16 +++++- common/s-stalib.ads | 37 ++++++++------ stm32f4/adainclude/interrupt_vectors.s | 71 ++++++++++++++++++++++++++ stm32f4/adainclude/startup.adb | 58 ++++++--------------- stm32f4/adalib/stm32f407-flash.ld | 17 +++--- stm32f4/build_runtime.gpr | 2 +- 11 files changed, 142 insertions(+), 78 deletions(-) create mode 100644 stm32f4/adainclude/interrupt_vectors.s diff --git a/INSTALL.md b/INSTALL.md index c484969..0516d83 100644 --- a/INSTALL.md +++ b/INSTALL.md @@ -29,6 +29,8 @@ Values for `RELEASE` are as below: | FSF GCC 7 | `gcc7` | | FSF GCC 8 | `gcc8` | | FSF GCC 9 | `gcc8` | +| FSF GCC 10 | `gcc8` | +| FSF GCC 11 | `gnat-ce-2020` | | GNAT GPL 2016 | `gcc6` | | GNAT GPL 2017 | `gnat-gpl-2017` | | GNAT CE 2018 | `gcc8` | diff --git a/common/a-cobove.adb b/common/a-cobove.adb index 386b9db..ee9884e 100644 --- a/common/a-cobove.adb +++ b/common/a-cobove.adb @@ -6,7 +6,7 @@ -- -- -- B o d y -- -- -- --- Copyright (C) 2004-2013, 2016, Free Software Foundation, Inc. -- +-- Copyright (C) 2004-2021, Free Software Foundation, Inc. -- -- -- -- GNAT is free software; you can redistribute it and/or modify it under -- -- terms of the GNU General Public License as published by the Free Soft- -- @@ -40,7 +40,7 @@ with System; use type System.Address; package body Ada.Containers.Bounded_Vectors is - pragma Warnings (Off, "others choice is redundant"); + pragma Warnings (Off, "*others* choice is redundant"); ----------------------- -- Local Subprograms -- diff --git a/common/a-cobove.ads b/common/a-cobove.ads index 4d72f5f..b115f96 100644 --- a/common/a-cobove.ads +++ b/common/a-cobove.ads @@ -6,7 +6,7 @@ -- -- -- S p e c -- -- -- --- Copyright (C) 2004-2013, 2016, Free Software Foundation, Inc. -- +-- Copyright (C) 2004-2021, Free Software Foundation, Inc. -- -- -- -- This specification is derived from the Ada Reference Manual for use with -- -- GNAT. The copyright notice above, and the license provisions that follow -- @@ -378,7 +378,7 @@ private function "=" (L, R : Elements_Array) return Boolean is abstract; type Vector (Capacity : Count_Type) is tagged record - Elements : Elements_Array (1 .. Capacity) := (others => <>); + Elements : Elements_Array (1 .. Capacity); Last : Extended_Index := No_Index; -- Busy : Natural := 0; -- Lock : Natural := 0; diff --git a/common/a-cohata.ads b/common/a-cohata.ads index 1a77970..9ea6fe9 100644 --- a/common/a-cohata.ads +++ b/common/a-cohata.ads @@ -6,7 +6,7 @@ -- -- -- S p e c -- -- -- --- Copyright (C) 2004-2011, Free Software Foundation, Inc. -- +-- Copyright (C) 2004-2021, Free Software Foundation, Inc. -- -- -- -- GNAT is free software; you can redistribute it and/or modify it under -- -- terms of the GNU General Public License as published by the Free Soft- -- @@ -68,7 +68,7 @@ package Ada.Containers.Hash_Tables is Busy : Natural := 0; Lock : Natural := 0; Free : Count_Type'Base := -1; - Nodes : Nodes_Type (1 .. Capacity) := (others => <>); + Nodes : Nodes_Type (1 .. Capacity); Buckets : Buckets_Type (1 .. Modulus) := (others => 0); end record; end Generic_Bounded_Hash_Table_Types; diff --git a/common/math/a-numeri.ads b/common/math/a-numeri.ads index 805fa56..6304ce1 100644 --- a/common/math/a-numeri.ads +++ b/common/math/a-numeri.ads @@ -21,10 +21,13 @@ package Ada.Numerics is Pi : constant := 3.14159_26535_89793_23846_26433_83279_50288_41971_69399_37511; - ["03C0"] : constant := Pi; + -- ["03C0"] : constant := Pi; -- This is the Greek letter Pi (for Ada 2005 AI-388). Note that it is -- conforming to have this constant present even in Ada 95 mode, as there -- is no way for a normal mode Ada 95 program to reference this identifier. + -- ???This is removed for now, because nobody uses it, and it causes + -- trouble for tools other than the compiler. If people want to use the + -- Greek letter in their programs, they can easily define it themselves. e : constant := 2.71828_18284_59045_23536_02874_71352_66249_77572_47093_69996; diff --git a/common/s-arit64.ads b/common/s-arit64.ads index 90d5c25..8b5c623 100644 --- a/common/s-arit64.ads +++ b/common/s-arit64.ads @@ -6,7 +6,7 @@ -- -- -- S p e c -- -- -- --- Copyright (C) 1992-2020, Free Software Foundation, Inc. -- +-- Copyright (C) 1992-2021, Free Software Foundation, Inc. -- -- -- -- GNAT is free software; you can redistribute it and/or modify it under -- -- terms of the GNU General Public License as published by the Free Soft- -- @@ -33,6 +33,8 @@ -- signed integer values in cases where either overflow checking is -- required, or intermediate results are longer than 64 bits. +-- For Cortex GNAT RTS, re-imported from the FSF GCC 11 release. + pragma Restrictions (No_Elaboration_Code); -- Allow direct call from gigi generated code @@ -47,16 +49,28 @@ package System.Arith_64 is -- Raises Constraint_Error if sum of operands overflows 64 bits, -- otherwise returns the 64-bit signed integer sum. + function Add_With_Ovflo_Check (X, Y : Int64) return Int64 + renames Add_With_Ovflo_Check64; + -- Renamed subprogram to preserve compatibility with earlier versions + function Subtract_With_Ovflo_Check64 (X, Y : Int64) return Int64; -- Raises Constraint_Error if difference of operands overflows 64 -- bits, otherwise returns the 64-bit signed integer difference. + function Subtract_With_Ovflo_Check (X, Y : Int64) return Int64 + renames Subtract_With_Ovflo_Check64; + -- Renamed subprogram to preserve compatibility with earlier versions + function Multiply_With_Ovflo_Check64 (X, Y : Int64) return Int64; pragma Export (C, Multiply_With_Ovflo_Check64, "__gnat_mulv64"); -- Raises Constraint_Error if product of operands overflows 64 -- bits, otherwise returns the 64-bit signed integer product. -- Gigi may also call this routine directly. + function Multiply_With_Ovflo_Check (X, Y : Int64) return Int64 + renames Multiply_With_Ovflo_Check64; + -- Renamed subprogram to preserve compatibility with earlier versions + procedure Scaled_Divide64 (X, Y, Z : Int64; Q, R : out Int64; diff --git a/common/s-stalib.ads b/common/s-stalib.ads index 28b16d8..ad3b526 100644 --- a/common/s-stalib.ads +++ b/common/s-stalib.ads @@ -6,7 +6,7 @@ -- -- -- S p e c -- -- -- --- Copyright (C) 1992-2013, 2016, Free Software Foundation, Inc. -- +-- Copyright (C) 1992-2020, Free Software Foundation, Inc. -- -- -- -- GNAT is free software; you can redistribute it and/or modify it under -- -- terms of the GNU General Public License as published by the Free Soft- -- @@ -47,10 +47,6 @@ pragma Restrictions (No_Elaboration_Code); pragma Compiler_Unit_Warning; -pragma Polling (Off); --- We must turn polling off for this unit, because otherwise we get --- elaboration circularities with Ada.Exceptions if polling is on. - with Ada.Unchecked_Conversion; package System.Standard_Library is @@ -106,7 +102,6 @@ package System.Standard_Library is Lang : Character; -- A character indicating the language raising the exception. -- Set to "A" for exceptions defined by an Ada program. - -- Set to "V" for imported VMS exceptions. -- Set to "C" for imported C++ exceptions. Name_Length : Natural; @@ -122,9 +117,8 @@ package System.Standard_Library is -- identities and names. Foreign_Data : Address; - -- Data for imported exceptions. This represents the exception code - -- for the handling of Import/Export_Exception for the VMS case. - -- This represents the address of the RTTI for the C++ case. + -- Data for imported exceptions. Not used in the Ada case. This + -- represents the address of the RTTI for the C++ case. Raise_Hook : Raise_Action; -- This field can be used to place a "hook" on an exception. If the @@ -222,12 +216,23 @@ package System.Standard_Library is -- This is the default behavior. Every_Raise, - -- Denotes every possible raise event, either explicit or due to - -- a specific language rule, within the context of a task or not. - - Unhandled_Raise - -- Denotes the raise events corresponding to exceptions for which - -- there is no user defined handler. + -- Denotes the initial raise event for any exception occurrence, either + -- explicit or due to a specific language rule, within the context of a + -- task or not. + + Unhandled_Raise, + -- Denotes the raise events corresponding to exceptions for which there + -- is no user defined handler. This includes unhandled exceptions in + -- task bodies. + + Unhandled_Raise_In_Main + -- Same as Unhandled_Raise, except exceptions in task bodies are not + -- included. Same as RM_Convention, except (1) the message is printed as + -- soon as the environment task completes due to an unhandled exception + -- (before awaiting the termination of dependent tasks, and before + -- library-level finalization), and (2) a symbolic traceback is given + -- if possible. This is the default behavior if the binder switch -E is + -- used. ); -- Provide a way to denote different kinds of automatic traces related -- to exceptions that can be requested. @@ -243,7 +248,7 @@ package System.Standard_Library is -- procedure Abort_Undefer_Direct; -- pragma Inline (Abort_Undefer_Direct); -- -- A little procedure that just calls Abort_Undefer.all, for use in - -- clean up procedures, which only permit a simple subprogram name. + -- -- clean up procedures, which only permit a simple subprogram name. -- procedure Adafinal; -- Performs the Ada Runtime finalization the first time it is invoked. diff --git a/stm32f4/adainclude/interrupt_vectors.s b/stm32f4/adainclude/interrupt_vectors.s new file mode 100644 index 0000000..2bec017 --- /dev/null +++ b/stm32f4/adainclude/interrupt_vectors.s @@ -0,0 +1,71 @@ + @ Copyright (C) 2021 Free Software Foundation, Inc. + + @ This file is part of the Cortex GNAT RTS project. This file is + @ free software; you can redistribute it and/or modify it under + @ terms of the GNU General Public License as published by the Free + @ Software Foundation; either version 3, or (at your option) any + @ later version. This file is distributed in the hope that it will + @ be useful, but WITHOUT ANY WARRANTY; without even the implied + @ warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. + + @ As a special exception under Section 7 of GPL version 3, you are + @ granted additional permissions described in the GCC Runtime + @ Library Exception, version 3.1, as published by the Free Software + @ Foundation. + + @ You should have received a copy of the GNU General Public License + @ and a copy of the GCC Runtime Library Exception along with this + @ program; see the files COPYING3 and COPYING.RUNTIME respectively. + @ If not, see . + + @ This is the Vector Table, described in STM32F4xxxx Reference + @ Manual DocID018909 Rev 11 Table 62. + + @ The capitalized handlers are defined in startup.adb, using + @ weak symbols (they can't be defined here, unlike _fault, or + @ the linker satisfies the requirement immediately). + + .syntax unified + .cpu cortex-m4 + .thumb + + .text + .section .isr_vector + .align 2 + .global _isr_vector + .type _isr_vector, %object + +_isr_vector: + /* Startup */ + .word _estack /* top of stack, from linker script. */ + .word program_initialization /* entry point */ + + /* Cortex-M core interrupts */ + .word _fault /* -14 NMI. */ + .word HardFault_Handler /* -13 Hard fault. */ + .word _fault /* -12 Mem manage. */ + .word _fault /* -11 Bus fault. */ + .word _fault /* -10 Usage fault. */ + .word _fault /* -9 reserved. */ + .word _fault /* -8 reserved. */ + .word _fault /* -7 reserved. */ + .word _fault /* -6 reserved. */ + .word SVC_Handler /* -5 SVCall. */ + .word _fault /* -4 Breakpoint. */ + .word _fault /* -3 reserved. */ + .word PendSV_Handler /* -2 PendSV. */ + .word SysTick_Handler /* -1 Systick. */ + + /* MCU interrupts, 0 .. 81 (to match System.Interrupts.Interrupt_ID */ + .rept 82 + .word IRQ_Handler + .endr + .size _isr_vector, . - _isr_vector + + .section .text + + .thumb_func + .type _fault, %function +_fault: b _fault + .size _fault, . - _fault + diff --git a/stm32f4/adainclude/startup.adb b/stm32f4/adainclude/startup.adb index 254b489..63fd891 100644 --- a/stm32f4/adainclude/startup.adb +++ b/stm32f4/adainclude/startup.adb @@ -1,4 +1,4 @@ --- Copyright (C) 2016-2018 Free Software Foundation, Inc. +-- Copyright (C) 2016-2021 Free Software Foundation, Inc. -- -- This file is part of the Cortex GNAT RTS project. This file is -- free software; you can redistribute it and/or modify it under @@ -18,7 +18,6 @@ -- program; see the files COPYING3 and COPYING.RUNTIME respectively. -- If not, see . -with Ada.Interrupts.Names; with Interfaces; with System.Machine_Code; with System.Parameters; @@ -67,6 +66,8 @@ package body Startup is -- _edata: the first address after read/write data in SRAM -- _sbss: the start of BSS (to be initialized to zero) -- _ebss: the first address after BSS. + -- + -- _isr_vector is set up in interrupt_vectors.s. use System.Storage_Elements; @@ -144,29 +145,19 @@ package body Startup is System.FreeRTOS.Tasks.Start_Scheduler; end Program_Initialization; - ------------------------- - -- Interrupt vectors -- - ------------------------- + -------------------------- + -- Interrupt Handlers -- + -------------------------- - -- Vector Table, STM32F4xxxx Reference Manual DocID018909 Rev 11 - -- Table 62. + -- The interrupt vector is set up in interrupt_vectors.s, using + -- the handlers defined here. - procedure Dummy_Handler; - procedure Dummy_Handler is - IPSR : Interfaces.Unsigned_32 - with Volatile; -- don't want it to be optimised away - begin - System.Machine_Code.Asm - ("mrs %0, ipsr", - Outputs => Interfaces.Unsigned_32'Asm_Output ("=r", IPSR), - Volatile => True); - loop - null; - end loop; - end Dummy_Handler; + -- These handlers are all defined as Weak so that they can be + -- replaced by real handlers at link time. - -- The remaining handlers are all defined as Weak so that they can - -- be replaced by real handlers at link time. + -- If we defined the weak handlers in interrupt_vectors.s, the + -- references would be satisfied internally and so couldn't be + -- replaced by the real handler. procedure HardFault_Handler with Export, Convention => Ada, External_Name => "HardFault_Handler"; @@ -178,6 +169,7 @@ package body Startup is end loop; end HardFault_Handler; + -- Provided by FreeRTOS. procedure SVC_Handler with Export, Convention => Ada, External_Name => "SVC_Handler"; pragma Weak_External (SVC_Handler); @@ -188,6 +180,7 @@ package body Startup is end loop; end SVC_Handler; + -- Provided by FreeRTOS. procedure PendSV_Handler with Export, Convention => Ada, External_Name => "PendSV_Handler"; pragma Weak_External (PendSV_Handler); @@ -198,6 +191,7 @@ package body Startup is end loop; end PendSV_Handler; + -- Provided by FreeRTOS. procedure SysTick_Handler with Export, Convention => Ada, External_Name => "SysTick_Handler"; pragma Weak_External (SysTick_Handler); @@ -226,24 +220,4 @@ package body Startup is end loop; end IRQ_Handler; - type Handler is access procedure; - - use type Ada.Interrupts.Interrupt_ID; - Vectors : array (-14 .. Ada.Interrupts.Names.FPU_IRQ) of Handler := - (-9 .. -6 | -4 .. -3 => null, -- reserved - -14 => Dummy_Handler'Access, -- NMI - -13 => HardFault_Handler'Access, -- HardFault - -12 => Dummy_Handler'Access, -- MemManagement - -11 => Dummy_Handler'Access, -- BusFault - -10 => Dummy_Handler'Access, -- UsageFault - -5 => SVC_Handler'Access, -- SVCall - -2 => PendSV_Handler'Access, -- PendSV - -1 => SysTick_Handler'Access, -- SysTick - others => IRQ_Handler'Access) - with - Export, - Convention => Ada, - External_Name => "isr_vector"; - pragma Linker_Section (Vectors, ".isr_vector"); - end Startup; diff --git a/stm32f4/adalib/stm32f407-flash.ld b/stm32f4/adalib/stm32f407-flash.ld index e665c45..82e4cad 100644 --- a/stm32f4/adalib/stm32f407-flash.ld +++ b/stm32f4/adalib/stm32f407-flash.ld @@ -1,6 +1,7 @@ /* The MIT License * * Copyright (c) 2007, 2008, 2009, 2010 Dado Sutter and Bogdan Marinescu + * Copyright (c) 2012-2020 Simon Wright * * Permission is hereby granted, free of charge, to any person obtaining * a copy of this software and associated documentation files (the @@ -50,6 +51,8 @@ EXTERN(_init) START_OFFSET = DEFINED (START_OFFSET) ? START_OFFSET : 0; +/* Pick up the interrupt vectors from interrupt_vectors.s */ + MEMORY { flash (RX) : ORIGIN = 0x08000000 + START_OFFSET, @@ -60,20 +63,12 @@ MEMORY SECTIONS { - .isr_vector : - { - . = ALIGN(4); - _isr_vector = .; - LONG(_estack) - LONG(program_initialization + 1) - KEEP(*(.isr_vector)) - } > flash - .text : { . = ALIGN(4); - /* _text = .; */ - /* PROVIDE(stext = .);*/ + *(.isr_vector) + . = ALIGN(512); + *(.text) *(.text.*) *(.gnu.linkonce.t.*) diff --git a/stm32f4/build_runtime.gpr b/stm32f4/build_runtime.gpr index aff663f..62c8555 100644 --- a/stm32f4/build_runtime.gpr +++ b/stm32f4/build_runtime.gpr @@ -21,7 +21,7 @@ with "../FreeRTOS"; library project Build_Runtime is - for Languages use ("Ada", "C"); + for Languages use ("Ada", "C", "ASM"); for Library_Auto_Init use "False"; for Library_Name use "gnat"; From ea815f3331fd669545d313ef0f74761abfd2251d Mon Sep 17 00:00:00 2001 From: Simon Wright Date: Tue, 23 Feb 2021 10:46:52 +0000 Subject: [PATCH 04/10] Hardfault_Handling renamed. gprbuild doesn't recognise files with names that don't match the GNAT naming stndard, specifically s-*, as being part of the RTS, so executes a fruitless rebuild every time. * common/hardfault_handling.ads: renamed to s-harhan.ads. * common/hardfault_handling.adb: renamed to s-harhan.adb. --- common/{hardfault_handling.adb => s-harhan.adb} | 6 +++--- common/{hardfault_handling.ads => s-harhan.ads} | 6 +++--- 2 files changed, 6 insertions(+), 6 deletions(-) rename common/{hardfault_handling.adb => s-harhan.adb} (97%) rename common/{hardfault_handling.ads => s-harhan.ads} (91%) diff --git a/common/hardfault_handling.adb b/common/s-harhan.adb similarity index 97% rename from common/hardfault_handling.adb rename to common/s-harhan.adb index 84d704d..0ca8f7f 100644 --- a/common/hardfault_handling.adb +++ b/common/s-harhan.adb @@ -1,4 +1,4 @@ --- Copyright (C) 2017-2018 Free Software Foundation, Inc. +-- Copyright (C) 2017-2020 Free Software Foundation, Inc. -- -- This file is part of the Cortex GNAT RTS project. This file is -- free software; you can redistribute it and/or modify it under @@ -25,7 +25,7 @@ with Interfaces; with System.Machine_Code; -package body Hardfault_Handling is +package body System.Hardfault_Handling is procedure Handler is begin @@ -184,4 +184,4 @@ package body Hardfault_Handling is System.Machine_Code.Asm ("bkpt #0" & ASCII.LF, Volatile => True); end Breakpoint; -end Hardfault_Handling; +end System.Hardfault_Handling; diff --git a/common/hardfault_handling.ads b/common/s-harhan.ads similarity index 91% rename from common/hardfault_handling.ads rename to common/s-harhan.ads index 1faf6d0..723a72c 100644 --- a/common/hardfault_handling.ads +++ b/common/s-harhan.ads @@ -1,4 +1,4 @@ --- Copyright (C) 2017 Free Software Foundation, Inc. +-- Copyright (C) 2017-2020 Free Software Foundation, Inc. -- -- This file is part of the Cortex GNAT RTS project. This file is -- free software; you can redistribute it and/or modify it under @@ -18,7 +18,7 @@ -- program; see the files COPYING3 and COPYING.RUNTIME respectively. -- If not, see . -package Hardfault_Handling is +package System.Hardfault_Handling is -- Normally, we'd mark this unit as preelaborable, but that would -- mean that the binder-generated code wouldn't reference it, so @@ -32,4 +32,4 @@ package Hardfault_Handling is External_Name => "HardFault_Handler"; pragma Machine_Attribute (Handler, "naked"); -end Hardfault_Handling; +end System.Hardfault_Handling; From 217caea5a71910b7510b6745ef10768ab7781047 Mon Sep 17 00:00:00 2001 From: Simon Wright Date: Mon, 8 Mar 2021 12:07:13 +0000 Subject: [PATCH 05/10] For microbit, only include needed SVD-generated files. * microbit/Makefile: 'all:' target doesn't need nrf51/. * microbit/README: removed, replaced by README.md. * microbit/README.md: edited from README. * microbit/adainclude/nrf51-clock.ads: regenerated, moved from nrf51/. * microbit/adainclude/nrf51-rtc.ads: likewise. * microbit/adainclude/nrf51.ads: likewise. * microbit/nrf51/: removed. --- microbit/Makefile | 2 +- microbit/README | 34 - microbit/README.md | 19 + .../{nrf51 => adainclude}/nrf51-clock.ads | 93 +- microbit/{nrf51 => adainclude}/nrf51-rtc.ads | 65 +- microbit/{nrf51 => adainclude}/nrf51.ads | 1 - microbit/nrf51/nrf51-aar.ads | 370 ---- microbit/nrf51/nrf51-adc.ads | 395 ---- microbit/nrf51/nrf51-amli.ads | 419 ----- microbit/nrf51/nrf51-ccm.ads | 425 ----- microbit/nrf51/nrf51-ecb.ads | 241 --- microbit/nrf51/nrf51-ficr.ads | 273 --- microbit/nrf51/nrf51-gpio.ads | 497 ----- microbit/nrf51/nrf51-gpiote.ads | 375 ---- microbit/nrf51/nrf51-lpcomp.ads | 642 ------- microbit/nrf51/nrf51-mpu.ads | 531 ------ microbit/nrf51/nrf51-nvmc.ads | 201 -- microbit/nrf51/nrf51-power.ads | 704 ------- microbit/nrf51/nrf51-ppi.ads | 575 ------ microbit/nrf51/nrf51-qdec.ads | 602 ------ microbit/nrf51/nrf51-radio.ads | 1627 ----------------- microbit/nrf51/nrf51-rng.ads | 258 --- microbit/nrf51/nrf51-spi.ads | 323 ---- microbit/nrf51/nrf51-spim.ads | 622 ------- microbit/nrf51/nrf51-spis.ads | 603 ------ microbit/nrf51/nrf51-swi.ads | 65 - microbit/nrf51/nrf51-temp.ads | 185 -- microbit/nrf51/nrf51-timer.ads | 494 ----- microbit/nrf51/nrf51-twi.ads | 732 -------- microbit/nrf51/nrf51-uart.ads | 777 -------- microbit/nrf51/nrf51-uicr.ads | 197 -- microbit/nrf51/nrf51-wdt.ads | 521 ------ 32 files changed, 98 insertions(+), 12770 deletions(-) delete mode 100644 microbit/README create mode 100644 microbit/README.md rename microbit/{nrf51 => adainclude}/nrf51-clock.ads (92%) rename microbit/{nrf51 => adainclude}/nrf51-rtc.ads (93%) rename microbit/{nrf51 => adainclude}/nrf51.ads (99%) delete mode 100644 microbit/nrf51/nrf51-aar.ads delete mode 100644 microbit/nrf51/nrf51-adc.ads delete mode 100644 microbit/nrf51/nrf51-amli.ads delete mode 100644 microbit/nrf51/nrf51-ccm.ads delete mode 100644 microbit/nrf51/nrf51-ecb.ads delete mode 100644 microbit/nrf51/nrf51-ficr.ads delete mode 100644 microbit/nrf51/nrf51-gpio.ads delete mode 100644 microbit/nrf51/nrf51-gpiote.ads delete mode 100644 microbit/nrf51/nrf51-lpcomp.ads delete mode 100644 microbit/nrf51/nrf51-mpu.ads delete mode 100644 microbit/nrf51/nrf51-nvmc.ads delete mode 100644 microbit/nrf51/nrf51-power.ads delete mode 100644 microbit/nrf51/nrf51-ppi.ads delete mode 100644 microbit/nrf51/nrf51-qdec.ads delete mode 100644 microbit/nrf51/nrf51-radio.ads delete mode 100644 microbit/nrf51/nrf51-rng.ads delete mode 100644 microbit/nrf51/nrf51-spi.ads delete mode 100644 microbit/nrf51/nrf51-spim.ads delete mode 100644 microbit/nrf51/nrf51-spis.ads delete mode 100644 microbit/nrf51/nrf51-swi.ads delete mode 100644 microbit/nrf51/nrf51-temp.ads delete mode 100644 microbit/nrf51/nrf51-timer.ads delete mode 100644 microbit/nrf51/nrf51-twi.ads delete mode 100644 microbit/nrf51/nrf51-uart.ads delete mode 100644 microbit/nrf51/nrf51-uicr.ads delete mode 100644 microbit/nrf51/nrf51-wdt.ads diff --git a/microbit/Makefile b/microbit/Makefile index 75a0070..bad6eb6 100644 --- a/microbit/Makefile +++ b/microbit/Makefile @@ -18,7 +18,7 @@ SVD2ADA ?= ~/adacore/svd2ada -all: nrf51 +all: gprbuild -p -P build_runtime.gpr nrf51: diff --git a/microbit/README b/microbit/README deleted file mode 100644 index 255a2f6..0000000 --- a/microbit/README +++ /dev/null @@ -1,34 +0,0 @@ -This is an Ada Runtime System (RTS) for the GCC Ada compiler (GNAT), -targeted to the BBC micro:bit board (see http://microbit.org/). - -The RTS supports Ravenscar tasking. Package System contains the -following additional restrictions: - - pragma Restrictions (No_Exception_Propagation); - pragma Restrictions (No_Finalization); - -Aside from the limitations imposed by the small RAM size of the -micro:bit (16K), the system clock runs at 100 Hz rather than the 1000 -Hz used in the other RTSs in this family. - -The RTS is intended to support commercial binary distributions. The -Ada source code has either been derived from FSF GCC (4.9.1, in some -cases later) or written for this work; see the files COPYING3 and -COPYING.RUNTIME. - -The RTS is based on FreeRTOS[1]. See COPYING.FreeRTOS. - -Board support (spec files only) is generated using svd2ada[2] from the -Nordic SVD. See COPYING.Nordic. - -The following non-original files don't form part of a binary -deliverable, so don't affect the status of the binary: - -o build_runtime.gpr and runtime.xml originated in AdaCore's GNAT GPL - 2014 arm-eabi distribution (for Linux). - -o The linker script nrf51.ld is under an MIT licence: see - COPYING.MIT. - -[1] http://www.freertos.org -[2] https://github.com/AdaCore/svd2ada diff --git a/microbit/README.md b/microbit/README.md new file mode 100644 index 0000000..1ea01eb --- /dev/null +++ b/microbit/README.md @@ -0,0 +1,19 @@ +This is an Ada Runtime System (RTS) for the GCC Ada compiler (GNAT), targeted to the [BBC micro:bit board](http://microbit.org/). + +The RTS supports Ravenscar tasking. Package System contains the following additional restrictions: + +* `pragma Restrictions (No_Exception_Propagation);` +* `pragma Restrictions (No_Finalization);` + +Aside from the limitations imposed by the small RAM size of the micro:bit (16K), the system clock runs at 100 Hz rather than the 1000 Hz used in the other RTSs in this family. + +The RTS is intended to support commercial binary distributions. The Ada source code has either been derived from FSF GCC (4.9.1, in some cases later) or written for this work; see the files `COPYING3` and `COPYING.RUNTIME`. + +The RTS is based on [FreeRTOS]( http://www.freertos.org). See `COPYING.FreeRTOS`. + +Board support (spec files only) was generated using [svd2ada](https://github.com/AdaCore/svd2ada) at commit `861c829` from the Nordic SVD. See `COPYING.Nordic`. + +The following non-original files don't form part of a binary deliverable, so don't affect the status of the binary: + +* `build_runtime.gpr` and `runtime.xml` originated in AdaCore's GNAT GPL 2014 arm-eabi distribution (for Linux). +* The linker script `nrf51.ld` is under an MIT licence: see COPYING.MIT. diff --git a/microbit/nrf51/nrf51-clock.ads b/microbit/adainclude/nrf51-clock.ads similarity index 92% rename from microbit/nrf51/nrf51-clock.ads rename to microbit/adainclude/nrf51-clock.ads index 77c8d05..8187274 100644 --- a/microbit/nrf51/nrf51-clock.ads +++ b/microbit/adainclude/nrf51-clock.ads @@ -1,4 +1,3 @@ -pragma Ada_2012; pragma Style_Checks (Off); -- Copyright (c) 2013, Nordic Semiconductor ASA @@ -57,12 +56,12 @@ package nrf51.CLOCK is -- Enable interrupt on HFCLKSTARTED event. type INTENSET_HFCLKSTARTED_Field_1 is (-- Reset value for the field - Intenset_Hfclkstarted_Field_Reset, + INTENSET_HFCLKSTARTED_Field_Reset, -- Enable interrupt on write. Set) with Size => 1; for INTENSET_HFCLKSTARTED_Field_1 use - (Intenset_Hfclkstarted_Field_Reset => 0, + (INTENSET_HFCLKSTARTED_Field_Reset => 0, Set => 1); -- Enable interrupt on LFCLKSTARTED event. @@ -79,12 +78,12 @@ package nrf51.CLOCK is -- Enable interrupt on LFCLKSTARTED event. type INTENSET_LFCLKSTARTED_Field_1 is (-- Reset value for the field - Intenset_Lfclkstarted_Field_Reset, + INTENSET_LFCLKSTARTED_Field_Reset, -- Enable interrupt on write. Set) with Size => 1; for INTENSET_LFCLKSTARTED_Field_1 use - (Intenset_Lfclkstarted_Field_Reset => 0, + (INTENSET_LFCLKSTARTED_Field_Reset => 0, Set => 1); -- Enable interrupt on DONE event. @@ -101,12 +100,12 @@ package nrf51.CLOCK is -- Enable interrupt on DONE event. type INTENSET_DONE_Field_1 is (-- Reset value for the field - Intenset_Done_Field_Reset, + INTENSET_DONE_Field_Reset, -- Enable interrupt on write. Set) with Size => 1; for INTENSET_DONE_Field_1 use - (Intenset_Done_Field_Reset => 0, + (INTENSET_DONE_Field_Reset => 0, Set => 1); -- Enable interrupt on CTTO event. @@ -123,28 +122,28 @@ package nrf51.CLOCK is -- Enable interrupt on CTTO event. type INTENSET_CTTO_Field_1 is (-- Reset value for the field - Intenset_Ctto_Field_Reset, + INTENSET_CTTO_Field_Reset, -- Enable interrupt on write. Set) with Size => 1; for INTENSET_CTTO_Field_1 use - (Intenset_Ctto_Field_Reset => 0, + (INTENSET_CTTO_Field_Reset => 0, Set => 1); -- Interrupt enable set register. type INTENSET_Register is record -- Enable interrupt on HFCLKSTARTED event. HFCLKSTARTED : INTENSET_HFCLKSTARTED_Field_1 := - Intenset_Hfclkstarted_Field_Reset; + INTENSET_HFCLKSTARTED_Field_Reset; -- Enable interrupt on LFCLKSTARTED event. LFCLKSTARTED : INTENSET_LFCLKSTARTED_Field_1 := - Intenset_Lfclkstarted_Field_Reset; + INTENSET_LFCLKSTARTED_Field_Reset; -- unspecified Reserved_2_2 : nrf51.Bit := 16#0#; -- Enable interrupt on DONE event. - DONE : INTENSET_DONE_Field_1 := Intenset_Done_Field_Reset; + DONE : INTENSET_DONE_Field_1 := INTENSET_DONE_Field_Reset; -- Enable interrupt on CTTO event. - CTTO : INTENSET_CTTO_Field_1 := Intenset_Ctto_Field_Reset; + CTTO : INTENSET_CTTO_Field_1 := INTENSET_CTTO_Field_Reset; -- unspecified Reserved_5_31 : nrf51.UInt27 := 16#0#; end record @@ -174,12 +173,12 @@ package nrf51.CLOCK is -- Disable interrupt on HFCLKSTARTED event. type INTENCLR_HFCLKSTARTED_Field_1 is (-- Reset value for the field - Intenclr_Hfclkstarted_Field_Reset, + INTENCLR_HFCLKSTARTED_Field_Reset, -- Disable interrupt on write. Clear) with Size => 1; for INTENCLR_HFCLKSTARTED_Field_1 use - (Intenclr_Hfclkstarted_Field_Reset => 0, + (INTENCLR_HFCLKSTARTED_Field_Reset => 0, Clear => 1); -- Disable interrupt on LFCLKSTARTED event. @@ -196,12 +195,12 @@ package nrf51.CLOCK is -- Disable interrupt on LFCLKSTARTED event. type INTENCLR_LFCLKSTARTED_Field_1 is (-- Reset value for the field - Intenclr_Lfclkstarted_Field_Reset, + INTENCLR_LFCLKSTARTED_Field_Reset, -- Disable interrupt on write. Clear) with Size => 1; for INTENCLR_LFCLKSTARTED_Field_1 use - (Intenclr_Lfclkstarted_Field_Reset => 0, + (INTENCLR_LFCLKSTARTED_Field_Reset => 0, Clear => 1); -- Disable interrupt on DONE event. @@ -218,12 +217,12 @@ package nrf51.CLOCK is -- Disable interrupt on DONE event. type INTENCLR_DONE_Field_1 is (-- Reset value for the field - Intenclr_Done_Field_Reset, + INTENCLR_DONE_Field_Reset, -- Disable interrupt on write. Clear) with Size => 1; for INTENCLR_DONE_Field_1 use - (Intenclr_Done_Field_Reset => 0, + (INTENCLR_DONE_Field_Reset => 0, Clear => 1); -- Disable interrupt on CTTO event. @@ -240,28 +239,28 @@ package nrf51.CLOCK is -- Disable interrupt on CTTO event. type INTENCLR_CTTO_Field_1 is (-- Reset value for the field - Intenclr_Ctto_Field_Reset, + INTENCLR_CTTO_Field_Reset, -- Disable interrupt on write. Clear) with Size => 1; for INTENCLR_CTTO_Field_1 use - (Intenclr_Ctto_Field_Reset => 0, + (INTENCLR_CTTO_Field_Reset => 0, Clear => 1); -- Interrupt enable clear register. type INTENCLR_Register is record -- Disable interrupt on HFCLKSTARTED event. HFCLKSTARTED : INTENCLR_HFCLKSTARTED_Field_1 := - Intenclr_Hfclkstarted_Field_Reset; + INTENCLR_HFCLKSTARTED_Field_Reset; -- Disable interrupt on LFCLKSTARTED event. LFCLKSTARTED : INTENCLR_LFCLKSTARTED_Field_1 := - Intenclr_Lfclkstarted_Field_Reset; + INTENCLR_LFCLKSTARTED_Field_Reset; -- unspecified Reserved_2_2 : nrf51.Bit := 16#0#; -- Disable interrupt on DONE event. - DONE : INTENCLR_DONE_Field_1 := Intenclr_Done_Field_Reset; + DONE : INTENCLR_DONE_Field_1 := INTENCLR_DONE_Field_Reset; -- Disable interrupt on CTTO event. - CTTO : INTENCLR_CTTO_Field_1 := Intenclr_Ctto_Field_Reset; + CTTO : INTENCLR_CTTO_Field_1 := INTENCLR_CTTO_Field_Reset; -- unspecified Reserved_5_31 : nrf51.UInt27 := 16#0#; end record @@ -280,12 +279,12 @@ package nrf51.CLOCK is -- Task HFCLKSTART trigger status. type HFCLKRUN_STATUS_Field is (-- Task HFCLKSTART has not been triggered. - Nottriggered, + NotTriggered, -- Task HFCLKSTART has been triggered. Triggered) with Size => 1; for HFCLKRUN_STATUS_Field use - (Nottriggered => 0, + (NotTriggered => 0, Triggered => 1); -- Task HFCLKSTART trigger status. @@ -306,24 +305,24 @@ package nrf51.CLOCK is -- Active clock source for the HF clock. type HFCLKSTAT_SRC_Field is (-- Internal 16MHz RC oscillator running and generating the HFCLK clock. - Rc, + RC, -- External 16MHz/32MHz crystal oscillator running and generating the HFCLK -- clock. Xtal) with Size => 1; for HFCLKSTAT_SRC_Field use - (Rc => 0, + (RC => 0, Xtal => 1); -- State for the HFCLK. type HFCLKSTAT_STATE_Field is (-- HFCLK clock not running. - Notrunning, + NotRunning, -- HFCLK clock running. Running) with Size => 1; for HFCLKSTAT_STATE_Field use - (Notrunning => 0, + (NotRunning => 0, Running => 1); -- High frequency clock status. @@ -350,12 +349,12 @@ package nrf51.CLOCK is -- Task LFCLKSTART triggered status. type LFCLKRUN_STATUS_Field is (-- Task LFCLKSTART has not been triggered. - Nottriggered, + NotTriggered, -- Task LFCLKSTART has been triggered. Triggered) with Size => 1; for LFCLKRUN_STATUS_Field use - (Nottriggered => 0, + (NotTriggered => 0, Triggered => 1); -- Task LFCLKSTART triggered status. @@ -376,7 +375,7 @@ package nrf51.CLOCK is -- Active clock source for the LF clock. type LFCLKSTAT_SRC_Field is (-- Internal 32KiHz RC oscillator running and generating the LFCLK clock. - Rc, + RC, -- External 32KiHz crystal oscillator running and generating the LFCLK clock. Xtal, -- Internal 32KiHz synthesizer from the HFCLK running and generating the LFCLK @@ -384,19 +383,19 @@ package nrf51.CLOCK is Synth) with Size => 2; for LFCLKSTAT_SRC_Field use - (Rc => 0, + (RC => 0, Xtal => 1, Synth => 2); -- State for the LF clock. type LFCLKSTAT_STATE_Field is (-- LFCLK clock not running. - Notrunning, + NotRunning, -- LFCLK clock running. Running) with Size => 1; for LFCLKSTAT_STATE_Field use - (Notrunning => 0, + (NotRunning => 0, Running => 1); -- Low frequency clock status. @@ -423,14 +422,14 @@ package nrf51.CLOCK is -- Clock source for the LFCLK clock, set when task LKCLKSTART is triggered. type LFCLKSRCCOPY_SRC_Field is (-- Internal 32KiHz RC oscillator. - Rc, + RC, -- External 32KiHz crystal. Xtal, -- Internal 32KiHz synthesizer from HFCLK system clock. Synth) with Size => 2; for LFCLKSRCCOPY_SRC_Field use - (Rc => 0, + (RC => 0, Xtal => 1, Synth => 2); @@ -453,21 +452,21 @@ package nrf51.CLOCK is -- Clock source. type LFCLKSRC_SRC_Field is (-- Internal 32KiHz RC oscillator. - Rc, + RC, -- External 32KiHz crystal. Xtal, -- Internal 32KiHz synthesizer from HFCLK system clock. Synth) with Size => 2; for LFCLKSRC_SRC_Field use - (Rc => 0, + (RC => 0, Xtal => 1, Synth => 2); -- Clock source for the LFCLK clock. type LFCLKSRC_Register is record -- Clock source. - SRC : LFCLKSRC_SRC_Field := nrf51.CLOCK.Rc; + SRC : LFCLKSRC_SRC_Field := nrf51.CLOCK.RC; -- unspecified Reserved_2_31 : nrf51.UInt30 := 16#0#; end record @@ -499,18 +498,18 @@ package nrf51.CLOCK is -- External Xtal frequency selection. type XTALFREQ_XTALFREQ_Field is (-- 32MHz xtal is used as source for the HFCLK oscillator. - Val_32Mhz, + Val_32MHz, -- 16MHz xtal is used as source for the HFCLK oscillator. - Val_16Mhz) + Val_16MHz) with Size => 8; for XTALFREQ_XTALFREQ_Field use - (Val_32Mhz => 0, - Val_16Mhz => 255); + (Val_32MHz => 0, + Val_16MHz => 255); -- Crystal frequency. type XTALFREQ_Register is record -- External Xtal frequency selection. - XTALFREQ : XTALFREQ_XTALFREQ_Field := nrf51.CLOCK.Val_16Mhz; + XTALFREQ : XTALFREQ_XTALFREQ_Field := nrf51.CLOCK.Val_16MHz; -- unspecified Reserved_8_31 : nrf51.UInt24 := 16#FFFFFF#; end record diff --git a/microbit/nrf51/nrf51-rtc.ads b/microbit/adainclude/nrf51-rtc.ads similarity index 93% rename from microbit/nrf51/nrf51-rtc.ads rename to microbit/adainclude/nrf51-rtc.ads index 5e75125..070ea6f 100644 --- a/microbit/nrf51/nrf51-rtc.ads +++ b/microbit/adainclude/nrf51-rtc.ads @@ -1,4 +1,3 @@ -pragma Ada_2012; pragma Style_Checks (Off); -- Copyright (c) 2013, Nordic Semiconductor ASA @@ -62,12 +61,12 @@ package nrf51.RTC is -- Enable interrupt on TICK event. type INTENSET_TICK_Field_1 is (-- Reset value for the field - Intenset_Tick_Field_Reset, + INTENSET_TICK_Field_Reset, -- Enable interrupt on write. Set) with Size => 1; for INTENSET_TICK_Field_1 use - (Intenset_Tick_Field_Reset => 0, + (INTENSET_TICK_Field_Reset => 0, Set => 1); -- Enable interrupt on OVRFLW event. @@ -84,12 +83,12 @@ package nrf51.RTC is -- Enable interrupt on OVRFLW event. type INTENSET_OVRFLW_Field_1 is (-- Reset value for the field - Intenset_Ovrflw_Field_Reset, + INTENSET_OVRFLW_Field_Reset, -- Enable interrupt on write. Set) with Size => 1; for INTENSET_OVRFLW_Field_1 use - (Intenset_Ovrflw_Field_Reset => 0, + (INTENSET_OVRFLW_Field_Reset => 0, Set => 1); -- Enable interrupt on COMPARE[0] event. @@ -106,12 +105,12 @@ package nrf51.RTC is -- Enable interrupt on COMPARE[0] event. type INTENSET_COMPARE0_Field_1 is (-- Reset value for the field - Intenset_Compare0_Field_Reset, + INTENSET_COMPARE0_Field_Reset, -- Enable interrupt on write. Set) with Size => 1; for INTENSET_COMPARE0_Field_1 use - (Intenset_Compare0_Field_Reset => 0, + (INTENSET_COMPARE0_Field_Reset => 0, Set => 1); -- INTENSET_COMPARE array @@ -142,9 +141,9 @@ package nrf51.RTC is -- Interrupt enable set register. type INTENSET_Register is record -- Enable interrupt on TICK event. - TICK : INTENSET_TICK_Field_1 := Intenset_Tick_Field_Reset; + TICK : INTENSET_TICK_Field_1 := INTENSET_TICK_Field_Reset; -- Enable interrupt on OVRFLW event. - OVRFLW : INTENSET_OVRFLW_Field_1 := Intenset_Ovrflw_Field_Reset; + OVRFLW : INTENSET_OVRFLW_Field_1 := INTENSET_OVRFLW_Field_Reset; -- unspecified Reserved_2_15 : nrf51.UInt14 := 16#0#; -- Enable interrupt on COMPARE[0] event. @@ -178,12 +177,12 @@ package nrf51.RTC is -- Disable interrupt on TICK event. type INTENCLR_TICK_Field_1 is (-- Reset value for the field - Intenclr_Tick_Field_Reset, + INTENCLR_TICK_Field_Reset, -- Disable interrupt on write. Clear) with Size => 1; for INTENCLR_TICK_Field_1 use - (Intenclr_Tick_Field_Reset => 0, + (INTENCLR_TICK_Field_Reset => 0, Clear => 1); -- Disable interrupt on OVRFLW event. @@ -200,12 +199,12 @@ package nrf51.RTC is -- Disable interrupt on OVRFLW event. type INTENCLR_OVRFLW_Field_1 is (-- Reset value for the field - Intenclr_Ovrflw_Field_Reset, + INTENCLR_OVRFLW_Field_Reset, -- Disable interrupt on write. Clear) with Size => 1; for INTENCLR_OVRFLW_Field_1 use - (Intenclr_Ovrflw_Field_Reset => 0, + (INTENCLR_OVRFLW_Field_Reset => 0, Clear => 1); -- Disable interrupt on COMPARE[0] event. @@ -222,12 +221,12 @@ package nrf51.RTC is -- Disable interrupt on COMPARE[0] event. type INTENCLR_COMPARE0_Field_1 is (-- Reset value for the field - Intenclr_Compare0_Field_Reset, + INTENCLR_COMPARE0_Field_Reset, -- Disable interrupt on write. Clear) with Size => 1; for INTENCLR_COMPARE0_Field_1 use - (Intenclr_Compare0_Field_Reset => 0, + (INTENCLR_COMPARE0_Field_Reset => 0, Clear => 1); -- INTENCLR_COMPARE array @@ -258,9 +257,9 @@ package nrf51.RTC is -- Interrupt enable clear register. type INTENCLR_Register is record -- Disable interrupt on TICK event. - TICK : INTENCLR_TICK_Field_1 := Intenclr_Tick_Field_Reset; + TICK : INTENCLR_TICK_Field_1 := INTENCLR_TICK_Field_Reset; -- Disable interrupt on OVRFLW event. - OVRFLW : INTENCLR_OVRFLW_Field_1 := Intenclr_Ovrflw_Field_Reset; + OVRFLW : INTENCLR_OVRFLW_Field_1 := INTENCLR_OVRFLW_Field_Reset; -- unspecified Reserved_2_15 : nrf51.UInt14 := 16#0#; -- Disable interrupt on COMPARE[0] event. @@ -376,12 +375,12 @@ package nrf51.RTC is -- Enable routing to PPI of TICK event. type EVTENSET_TICK_Field_1 is (-- Reset value for the field - Evtenset_Tick_Field_Reset, + EVTENSET_TICK_Field_Reset, -- Enable event on write. Set) with Size => 1; for EVTENSET_TICK_Field_1 use - (Evtenset_Tick_Field_Reset => 0, + (EVTENSET_TICK_Field_Reset => 0, Set => 1); -- Enable routing to PPI of OVRFLW event. @@ -398,12 +397,12 @@ package nrf51.RTC is -- Enable routing to PPI of OVRFLW event. type EVTENSET_OVRFLW_Field_1 is (-- Reset value for the field - Evtenset_Ovrflw_Field_Reset, + EVTENSET_OVRFLW_Field_Reset, -- Enable event on write. Set) with Size => 1; for EVTENSET_OVRFLW_Field_1 use - (Evtenset_Ovrflw_Field_Reset => 0, + (EVTENSET_OVRFLW_Field_Reset => 0, Set => 1); -- Enable routing to PPI of COMPARE[0] event. @@ -420,12 +419,12 @@ package nrf51.RTC is -- Enable routing to PPI of COMPARE[0] event. type EVTENSET_COMPARE0_Field_1 is (-- Reset value for the field - Evtenset_Compare0_Field_Reset, + EVTENSET_COMPARE0_Field_Reset, -- Enable event on write. Set) with Size => 1; for EVTENSET_COMPARE0_Field_1 use - (Evtenset_Compare0_Field_Reset => 0, + (EVTENSET_COMPARE0_Field_Reset => 0, Set => 1); -- EVTENSET_COMPARE array @@ -457,9 +456,9 @@ package nrf51.RTC is -- value of EVTEN. type EVTENSET_Register is record -- Enable routing to PPI of TICK event. - TICK : EVTENSET_TICK_Field_1 := Evtenset_Tick_Field_Reset; + TICK : EVTENSET_TICK_Field_1 := EVTENSET_TICK_Field_Reset; -- Enable routing to PPI of OVRFLW event. - OVRFLW : EVTENSET_OVRFLW_Field_1 := Evtenset_Ovrflw_Field_Reset; + OVRFLW : EVTENSET_OVRFLW_Field_1 := EVTENSET_OVRFLW_Field_Reset; -- unspecified Reserved_2_15 : nrf51.UInt14 := 16#0#; -- Enable routing to PPI of COMPARE[0] event. @@ -493,12 +492,12 @@ package nrf51.RTC is -- Disable routing to PPI of TICK event. type EVTENCLR_TICK_Field_1 is (-- Reset value for the field - Evtenclr_Tick_Field_Reset, + EVTENCLR_TICK_Field_Reset, -- Disable event on write. Clear) with Size => 1; for EVTENCLR_TICK_Field_1 use - (Evtenclr_Tick_Field_Reset => 0, + (EVTENCLR_TICK_Field_Reset => 0, Clear => 1); -- Disable routing to PPI of OVRFLW event. @@ -515,12 +514,12 @@ package nrf51.RTC is -- Disable routing to PPI of OVRFLW event. type EVTENCLR_OVRFLW_Field_1 is (-- Reset value for the field - Evtenclr_Ovrflw_Field_Reset, + EVTENCLR_OVRFLW_Field_Reset, -- Disable event on write. Clear) with Size => 1; for EVTENCLR_OVRFLW_Field_1 use - (Evtenclr_Ovrflw_Field_Reset => 0, + (EVTENCLR_OVRFLW_Field_Reset => 0, Clear => 1); -- Disable routing to PPI of COMPARE[0] event. @@ -537,12 +536,12 @@ package nrf51.RTC is -- Disable routing to PPI of COMPARE[0] event. type EVTENCLR_COMPARE0_Field_1 is (-- Reset value for the field - Evtenclr_Compare0_Field_Reset, + EVTENCLR_COMPARE0_Field_Reset, -- Disable event on write. Clear) with Size => 1; for EVTENCLR_COMPARE0_Field_1 use - (Evtenclr_Compare0_Field_Reset => 0, + (EVTENCLR_COMPARE0_Field_Reset => 0, Clear => 1); -- EVTENCLR_COMPARE array @@ -574,9 +573,9 @@ package nrf51.RTC is -- value of EVTEN. type EVTENCLR_Register is record -- Disable routing to PPI of TICK event. - TICK : EVTENCLR_TICK_Field_1 := Evtenclr_Tick_Field_Reset; + TICK : EVTENCLR_TICK_Field_1 := EVTENCLR_TICK_Field_Reset; -- Disable routing to PPI of OVRFLW event. - OVRFLW : EVTENCLR_OVRFLW_Field_1 := Evtenclr_Ovrflw_Field_Reset; + OVRFLW : EVTENCLR_OVRFLW_Field_1 := EVTENCLR_OVRFLW_Field_Reset; -- unspecified Reserved_2_15 : nrf51.UInt14 := 16#0#; -- Disable routing to PPI of COMPARE[0] event. diff --git a/microbit/nrf51/nrf51.ads b/microbit/adainclude/nrf51.ads similarity index 99% rename from microbit/nrf51/nrf51.ads rename to microbit/adainclude/nrf51.ads index eedfb58..4501510 100644 --- a/microbit/nrf51/nrf51.ads +++ b/microbit/adainclude/nrf51.ads @@ -1,4 +1,3 @@ -pragma Ada_2012; pragma Style_Checks (Off); -- Copyright (c) 2013, Nordic Semiconductor ASA diff --git a/microbit/nrf51/nrf51-aar.ads b/microbit/nrf51/nrf51-aar.ads deleted file mode 100644 index bfd8cc1..0000000 --- a/microbit/nrf51/nrf51-aar.ads +++ /dev/null @@ -1,370 +0,0 @@ -pragma Ada_2012; -pragma Style_Checks (Off); - --- Copyright (c) 2013, Nordic Semiconductor ASA --- All rights reserved. --- --- Redistribution and use in source and binary forms, with or without --- modification, are permitted provided that the following conditions are met: --- --- * Redistributions of source code must retain the above copyright notice, this --- list of conditions and the following disclaimer. --- --- * Redistributions in binary form must reproduce the above copyright notice, --- this list of conditions and the following disclaimer in the documentation --- and/or other materials provided with the distribution. --- --- * Neither the name of Nordic Semiconductor ASA nor the names of its --- contributors may be used to endorse or promote products derived from --- this software without specific prior written permission. --- --- THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" --- AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE --- IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE --- DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE --- FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL --- DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR --- SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER --- CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, --- OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE --- OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. --- - --- This spec has been automatically generated from nrf51.svd - -pragma Restrictions (No_Elaboration_Code); - -with System; - -package nrf51.AAR is - pragma Preelaborate; - - --------------- - -- Registers -- - --------------- - - -- Enable interrupt on END event. - type INTENSET_END_Field is - (-- Interrupt disabled. - Disabled, - -- Interrupt enabled. - Enabled) - with Size => 1; - for INTENSET_END_Field use - (Disabled => 0, - Enabled => 1); - - -- Enable interrupt on END event. - type INTENSET_END_Field_1 is - (-- Reset value for the field - Intenset_End_Field_Reset, - -- Enable interrupt on write. - Set) - with Size => 1; - for INTENSET_END_Field_1 use - (Intenset_End_Field_Reset => 0, - Set => 1); - - -- Enable interrupt on RESOLVED event. - type INTENSET_RESOLVED_Field is - (-- Interrupt disabled. - Disabled, - -- Interrupt enabled. - Enabled) - with Size => 1; - for INTENSET_RESOLVED_Field use - (Disabled => 0, - Enabled => 1); - - -- Enable interrupt on RESOLVED event. - type INTENSET_RESOLVED_Field_1 is - (-- Reset value for the field - Intenset_Resolved_Field_Reset, - -- Enable interrupt on write. - Set) - with Size => 1; - for INTENSET_RESOLVED_Field_1 use - (Intenset_Resolved_Field_Reset => 0, - Set => 1); - - -- Enable interrupt on NOTRESOLVED event. - type INTENSET_NOTRESOLVED_Field is - (-- Interrupt disabled. - Disabled, - -- Interrupt enabled. - Enabled) - with Size => 1; - for INTENSET_NOTRESOLVED_Field use - (Disabled => 0, - Enabled => 1); - - -- Enable interrupt on NOTRESOLVED event. - type INTENSET_NOTRESOLVED_Field_1 is - (-- Reset value for the field - Intenset_Notresolved_Field_Reset, - -- Enable interrupt on write. - Set) - with Size => 1; - for INTENSET_NOTRESOLVED_Field_1 use - (Intenset_Notresolved_Field_Reset => 0, - Set => 1); - - -- Interrupt enable set register. - type INTENSET_Register is record - -- Enable interrupt on END event. - END_k : INTENSET_END_Field_1 := Intenset_End_Field_Reset; - -- Enable interrupt on RESOLVED event. - RESOLVED : INTENSET_RESOLVED_Field_1 := - Intenset_Resolved_Field_Reset; - -- Enable interrupt on NOTRESOLVED event. - NOTRESOLVED : INTENSET_NOTRESOLVED_Field_1 := - Intenset_Notresolved_Field_Reset; - -- unspecified - Reserved_3_31 : nrf51.UInt29 := 16#0#; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for INTENSET_Register use record - END_k at 0 range 0 .. 0; - RESOLVED at 0 range 1 .. 1; - NOTRESOLVED at 0 range 2 .. 2; - Reserved_3_31 at 0 range 3 .. 31; - end record; - - -- Disable interrupt on ENDKSGEN event. - type INTENCLR_END_Field is - (-- Interrupt disabled. - Disabled, - -- Interrupt enabled. - Enabled) - with Size => 1; - for INTENCLR_END_Field use - (Disabled => 0, - Enabled => 1); - - -- Disable interrupt on ENDKSGEN event. - type INTENCLR_END_Field_1 is - (-- Reset value for the field - Intenclr_End_Field_Reset, - -- Disable interrupt on write. - Clear) - with Size => 1; - for INTENCLR_END_Field_1 use - (Intenclr_End_Field_Reset => 0, - Clear => 1); - - -- Disable interrupt on RESOLVED event. - type INTENCLR_RESOLVED_Field is - (-- Interrupt disabled. - Disabled, - -- Interrupt enabled. - Enabled) - with Size => 1; - for INTENCLR_RESOLVED_Field use - (Disabled => 0, - Enabled => 1); - - -- Disable interrupt on RESOLVED event. - type INTENCLR_RESOLVED_Field_1 is - (-- Reset value for the field - Intenclr_Resolved_Field_Reset, - -- Disable interrupt on write. - Clear) - with Size => 1; - for INTENCLR_RESOLVED_Field_1 use - (Intenclr_Resolved_Field_Reset => 0, - Clear => 1); - - -- Disable interrupt on NOTRESOLVED event. - type INTENCLR_NOTRESOLVED_Field is - (-- Interrupt disabled. - Disabled, - -- Interrupt enabled. - Enabled) - with Size => 1; - for INTENCLR_NOTRESOLVED_Field use - (Disabled => 0, - Enabled => 1); - - -- Disable interrupt on NOTRESOLVED event. - type INTENCLR_NOTRESOLVED_Field_1 is - (-- Reset value for the field - Intenclr_Notresolved_Field_Reset, - -- Disable interrupt on write. - Clear) - with Size => 1; - for INTENCLR_NOTRESOLVED_Field_1 use - (Intenclr_Notresolved_Field_Reset => 0, - Clear => 1); - - -- Interrupt enable clear register. - type INTENCLR_Register is record - -- Disable interrupt on ENDKSGEN event. - END_k : INTENCLR_END_Field_1 := Intenclr_End_Field_Reset; - -- Disable interrupt on RESOLVED event. - RESOLVED : INTENCLR_RESOLVED_Field_1 := - Intenclr_Resolved_Field_Reset; - -- Disable interrupt on NOTRESOLVED event. - NOTRESOLVED : INTENCLR_NOTRESOLVED_Field_1 := - Intenclr_Notresolved_Field_Reset; - -- unspecified - Reserved_3_31 : nrf51.UInt29 := 16#0#; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for INTENCLR_Register use record - END_k at 0 range 0 .. 0; - RESOLVED at 0 range 1 .. 1; - NOTRESOLVED at 0 range 2 .. 2; - Reserved_3_31 at 0 range 3 .. 31; - end record; - - subtype STATUS_STATUS_Field is nrf51.UInt4; - - -- Resolution status. - type STATUS_Register is record - -- Read-only. The IRK used last time an address was resolved. - STATUS : STATUS_STATUS_Field; - -- unspecified - Reserved_4_31 : nrf51.UInt28; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for STATUS_Register use record - STATUS at 0 range 0 .. 3; - Reserved_4_31 at 0 range 4 .. 31; - end record; - - -- Enable AAR. - type ENABLE_ENABLE_Field is - (-- Disabled AAR. - Disabled, - -- Enable AAR. - Enabled) - with Size => 2; - for ENABLE_ENABLE_Field use - (Disabled => 0, - Enabled => 3); - - -- Enable AAR. - type ENABLE_Register is record - -- Enable AAR. - ENABLE : ENABLE_ENABLE_Field := nrf51.AAR.Disabled; - -- unspecified - Reserved_2_31 : nrf51.UInt30 := 16#0#; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for ENABLE_Register use record - ENABLE at 0 range 0 .. 1; - Reserved_2_31 at 0 range 2 .. 31; - end record; - - subtype NIRK_NIRK_Field is nrf51.UInt5; - - -- Number of Identity root Keys in the IRK data structure. - type NIRK_Register is record - -- Number of Identity root Keys in the IRK data structure. - NIRK : NIRK_NIRK_Field := 16#1#; - -- unspecified - Reserved_5_31 : nrf51.UInt27 := 16#0#; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for NIRK_Register use record - NIRK at 0 range 0 .. 4; - Reserved_5_31 at 0 range 5 .. 31; - end record; - - -- Peripheral power control. - type POWER_POWER_Field is - (-- Module power disabled. - Disabled, - -- Module power enabled. - Enabled) - with Size => 1; - for POWER_POWER_Field use - (Disabled => 0, - Enabled => 1); - - -- Peripheral power control. - type POWER_Register is record - -- Peripheral power control. - POWER : POWER_POWER_Field := nrf51.AAR.Disabled; - -- unspecified - Reserved_1_31 : nrf51.UInt31 := 16#0#; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for POWER_Register use record - POWER at 0 range 0 .. 0; - Reserved_1_31 at 0 range 1 .. 31; - end record; - - ----------------- - -- Peripherals -- - ----------------- - - -- Accelerated Address Resolver. - type AAR_Peripheral is record - -- Start resolving addresses based on IRKs specified in the IRK data - -- structure. - TASKS_START : aliased nrf51.UInt32; - -- Stop resolving addresses. - TASKS_STOP : aliased nrf51.UInt32; - -- Address resolution procedure completed. - EVENTS_END : aliased nrf51.UInt32; - -- Address resolved. - EVENTS_RESOLVED : aliased nrf51.UInt32; - -- Address not resolved. - EVENTS_NOTRESOLVED : aliased nrf51.UInt32; - -- Interrupt enable set register. - INTENSET : aliased INTENSET_Register; - -- Interrupt enable clear register. - INTENCLR : aliased INTENCLR_Register; - -- Resolution status. - STATUS : aliased STATUS_Register; - -- Enable AAR. - ENABLE : aliased ENABLE_Register; - -- Number of Identity root Keys in the IRK data structure. - NIRK : aliased NIRK_Register; - -- Pointer to the IRK data structure. - IRKPTR : aliased nrf51.UInt32; - -- Pointer to the resolvable address (6 bytes). - ADDRPTR : aliased nrf51.UInt32; - -- Pointer to a "scratch" data area used for temporary storage during - -- resolution. A minimum of 3 bytes must be reserved. - SCRATCHPTR : aliased nrf51.UInt32; - -- Peripheral power control. - POWER : aliased POWER_Register; - end record - with Volatile; - - for AAR_Peripheral use record - TASKS_START at 16#0# range 0 .. 31; - TASKS_STOP at 16#8# range 0 .. 31; - EVENTS_END at 16#100# range 0 .. 31; - EVENTS_RESOLVED at 16#104# range 0 .. 31; - EVENTS_NOTRESOLVED at 16#108# range 0 .. 31; - INTENSET at 16#304# range 0 .. 31; - INTENCLR at 16#308# range 0 .. 31; - STATUS at 16#400# range 0 .. 31; - ENABLE at 16#500# range 0 .. 31; - NIRK at 16#504# range 0 .. 31; - IRKPTR at 16#508# range 0 .. 31; - ADDRPTR at 16#510# range 0 .. 31; - SCRATCHPTR at 16#514# range 0 .. 31; - POWER at 16#FFC# range 0 .. 31; - end record; - - -- Accelerated Address Resolver. - AAR_Periph : aliased AAR_Peripheral - with Import, Address => AAR_Base; - -end nrf51.AAR; diff --git a/microbit/nrf51/nrf51-adc.ads b/microbit/nrf51/nrf51-adc.ads deleted file mode 100644 index ff786d3..0000000 --- a/microbit/nrf51/nrf51-adc.ads +++ /dev/null @@ -1,395 +0,0 @@ -pragma Ada_2012; -pragma Style_Checks (Off); - --- Copyright (c) 2013, Nordic Semiconductor ASA --- All rights reserved. --- --- Redistribution and use in source and binary forms, with or without --- modification, are permitted provided that the following conditions are met: --- --- * Redistributions of source code must retain the above copyright notice, this --- list of conditions and the following disclaimer. --- --- * Redistributions in binary form must reproduce the above copyright notice, --- this list of conditions and the following disclaimer in the documentation --- and/or other materials provided with the distribution. --- --- * Neither the name of Nordic Semiconductor ASA nor the names of its --- contributors may be used to endorse or promote products derived from --- this software without specific prior written permission. --- --- THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" --- AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE --- IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE --- DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE --- FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL --- DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR --- SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER --- CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, --- OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE --- OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. --- - --- This spec has been automatically generated from nrf51.svd - -pragma Restrictions (No_Elaboration_Code); - -with System; - -package nrf51.ADC is - pragma Preelaborate; - - --------------- - -- Registers -- - --------------- - - -- Enable interrupt on END event. - type INTENSET_END_Field is - (-- Interrupt disabled. - Disabled, - -- Interrupt enabled. - Enabled) - with Size => 1; - for INTENSET_END_Field use - (Disabled => 0, - Enabled => 1); - - -- Enable interrupt on END event. - type INTENSET_END_Field_1 is - (-- Reset value for the field - Intenset_End_Field_Reset, - -- Enable interrupt on write. - Set) - with Size => 1; - for INTENSET_END_Field_1 use - (Intenset_End_Field_Reset => 0, - Set => 1); - - -- Interrupt enable set register. - type INTENSET_Register is record - -- Enable interrupt on END event. - END_k : INTENSET_END_Field_1 := Intenset_End_Field_Reset; - -- unspecified - Reserved_1_31 : nrf51.UInt31 := 16#0#; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for INTENSET_Register use record - END_k at 0 range 0 .. 0; - Reserved_1_31 at 0 range 1 .. 31; - end record; - - -- Disable interrupt on END event. - type INTENCLR_END_Field is - (-- Interrupt disabled. - Disabled, - -- Interrupt enabled. - Enabled) - with Size => 1; - for INTENCLR_END_Field use - (Disabled => 0, - Enabled => 1); - - -- Disable interrupt on END event. - type INTENCLR_END_Field_1 is - (-- Reset value for the field - Intenclr_End_Field_Reset, - -- Disable interrupt on write. - Clear) - with Size => 1; - for INTENCLR_END_Field_1 use - (Intenclr_End_Field_Reset => 0, - Clear => 1); - - -- Interrupt enable clear register. - type INTENCLR_Register is record - -- Disable interrupt on END event. - END_k : INTENCLR_END_Field_1 := Intenclr_End_Field_Reset; - -- unspecified - Reserved_1_31 : nrf51.UInt31 := 16#0#; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for INTENCLR_Register use record - END_k at 0 range 0 .. 0; - Reserved_1_31 at 0 range 1 .. 31; - end record; - - -- ADC busy register. - type BUSY_BUSY_Field is - (-- No ongoing ADC conversion is taking place. ADC is ready. - Ready, - -- An ADC conversion is taking place. ADC is busy. - Busy) - with Size => 1; - for BUSY_BUSY_Field use - (Ready => 0, - Busy => 1); - - -- ADC busy register. - type BUSY_Register is record - -- Read-only. ADC busy register. - BUSY : BUSY_BUSY_Field; - -- unspecified - Reserved_1_31 : nrf51.UInt31; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for BUSY_Register use record - BUSY at 0 range 0 .. 0; - Reserved_1_31 at 0 range 1 .. 31; - end record; - - -- ADC enable. - type ENABLE_ENABLE_Field is - (-- ADC is disabled. - Disabled, - -- ADC is enabled. If an analog input pin is selected as source of the --- conversion, the selected pin is configured as an analog input. - Enabled) - with Size => 2; - for ENABLE_ENABLE_Field use - (Disabled => 0, - Enabled => 1); - - -- ADC enable. - type ENABLE_Register is record - -- ADC enable. - ENABLE : ENABLE_ENABLE_Field := nrf51.ADC.Disabled; - -- unspecified - Reserved_2_31 : nrf51.UInt30 := 16#0#; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for ENABLE_Register use record - ENABLE at 0 range 0 .. 1; - Reserved_2_31 at 0 range 2 .. 31; - end record; - - -- ADC resolution. - type CONFIG_RES_Field is - (-- 8bit ADC resolution. - Val_8BIT, - -- 9bit ADC resolution. - Val_9BIT, - -- 10bit ADC resolution. - Val_10BIT) - with Size => 2; - for CONFIG_RES_Field use - (Val_8BIT => 0, - Val_9BIT => 1, - Val_10BIT => 2); - - -- ADC input selection. - type CONFIG_INPSEL_Field is - (-- Analog input specified by PSEL with no prescaling used as input for the --- conversion. - Analoginputnoprescaling, - -- Analog input specified by PSEL with 2/3 prescaling used as input for the --- conversion. - Analoginputtwothirdsprescaling, - -- Analog input specified by PSEL with 1/3 prescaling used as input for the --- conversion. - Analoginputonethirdprescaling, - -- Supply voltage with 2/3 prescaling used as input for the conversion. - Supplytwothirdsprescaling, - -- Supply voltage with 1/3 prescaling used as input for the conversion. - Supplyonethirdprescaling) - with Size => 3; - for CONFIG_INPSEL_Field use - (Analoginputnoprescaling => 0, - Analoginputtwothirdsprescaling => 1, - Analoginputonethirdprescaling => 2, - Supplytwothirdsprescaling => 5, - Supplyonethirdprescaling => 6); - - -- ADC reference selection. - type CONFIG_REFSEL_Field is - (-- Use internal 1.2V bandgap voltage as reference for conversion. - Vbg, - -- Use external source configured by EXTREFSEL as reference for conversion. - External, - -- Use supply voltage with 1/2 prescaling as reference for conversion. Only --- usable when supply voltage is between 1.7V and 2.6V. - Supplyonehalfprescaling, - -- Use supply voltage with 1/3 prescaling as reference for conversion. Only --- usable when supply voltage is between 2.5V and 3.6V. - Supplyonethirdprescaling) - with Size => 2; - for CONFIG_REFSEL_Field use - (Vbg => 0, - External => 1, - Supplyonehalfprescaling => 2, - Supplyonethirdprescaling => 3); - - -- ADC analog pin selection. - type CONFIG_PSEL_Field is - (-- Analog input pins disabled. - Disabled, - -- Use analog input 0 as analog input. - Analoginput0, - -- Use analog input 1 as analog input. - Analoginput1, - -- Use analog input 2 as analog input. - Analoginput2, - -- Use analog input 3 as analog input. - Analoginput3, - -- Use analog input 4 as analog input. - Analoginput4, - -- Use analog input 5 as analog input. - Analoginput5, - -- Use analog input 6 as analog input. - Analoginput6, - -- Use analog input 7 as analog input. - Analoginput7) - with Size => 8; - for CONFIG_PSEL_Field use - (Disabled => 0, - Analoginput0 => 1, - Analoginput1 => 2, - Analoginput2 => 4, - Analoginput3 => 8, - Analoginput4 => 16, - Analoginput5 => 32, - Analoginput6 => 64, - Analoginput7 => 128); - - -- ADC external reference pin selection. - type CONFIG_EXTREFSEL_Field is - (-- Analog external reference inputs disabled. - None, - -- Use analog reference 0 as reference. - Analogreference0, - -- Use analog reference 1 as reference. - Analogreference1) - with Size => 2; - for CONFIG_EXTREFSEL_Field use - (None => 0, - Analogreference0 => 1, - Analogreference1 => 2); - - -- ADC configuration register. - type CONFIG_Register is record - -- ADC resolution. - RES : CONFIG_RES_Field := nrf51.ADC.Val_8BIT; - -- ADC input selection. - INPSEL : CONFIG_INPSEL_Field := - nrf51.ADC.Supplyonethirdprescaling; - -- ADC reference selection. - REFSEL : CONFIG_REFSEL_Field := nrf51.ADC.Vbg; - -- unspecified - Reserved_7_7 : nrf51.Bit := 16#0#; - -- ADC analog pin selection. - PSEL : CONFIG_PSEL_Field := nrf51.ADC.Disabled; - -- ADC external reference pin selection. - EXTREFSEL : CONFIG_EXTREFSEL_Field := nrf51.ADC.None; - -- unspecified - Reserved_18_31 : nrf51.UInt14 := 16#0#; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for CONFIG_Register use record - RES at 0 range 0 .. 1; - INPSEL at 0 range 2 .. 4; - REFSEL at 0 range 5 .. 6; - Reserved_7_7 at 0 range 7 .. 7; - PSEL at 0 range 8 .. 15; - EXTREFSEL at 0 range 16 .. 17; - Reserved_18_31 at 0 range 18 .. 31; - end record; - - subtype RESULT_RESULT_Field is nrf51.UInt10; - - -- Result of ADC conversion. - type RESULT_Register is record - -- Read-only. Result of ADC conversion. - RESULT : RESULT_RESULT_Field; - -- unspecified - Reserved_10_31 : nrf51.UInt22; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for RESULT_Register use record - RESULT at 0 range 0 .. 9; - Reserved_10_31 at 0 range 10 .. 31; - end record; - - -- Peripheral power control. - type POWER_POWER_Field is - (-- Module power disabled. - Disabled, - -- Module power enabled. - Enabled) - with Size => 1; - for POWER_POWER_Field use - (Disabled => 0, - Enabled => 1); - - -- Peripheral power control. - type POWER_Register is record - -- Peripheral power control. - POWER : POWER_POWER_Field := nrf51.ADC.Disabled; - -- unspecified - Reserved_1_31 : nrf51.UInt31 := 16#0#; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for POWER_Register use record - POWER at 0 range 0 .. 0; - Reserved_1_31 at 0 range 1 .. 31; - end record; - - ----------------- - -- Peripherals -- - ----------------- - - -- Analog to digital converter. - type ADC_Peripheral is record - -- Start an ADC conversion. - TASKS_START : aliased nrf51.UInt32; - -- Stop ADC. - TASKS_STOP : aliased nrf51.UInt32; - -- ADC conversion complete. - EVENTS_END : aliased nrf51.UInt32; - -- Interrupt enable set register. - INTENSET : aliased INTENSET_Register; - -- Interrupt enable clear register. - INTENCLR : aliased INTENCLR_Register; - -- ADC busy register. - BUSY : aliased BUSY_Register; - -- ADC enable. - ENABLE : aliased ENABLE_Register; - -- ADC configuration register. - CONFIG : aliased CONFIG_Register; - -- Result of ADC conversion. - RESULT : aliased RESULT_Register; - -- Peripheral power control. - POWER : aliased POWER_Register; - end record - with Volatile; - - for ADC_Peripheral use record - TASKS_START at 16#0# range 0 .. 31; - TASKS_STOP at 16#4# range 0 .. 31; - EVENTS_END at 16#100# range 0 .. 31; - INTENSET at 16#304# range 0 .. 31; - INTENCLR at 16#308# range 0 .. 31; - BUSY at 16#400# range 0 .. 31; - ENABLE at 16#500# range 0 .. 31; - CONFIG at 16#504# range 0 .. 31; - RESULT at 16#508# range 0 .. 31; - POWER at 16#FFC# range 0 .. 31; - end record; - - -- Analog to digital converter. - ADC_Periph : aliased ADC_Peripheral - with Import, Address => ADC_Base; - -end nrf51.ADC; diff --git a/microbit/nrf51/nrf51-amli.ads b/microbit/nrf51/nrf51-amli.ads deleted file mode 100644 index a8542f4..0000000 --- a/microbit/nrf51/nrf51-amli.ads +++ /dev/null @@ -1,419 +0,0 @@ -pragma Ada_2012; -pragma Style_Checks (Off); - --- Copyright (c) 2013, Nordic Semiconductor ASA --- All rights reserved. --- --- Redistribution and use in source and binary forms, with or without --- modification, are permitted provided that the following conditions are met: --- --- * Redistributions of source code must retain the above copyright notice, this --- list of conditions and the following disclaimer. --- --- * Redistributions in binary form must reproduce the above copyright notice, --- this list of conditions and the following disclaimer in the documentation --- and/or other materials provided with the distribution. --- --- * Neither the name of Nordic Semiconductor ASA nor the names of its --- contributors may be used to endorse or promote products derived from --- this software without specific prior written permission. --- --- THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" --- AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE --- IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE --- DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE --- FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL --- DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR --- SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER --- CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, --- OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE --- OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. --- - --- This spec has been automatically generated from nrf51.svd - -pragma Restrictions (No_Elaboration_Code); - -with System; - -package nrf51.AMLI is - pragma Preelaborate; - - --------------- - -- Registers -- - --------------- - - ------------------------------------- - -- AMLI_RAMPRI cluster's Registers -- - ------------------------------------- - - -- Configuration field for RAM block 0. - type CPU0_RAM0_Field is - (-- Priority 0. - Pri0, - -- Priority 2. - Pri2, - -- Priority 4. - Pri4, - -- Priority 6. - Pri6, - -- Priority 8. - Pri8, - -- Priority 10. - Pri10, - -- Priority 12. - Pri12, - -- Priority 14. - Pri14) - with Size => 4; - for CPU0_RAM0_Field use - (Pri0 => 0, - Pri2 => 2, - Pri4 => 4, - Pri6 => 6, - Pri8 => 8, - Pri10 => 10, - Pri12 => 12, - Pri14 => 14); - - -- CPU0_RAMPRI_RAM array - type CPU0_RAMPRI_RAM_Field_Array is array (0 .. 7) of CPU0_RAM0_Field - with Component_Size => 4, Size => 32; - - -- Configurable priority configuration register for CPU0. - type CPU0_RAMPRI_Register - (As_Array : Boolean := False) - is record - case As_Array is - when False => - -- RAM as a value - Val : nrf51.UInt32; - when True => - -- RAM as an array - Arr : CPU0_RAMPRI_RAM_Field_Array; - end case; - end record - with Unchecked_Union, Size => 32, Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for CPU0_RAMPRI_Register use record - Val at 0 range 0 .. 31; - Arr at 0 range 0 .. 31; - end record; - - -- Configuration field for RAM block 0. - type SPIS1_RAM0_Field is - (-- Priority 0. - Pri0, - -- Priority 2. - Pri2, - -- Priority 4. - Pri4, - -- Priority 6. - Pri6, - -- Priority 8. - Pri8, - -- Priority 10. - Pri10, - -- Priority 12. - Pri12, - -- Priority 14. - Pri14) - with Size => 4; - for SPIS1_RAM0_Field use - (Pri0 => 0, - Pri2 => 2, - Pri4 => 4, - Pri6 => 6, - Pri8 => 8, - Pri10 => 10, - Pri12 => 12, - Pri14 => 14); - - -- SPIS1_RAMPRI_RAM array - type SPIS1_RAMPRI_RAM_Field_Array is array (0 .. 7) of SPIS1_RAM0_Field - with Component_Size => 4, Size => 32; - - -- Configurable priority configuration register for SPIS1. - type SPIS1_RAMPRI_Register - (As_Array : Boolean := False) - is record - case As_Array is - when False => - -- RAM as a value - Val : nrf51.UInt32; - when True => - -- RAM as an array - Arr : SPIS1_RAMPRI_RAM_Field_Array; - end case; - end record - with Unchecked_Union, Size => 32, Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for SPIS1_RAMPRI_Register use record - Val at 0 range 0 .. 31; - Arr at 0 range 0 .. 31; - end record; - - -- Configuration field for RAM block 0. - type RADIO_RAM0_Field is - (-- Priority 0. - Pri0, - -- Priority 2. - Pri2, - -- Priority 4. - Pri4, - -- Priority 6. - Pri6, - -- Priority 8. - Pri8, - -- Priority 10. - Pri10, - -- Priority 12. - Pri12, - -- Priority 14. - Pri14) - with Size => 4; - for RADIO_RAM0_Field use - (Pri0 => 0, - Pri2 => 2, - Pri4 => 4, - Pri6 => 6, - Pri8 => 8, - Pri10 => 10, - Pri12 => 12, - Pri14 => 14); - - -- RADIO_RAMPRI_RAM array - type RADIO_RAMPRI_RAM_Field_Array is array (0 .. 7) of RADIO_RAM0_Field - with Component_Size => 4, Size => 32; - - -- Configurable priority configuration register for RADIO. - type RADIO_RAMPRI_Register - (As_Array : Boolean := False) - is record - case As_Array is - when False => - -- RAM as a value - Val : nrf51.UInt32; - when True => - -- RAM as an array - Arr : RADIO_RAMPRI_RAM_Field_Array; - end case; - end record - with Unchecked_Union, Size => 32, Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for RADIO_RAMPRI_Register use record - Val at 0 range 0 .. 31; - Arr at 0 range 0 .. 31; - end record; - - -- Configuration field for RAM block 0. - type ECB_RAM0_Field is - (-- Priority 0. - Pri0, - -- Priority 2. - Pri2, - -- Priority 4. - Pri4, - -- Priority 6. - Pri6, - -- Priority 8. - Pri8, - -- Priority 10. - Pri10, - -- Priority 12. - Pri12, - -- Priority 14. - Pri14) - with Size => 4; - for ECB_RAM0_Field use - (Pri0 => 0, - Pri2 => 2, - Pri4 => 4, - Pri6 => 6, - Pri8 => 8, - Pri10 => 10, - Pri12 => 12, - Pri14 => 14); - - -- ECB_RAMPRI_RAM array - type ECB_RAMPRI_RAM_Field_Array is array (0 .. 7) of ECB_RAM0_Field - with Component_Size => 4, Size => 32; - - -- Configurable priority configuration register for ECB. - type ECB_RAMPRI_Register - (As_Array : Boolean := False) - is record - case As_Array is - when False => - -- RAM as a value - Val : nrf51.UInt32; - when True => - -- RAM as an array - Arr : ECB_RAMPRI_RAM_Field_Array; - end case; - end record - with Unchecked_Union, Size => 32, Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for ECB_RAMPRI_Register use record - Val at 0 range 0 .. 31; - Arr at 0 range 0 .. 31; - end record; - - -- Configuration field for RAM block 0. - type CCM_RAM0_Field is - (-- Priority 0. - Pri0, - -- Priority 2. - Pri2, - -- Priority 4. - Pri4, - -- Priority 6. - Pri6, - -- Priority 8. - Pri8, - -- Priority 10. - Pri10, - -- Priority 12. - Pri12, - -- Priority 14. - Pri14) - with Size => 4; - for CCM_RAM0_Field use - (Pri0 => 0, - Pri2 => 2, - Pri4 => 4, - Pri6 => 6, - Pri8 => 8, - Pri10 => 10, - Pri12 => 12, - Pri14 => 14); - - -- CCM_RAMPRI_RAM array - type CCM_RAMPRI_RAM_Field_Array is array (0 .. 7) of CCM_RAM0_Field - with Component_Size => 4, Size => 32; - - -- Configurable priority configuration register for CCM. - type CCM_RAMPRI_Register - (As_Array : Boolean := False) - is record - case As_Array is - when False => - -- RAM as a value - Val : nrf51.UInt32; - when True => - -- RAM as an array - Arr : CCM_RAMPRI_RAM_Field_Array; - end case; - end record - with Unchecked_Union, Size => 32, Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for CCM_RAMPRI_Register use record - Val at 0 range 0 .. 31; - Arr at 0 range 0 .. 31; - end record; - - -- Configuration field for RAM block 0. - type AAR_RAM0_Field is - (-- Priority 0. - Pri0, - -- Priority 2. - Pri2, - -- Priority 4. - Pri4, - -- Priority 6. - Pri6, - -- Priority 8. - Pri8, - -- Priority 10. - Pri10, - -- Priority 12. - Pri12, - -- Priority 14. - Pri14) - with Size => 4; - for AAR_RAM0_Field use - (Pri0 => 0, - Pri2 => 2, - Pri4 => 4, - Pri6 => 6, - Pri8 => 8, - Pri10 => 10, - Pri12 => 12, - Pri14 => 14); - - -- AAR_RAMPRI_RAM array - type AAR_RAMPRI_RAM_Field_Array is array (0 .. 7) of AAR_RAM0_Field - with Component_Size => 4, Size => 32; - - -- Configurable priority configuration register for AAR. - type AAR_RAMPRI_Register - (As_Array : Boolean := False) - is record - case As_Array is - when False => - -- RAM as a value - Val : nrf51.UInt32; - when True => - -- RAM as an array - Arr : AAR_RAMPRI_RAM_Field_Array; - end case; - end record - with Unchecked_Union, Size => 32, Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for AAR_RAMPRI_Register use record - Val at 0 range 0 .. 31; - Arr at 0 range 0 .. 31; - end record; - - -- RAM configurable priority configuration structure. - type AMLI_RAMPRI_Cluster is record - -- Configurable priority configuration register for CPU0. - CPU0 : aliased CPU0_RAMPRI_Register; - -- Configurable priority configuration register for SPIS1. - SPIS1 : aliased SPIS1_RAMPRI_Register; - -- Configurable priority configuration register for RADIO. - RADIO : aliased RADIO_RAMPRI_Register; - -- Configurable priority configuration register for ECB. - ECB : aliased ECB_RAMPRI_Register; - -- Configurable priority configuration register for CCM. - CCM : aliased CCM_RAMPRI_Register; - -- Configurable priority configuration register for AAR. - AAR : aliased AAR_RAMPRI_Register; - end record - with Size => 192; - - for AMLI_RAMPRI_Cluster use record - CPU0 at 16#0# range 0 .. 31; - SPIS1 at 16#4# range 0 .. 31; - RADIO at 16#8# range 0 .. 31; - ECB at 16#C# range 0 .. 31; - CCM at 16#10# range 0 .. 31; - AAR at 16#14# range 0 .. 31; - end record; - - ----------------- - -- Peripherals -- - ----------------- - - -- AHB Multi-Layer Interface. - type AMLI_Peripheral is record - -- RAM configurable priority configuration structure. - RAMPRI : aliased AMLI_RAMPRI_Cluster; - end record - with Volatile; - - for AMLI_Peripheral use record - RAMPRI at 16#E00# range 0 .. 191; - end record; - - -- AHB Multi-Layer Interface. - AMLI_Periph : aliased AMLI_Peripheral - with Import, Address => AMLI_Base; - -end nrf51.AMLI; diff --git a/microbit/nrf51/nrf51-ccm.ads b/microbit/nrf51/nrf51-ccm.ads deleted file mode 100644 index 385b831..0000000 --- a/microbit/nrf51/nrf51-ccm.ads +++ /dev/null @@ -1,425 +0,0 @@ -pragma Ada_2012; -pragma Style_Checks (Off); - --- Copyright (c) 2013, Nordic Semiconductor ASA --- All rights reserved. --- --- Redistribution and use in source and binary forms, with or without --- modification, are permitted provided that the following conditions are met: --- --- * Redistributions of source code must retain the above copyright notice, this --- list of conditions and the following disclaimer. --- --- * Redistributions in binary form must reproduce the above copyright notice, --- this list of conditions and the following disclaimer in the documentation --- and/or other materials provided with the distribution. --- --- * Neither the name of Nordic Semiconductor ASA nor the names of its --- contributors may be used to endorse or promote products derived from --- this software without specific prior written permission. --- --- THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" --- AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE --- IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE --- DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE --- FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL --- DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR --- SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER --- CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, --- OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE --- OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. --- - --- This spec has been automatically generated from nrf51.svd - -pragma Restrictions (No_Elaboration_Code); - -with System; - -package nrf51.CCM is - pragma Preelaborate; - - --------------- - -- Registers -- - --------------- - - -- Shortcut between ENDKSGEN event and CRYPT task. - type SHORTS_ENDKSGEN_CRYPT_Field is - (-- Shortcut disabled. - Disabled, - -- Shortcut enabled. - Enabled) - with Size => 1; - for SHORTS_ENDKSGEN_CRYPT_Field use - (Disabled => 0, - Enabled => 1); - - -- Shortcuts for the CCM. - type SHORTS_Register is record - -- Shortcut between ENDKSGEN event and CRYPT task. - ENDKSGEN_CRYPT : SHORTS_ENDKSGEN_CRYPT_Field := nrf51.CCM.Disabled; - -- unspecified - Reserved_1_31 : nrf51.UInt31 := 16#0#; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for SHORTS_Register use record - ENDKSGEN_CRYPT at 0 range 0 .. 0; - Reserved_1_31 at 0 range 1 .. 31; - end record; - - -- Enable interrupt on ENDKSGEN event. - type INTENSET_ENDKSGEN_Field is - (-- Interrupt disabled. - Disabled, - -- Interrupt enabled. - Enabled) - with Size => 1; - for INTENSET_ENDKSGEN_Field use - (Disabled => 0, - Enabled => 1); - - -- Enable interrupt on ENDKSGEN event. - type INTENSET_ENDKSGEN_Field_1 is - (-- Reset value for the field - Intenset_Endksgen_Field_Reset, - -- Enable interrupt on write. - Set) - with Size => 1; - for INTENSET_ENDKSGEN_Field_1 use - (Intenset_Endksgen_Field_Reset => 0, - Set => 1); - - -- Enable interrupt on ENDCRYPT event. - type INTENSET_ENDCRYPT_Field is - (-- Interrupt disabled. - Disabled, - -- Interrupt enabled. - Enabled) - with Size => 1; - for INTENSET_ENDCRYPT_Field use - (Disabled => 0, - Enabled => 1); - - -- Enable interrupt on ENDCRYPT event. - type INTENSET_ENDCRYPT_Field_1 is - (-- Reset value for the field - Intenset_Endcrypt_Field_Reset, - -- Enable interrupt on write. - Set) - with Size => 1; - for INTENSET_ENDCRYPT_Field_1 use - (Intenset_Endcrypt_Field_Reset => 0, - Set => 1); - - -- Enable interrupt on ERROR event. - type INTENSET_ERROR_Field is - (-- Interrupt disabled. - Disabled, - -- Interrupt enabled. - Enabled) - with Size => 1; - for INTENSET_ERROR_Field use - (Disabled => 0, - Enabled => 1); - - -- Enable interrupt on ERROR event. - type INTENSET_ERROR_Field_1 is - (-- Reset value for the field - Intenset_Error_Field_Reset, - -- Enable interrupt on write. - Set) - with Size => 1; - for INTENSET_ERROR_Field_1 use - (Intenset_Error_Field_Reset => 0, - Set => 1); - - -- Interrupt enable set register. - type INTENSET_Register is record - -- Enable interrupt on ENDKSGEN event. - ENDKSGEN : INTENSET_ENDKSGEN_Field_1 := - Intenset_Endksgen_Field_Reset; - -- Enable interrupt on ENDCRYPT event. - ENDCRYPT : INTENSET_ENDCRYPT_Field_1 := - Intenset_Endcrypt_Field_Reset; - -- Enable interrupt on ERROR event. - ERROR : INTENSET_ERROR_Field_1 := Intenset_Error_Field_Reset; - -- unspecified - Reserved_3_31 : nrf51.UInt29 := 16#0#; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for INTENSET_Register use record - ENDKSGEN at 0 range 0 .. 0; - ENDCRYPT at 0 range 1 .. 1; - ERROR at 0 range 2 .. 2; - Reserved_3_31 at 0 range 3 .. 31; - end record; - - -- Disable interrupt on ENDKSGEN event. - type INTENCLR_ENDKSGEN_Field is - (-- Interrupt disabled. - Disabled, - -- Interrupt enabled. - Enabled) - with Size => 1; - for INTENCLR_ENDKSGEN_Field use - (Disabled => 0, - Enabled => 1); - - -- Disable interrupt on ENDKSGEN event. - type INTENCLR_ENDKSGEN_Field_1 is - (-- Reset value for the field - Intenclr_Endksgen_Field_Reset, - -- Disable interrupt on write. - Clear) - with Size => 1; - for INTENCLR_ENDKSGEN_Field_1 use - (Intenclr_Endksgen_Field_Reset => 0, - Clear => 1); - - -- Disable interrupt on ENDCRYPT event. - type INTENCLR_ENDCRYPT_Field is - (-- Interrupt disabled. - Disabled, - -- Interrupt enabled. - Enabled) - with Size => 1; - for INTENCLR_ENDCRYPT_Field use - (Disabled => 0, - Enabled => 1); - - -- Disable interrupt on ENDCRYPT event. - type INTENCLR_ENDCRYPT_Field_1 is - (-- Reset value for the field - Intenclr_Endcrypt_Field_Reset, - -- Disable interrupt on write. - Clear) - with Size => 1; - for INTENCLR_ENDCRYPT_Field_1 use - (Intenclr_Endcrypt_Field_Reset => 0, - Clear => 1); - - -- Disable interrupt on ERROR event. - type INTENCLR_ERROR_Field is - (-- Interrupt disabled. - Disabled, - -- Interrupt enabled. - Enabled) - with Size => 1; - for INTENCLR_ERROR_Field use - (Disabled => 0, - Enabled => 1); - - -- Disable interrupt on ERROR event. - type INTENCLR_ERROR_Field_1 is - (-- Reset value for the field - Intenclr_Error_Field_Reset, - -- Disable interrupt on write. - Clear) - with Size => 1; - for INTENCLR_ERROR_Field_1 use - (Intenclr_Error_Field_Reset => 0, - Clear => 1); - - -- Interrupt enable clear register. - type INTENCLR_Register is record - -- Disable interrupt on ENDKSGEN event. - ENDKSGEN : INTENCLR_ENDKSGEN_Field_1 := - Intenclr_Endksgen_Field_Reset; - -- Disable interrupt on ENDCRYPT event. - ENDCRYPT : INTENCLR_ENDCRYPT_Field_1 := - Intenclr_Endcrypt_Field_Reset; - -- Disable interrupt on ERROR event. - ERROR : INTENCLR_ERROR_Field_1 := Intenclr_Error_Field_Reset; - -- unspecified - Reserved_3_31 : nrf51.UInt29 := 16#0#; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for INTENCLR_Register use record - ENDKSGEN at 0 range 0 .. 0; - ENDCRYPT at 0 range 1 .. 1; - ERROR at 0 range 2 .. 2; - Reserved_3_31 at 0 range 3 .. 31; - end record; - - -- Result of the MIC check performed during the previous CCM RX STARTCRYPT - type MICSTATUS_MICSTATUS_Field is - (-- MIC check failed. - Checkfailed, - -- MIC check passed. - Checkpassed) - with Size => 1; - for MICSTATUS_MICSTATUS_Field use - (Checkfailed => 0, - Checkpassed => 1); - - -- CCM RX MIC check result. - type MICSTATUS_Register is record - -- Read-only. Result of the MIC check performed during the previous CCM - -- RX STARTCRYPT - MICSTATUS : MICSTATUS_MICSTATUS_Field; - -- unspecified - Reserved_1_31 : nrf51.UInt31; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for MICSTATUS_Register use record - MICSTATUS at 0 range 0 .. 0; - Reserved_1_31 at 0 range 1 .. 31; - end record; - - -- CCM enable. - type ENABLE_ENABLE_Field is - (-- CCM is disabled. - Disabled, - -- CCM is enabled. - Enabled) - with Size => 2; - for ENABLE_ENABLE_Field use - (Disabled => 0, - Enabled => 2); - - -- CCM enable. - type ENABLE_Register is record - -- CCM enable. - ENABLE : ENABLE_ENABLE_Field := nrf51.CCM.Disabled; - -- unspecified - Reserved_2_31 : nrf51.UInt30 := 16#0#; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for ENABLE_Register use record - ENABLE at 0 range 0 .. 1; - Reserved_2_31 at 0 range 2 .. 31; - end record; - - -- CCM mode operation. - type MODE_MODE_Field is - (-- CCM mode TX - Encryption, - -- CCM mode TX - Decryption) - with Size => 1; - for MODE_MODE_Field use - (Encryption => 0, - Decryption => 1); - - -- Operation mode. - type MODE_Register is record - -- CCM mode operation. - MODE : MODE_MODE_Field := nrf51.CCM.Decryption; - -- unspecified - Reserved_1_31 : nrf51.UInt31 := 16#0#; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for MODE_Register use record - MODE at 0 range 0 .. 0; - Reserved_1_31 at 0 range 1 .. 31; - end record; - - -- Peripheral power control. - type POWER_POWER_Field is - (-- Module power disabled. - Disabled, - -- Module power enabled. - Enabled) - with Size => 1; - for POWER_POWER_Field use - (Disabled => 0, - Enabled => 1); - - -- Peripheral power control. - type POWER_Register is record - -- Peripheral power control. - POWER : POWER_POWER_Field := nrf51.CCM.Disabled; - -- unspecified - Reserved_1_31 : nrf51.UInt31 := 16#0#; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for POWER_Register use record - POWER at 0 range 0 .. 0; - Reserved_1_31 at 0 range 1 .. 31; - end record; - - ----------------- - -- Peripherals -- - ----------------- - - -- AES CCM Mode Encryption. - type CCM_Peripheral is record - -- Start generation of key-stream. This operation will stop by itself - -- when completed. - TASKS_KSGEN : aliased nrf51.UInt32; - -- Start encrypt/decrypt. This operation will stop by itself when - -- completed. - TASKS_CRYPT : aliased nrf51.UInt32; - -- Stop encrypt/decrypt. - TASKS_STOP : aliased nrf51.UInt32; - -- Keystream generation completed. - EVENTS_ENDKSGEN : aliased nrf51.UInt32; - -- Encrypt/decrypt completed. - EVENTS_ENDCRYPT : aliased nrf51.UInt32; - -- Error happened. - EVENTS_ERROR : aliased nrf51.UInt32; - -- Shortcuts for the CCM. - SHORTS : aliased SHORTS_Register; - -- Interrupt enable set register. - INTENSET : aliased INTENSET_Register; - -- Interrupt enable clear register. - INTENCLR : aliased INTENCLR_Register; - -- CCM RX MIC check result. - MICSTATUS : aliased MICSTATUS_Register; - -- CCM enable. - ENABLE : aliased ENABLE_Register; - -- Operation mode. - MODE : aliased MODE_Register; - -- Pointer to a data structure holding AES key and NONCE vector. - CNFPTR : aliased nrf51.UInt32; - -- Pointer to the input packet. - INPTR : aliased nrf51.UInt32; - -- Pointer to the output packet. - OUTPTR : aliased nrf51.UInt32; - -- Pointer to a "scratch" data area used for temporary storage during - -- resolution. A minimum of 43 bytes must be reserved. - SCRATCHPTR : aliased nrf51.UInt32; - -- Peripheral power control. - POWER : aliased POWER_Register; - end record - with Volatile; - - for CCM_Peripheral use record - TASKS_KSGEN at 16#0# range 0 .. 31; - TASKS_CRYPT at 16#4# range 0 .. 31; - TASKS_STOP at 16#8# range 0 .. 31; - EVENTS_ENDKSGEN at 16#100# range 0 .. 31; - EVENTS_ENDCRYPT at 16#104# range 0 .. 31; - EVENTS_ERROR at 16#108# range 0 .. 31; - SHORTS at 16#200# range 0 .. 31; - INTENSET at 16#304# range 0 .. 31; - INTENCLR at 16#308# range 0 .. 31; - MICSTATUS at 16#400# range 0 .. 31; - ENABLE at 16#500# range 0 .. 31; - MODE at 16#504# range 0 .. 31; - CNFPTR at 16#508# range 0 .. 31; - INPTR at 16#50C# range 0 .. 31; - OUTPTR at 16#510# range 0 .. 31; - SCRATCHPTR at 16#514# range 0 .. 31; - POWER at 16#FFC# range 0 .. 31; - end record; - - -- AES CCM Mode Encryption. - CCM_Periph : aliased CCM_Peripheral - with Import, Address => CCM_Base; - -end nrf51.CCM; diff --git a/microbit/nrf51/nrf51-ecb.ads b/microbit/nrf51/nrf51-ecb.ads deleted file mode 100644 index a2a6c59..0000000 --- a/microbit/nrf51/nrf51-ecb.ads +++ /dev/null @@ -1,241 +0,0 @@ -pragma Ada_2012; -pragma Style_Checks (Off); - --- Copyright (c) 2013, Nordic Semiconductor ASA --- All rights reserved. --- --- Redistribution and use in source and binary forms, with or without --- modification, are permitted provided that the following conditions are met: --- --- * Redistributions of source code must retain the above copyright notice, this --- list of conditions and the following disclaimer. --- --- * Redistributions in binary form must reproduce the above copyright notice, --- this list of conditions and the following disclaimer in the documentation --- and/or other materials provided with the distribution. --- --- * Neither the name of Nordic Semiconductor ASA nor the names of its --- contributors may be used to endorse or promote products derived from --- this software without specific prior written permission. --- --- THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" --- AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE --- IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE --- DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE --- FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL --- DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR --- SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER --- CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, --- OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE --- OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. --- - --- This spec has been automatically generated from nrf51.svd - -pragma Restrictions (No_Elaboration_Code); - -with System; - -package nrf51.ECB is - pragma Preelaborate; - - --------------- - -- Registers -- - --------------- - - -- Enable interrupt on ENDECB event. - type INTENSET_ENDECB_Field is - (-- Interrupt disabled. - Disabled, - -- Interrupt enabled. - Enabled) - with Size => 1; - for INTENSET_ENDECB_Field use - (Disabled => 0, - Enabled => 1); - - -- Enable interrupt on ENDECB event. - type INTENSET_ENDECB_Field_1 is - (-- Reset value for the field - Intenset_Endecb_Field_Reset, - -- Enable interrupt on write. - Set) - with Size => 1; - for INTENSET_ENDECB_Field_1 use - (Intenset_Endecb_Field_Reset => 0, - Set => 1); - - -- Enable interrupt on ERRORECB event. - type INTENSET_ERRORECB_Field is - (-- Interrupt disabled. - Disabled, - -- Interrupt enabled. - Enabled) - with Size => 1; - for INTENSET_ERRORECB_Field use - (Disabled => 0, - Enabled => 1); - - -- Enable interrupt on ERRORECB event. - type INTENSET_ERRORECB_Field_1 is - (-- Reset value for the field - Intenset_Errorecb_Field_Reset, - -- Enable interrupt on write. - Set) - with Size => 1; - for INTENSET_ERRORECB_Field_1 use - (Intenset_Errorecb_Field_Reset => 0, - Set => 1); - - -- Interrupt enable set register. - type INTENSET_Register is record - -- Enable interrupt on ENDECB event. - ENDECB : INTENSET_ENDECB_Field_1 := Intenset_Endecb_Field_Reset; - -- Enable interrupt on ERRORECB event. - ERRORECB : INTENSET_ERRORECB_Field_1 := - Intenset_Errorecb_Field_Reset; - -- unspecified - Reserved_2_31 : nrf51.UInt30 := 16#0#; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for INTENSET_Register use record - ENDECB at 0 range 0 .. 0; - ERRORECB at 0 range 1 .. 1; - Reserved_2_31 at 0 range 2 .. 31; - end record; - - -- Disable interrupt on ENDECB event. - type INTENCLR_ENDECB_Field is - (-- Interrupt disabled. - Disabled, - -- Interrupt enabled. - Enabled) - with Size => 1; - for INTENCLR_ENDECB_Field use - (Disabled => 0, - Enabled => 1); - - -- Disable interrupt on ENDECB event. - type INTENCLR_ENDECB_Field_1 is - (-- Reset value for the field - Intenclr_Endecb_Field_Reset, - -- Disable interrupt on write. - Clear) - with Size => 1; - for INTENCLR_ENDECB_Field_1 use - (Intenclr_Endecb_Field_Reset => 0, - Clear => 1); - - -- Disable interrupt on ERRORECB event. - type INTENCLR_ERRORECB_Field is - (-- Interrupt disabled. - Disabled, - -- Interrupt enabled. - Enabled) - with Size => 1; - for INTENCLR_ERRORECB_Field use - (Disabled => 0, - Enabled => 1); - - -- Disable interrupt on ERRORECB event. - type INTENCLR_ERRORECB_Field_1 is - (-- Reset value for the field - Intenclr_Errorecb_Field_Reset, - -- Disable interrupt on write. - Clear) - with Size => 1; - for INTENCLR_ERRORECB_Field_1 use - (Intenclr_Errorecb_Field_Reset => 0, - Clear => 1); - - -- Interrupt enable clear register. - type INTENCLR_Register is record - -- Disable interrupt on ENDECB event. - ENDECB : INTENCLR_ENDECB_Field_1 := Intenclr_Endecb_Field_Reset; - -- Disable interrupt on ERRORECB event. - ERRORECB : INTENCLR_ERRORECB_Field_1 := - Intenclr_Errorecb_Field_Reset; - -- unspecified - Reserved_2_31 : nrf51.UInt30 := 16#0#; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for INTENCLR_Register use record - ENDECB at 0 range 0 .. 0; - ERRORECB at 0 range 1 .. 1; - Reserved_2_31 at 0 range 2 .. 31; - end record; - - -- Peripheral power control. - type POWER_POWER_Field is - (-- Module power disabled. - Disabled, - -- Module power enabled. - Enabled) - with Size => 1; - for POWER_POWER_Field use - (Disabled => 0, - Enabled => 1); - - -- Peripheral power control. - type POWER_Register is record - -- Peripheral power control. - POWER : POWER_POWER_Field := nrf51.ECB.Disabled; - -- unspecified - Reserved_1_31 : nrf51.UInt31 := 16#0#; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for POWER_Register use record - POWER at 0 range 0 .. 0; - Reserved_1_31 at 0 range 1 .. 31; - end record; - - ----------------- - -- Peripherals -- - ----------------- - - -- AES ECB Mode Encryption. - type ECB_Peripheral is record - -- Start ECB block encrypt. If a crypto operation is running, this will - -- not initiate a new encryption and the ERRORECB event will be - -- triggered. - TASKS_STARTECB : aliased nrf51.UInt32; - -- Stop current ECB encryption. If a crypto operation is running, this - -- will will trigger the ERRORECB event. - TASKS_STOPECB : aliased nrf51.UInt32; - -- ECB block encrypt complete. - EVENTS_ENDECB : aliased nrf51.UInt32; - -- ECB block encrypt aborted due to a STOPECB task or due to an error. - EVENTS_ERRORECB : aliased nrf51.UInt32; - -- Interrupt enable set register. - INTENSET : aliased INTENSET_Register; - -- Interrupt enable clear register. - INTENCLR : aliased INTENCLR_Register; - -- ECB block encrypt memory pointer. - ECBDATAPTR : aliased nrf51.UInt32; - -- Peripheral power control. - POWER : aliased POWER_Register; - end record - with Volatile; - - for ECB_Peripheral use record - TASKS_STARTECB at 16#0# range 0 .. 31; - TASKS_STOPECB at 16#4# range 0 .. 31; - EVENTS_ENDECB at 16#100# range 0 .. 31; - EVENTS_ERRORECB at 16#104# range 0 .. 31; - INTENSET at 16#304# range 0 .. 31; - INTENCLR at 16#308# range 0 .. 31; - ECBDATAPTR at 16#504# range 0 .. 31; - POWER at 16#FFC# range 0 .. 31; - end record; - - -- AES ECB Mode Encryption. - ECB_Periph : aliased ECB_Peripheral - with Import, Address => ECB_Base; - -end nrf51.ECB; diff --git a/microbit/nrf51/nrf51-ficr.ads b/microbit/nrf51/nrf51-ficr.ads deleted file mode 100644 index 6a985d2..0000000 --- a/microbit/nrf51/nrf51-ficr.ads +++ /dev/null @@ -1,273 +0,0 @@ -pragma Ada_2012; -pragma Style_Checks (Off); - --- Copyright (c) 2013, Nordic Semiconductor ASA --- All rights reserved. --- --- Redistribution and use in source and binary forms, with or without --- modification, are permitted provided that the following conditions are met: --- --- * Redistributions of source code must retain the above copyright notice, this --- list of conditions and the following disclaimer. --- --- * Redistributions in binary form must reproduce the above copyright notice, --- this list of conditions and the following disclaimer in the documentation --- and/or other materials provided with the distribution. --- --- * Neither the name of Nordic Semiconductor ASA nor the names of its --- contributors may be used to endorse or promote products derived from --- this software without specific prior written permission. --- --- THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" --- AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE --- IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE --- DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE --- FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL --- DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR --- SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER --- CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, --- OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE --- OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. --- - --- This spec has been automatically generated from nrf51.svd - -pragma Restrictions (No_Elaboration_Code); - -with System; - -package nrf51.FICR is - pragma Preelaborate; - - --------------- - -- Registers -- - --------------- - - -- Pre-programmed factory code present. - type PPFC_PPFC_Field is - (-- Present. - Present, - -- Not present. - Notpresent) - with Size => 8; - for PPFC_PPFC_Field use - (Present => 0, - Notpresent => 255); - - -- Pre-programmed factory code present. - type PPFC_Register is record - -- Read-only. Pre-programmed factory code present. - PPFC : PPFC_PPFC_Field; - -- unspecified - Reserved_8_31 : nrf51.UInt24; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for PPFC_Register use record - PPFC at 0 range 0 .. 7; - Reserved_8_31 at 0 range 8 .. 31; - end record; - - -- Deprecated array of size of RAM block in bytes. This name is kept for backward compatinility purposes. Use SIZERAMBLOCKS instead. - - -- Deprecated array of size of RAM block in bytes. This name is kept for - -- backward compatinility purposes. Use SIZERAMBLOCKS instead. - type SIZERAMBLOCK_Registers is array (0 .. 3) of nrf51.UInt32; - - subtype CONFIGID_HWID_Field is nrf51.UInt16; - subtype CONFIGID_FWID_Field is nrf51.UInt16; - - -- Configuration identifier. - type CONFIGID_Register is record - -- Read-only. Hardware Identification Number. - HWID : CONFIGID_HWID_Field; - -- Read-only. Firmware Identification Number pre-loaded into the flash. - FWID : CONFIGID_FWID_Field; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for CONFIGID_Register use record - HWID at 0 range 0 .. 15; - FWID at 0 range 16 .. 31; - end record; - - -- Device identifier. - - -- Device identifier. - type DEVICEID_Registers is array (0 .. 1) of nrf51.UInt32; - - -- Encryption root. - - -- Encryption root. - type ER_Registers is array (0 .. 3) of nrf51.UInt32; - - -- Identity root. - - -- Identity root. - type IR_Registers is array (0 .. 3) of nrf51.UInt32; - - -- Device address type. - type DEVICEADDRTYPE_DEVICEADDRTYPE_Field is - (-- Public address. - Public, - -- Random address. - Random) - with Size => 1; - for DEVICEADDRTYPE_DEVICEADDRTYPE_Field use - (Public => 0, - Random => 1); - - -- Device address type. - type DEVICEADDRTYPE_Register is record - -- Read-only. Device address type. - DEVICEADDRTYPE : DEVICEADDRTYPE_DEVICEADDRTYPE_Field; - -- unspecified - Reserved_1_31 : nrf51.UInt31; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for DEVICEADDRTYPE_Register use record - DEVICEADDRTYPE at 0 range 0 .. 0; - Reserved_1_31 at 0 range 1 .. 31; - end record; - - -- Device address. - - -- Device address. - type DEVICEADDR_Registers is array (0 .. 1) of nrf51.UInt32; - - -- Override default values for NRF_1Mbit mode. - type OVERRIDEEN_NRF_1MBIT_Field is - (-- Override the default values for NRF_1Mbit mode. - Override, - -- Do not override the default values for NRF_1Mbit mode. - Notoverride) - with Size => 1; - for OVERRIDEEN_NRF_1MBIT_Field use - (Override => 0, - Notoverride => 1); - - -- Override default values for BLE_1Mbit mode. - type OVERRIDEEN_BLE_1MBIT_Field is - (-- Override the default values for BLE_1Mbit mode. - Override, - -- Do not override the default values for BLE_1Mbit mode. - Notoverride) - with Size => 1; - for OVERRIDEEN_BLE_1MBIT_Field use - (Override => 0, - Notoverride => 1); - - -- Radio calibration override enable. - type OVERRIDEEN_Register is record - -- Read-only. Override default values for NRF_1Mbit mode. - NRF_1MBIT : OVERRIDEEN_NRF_1MBIT_Field; - -- unspecified - Reserved_1_2 : nrf51.UInt2; - -- Read-only. Override default values for BLE_1Mbit mode. - BLE_1MBIT : OVERRIDEEN_BLE_1MBIT_Field; - -- unspecified - Reserved_4_31 : nrf51.UInt28; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for OVERRIDEEN_Register use record - NRF_1MBIT at 0 range 0 .. 0; - Reserved_1_2 at 0 range 1 .. 2; - BLE_1MBIT at 0 range 3 .. 3; - Reserved_4_31 at 0 range 4 .. 31; - end record; - - -- Override values for the OVERRIDEn registers in RADIO for NRF_1Mbit mode. - - -- Override values for the OVERRIDEn registers in RADIO for NRF_1Mbit mode. - type NRF_1MBIT_Registers is array (0 .. 4) of nrf51.UInt32; - - -- Override values for the OVERRIDEn registers in RADIO for BLE_1Mbit mode. - - -- Override values for the OVERRIDEn registers in RADIO for BLE_1Mbit mode. - type BLE_1MBIT_Registers is array (0 .. 4) of nrf51.UInt32; - - ----------------- - -- Peripherals -- - ----------------- - - type FICR_Disc is - (S, - Default); - - -- Factory Information Configuration. - type FICR_Peripheral - (Discriminent : FICR_Disc := S) - is record - -- Code memory page size in bytes. - CODEPAGESIZE : aliased nrf51.UInt32; - -- Code memory size in pages. - CODESIZE : aliased nrf51.UInt32; - -- Length of code region 0 in bytes. - CLENR0 : aliased nrf51.UInt32; - -- Pre-programmed factory code present. - PPFC : aliased PPFC_Register; - -- Number of individualy controllable RAM blocks. - NUMRAMBLOCK : aliased nrf51.UInt32; - -- Configuration identifier. - CONFIGID : aliased CONFIGID_Register; - -- Device identifier. - DEVICEID : aliased DEVICEID_Registers; - -- Encryption root. - ER : aliased ER_Registers; - -- Identity root. - IR : aliased IR_Registers; - -- Device address type. - DEVICEADDRTYPE : aliased DEVICEADDRTYPE_Register; - -- Device address. - DEVICEADDR : aliased DEVICEADDR_Registers; - -- Radio calibration override enable. - OVERRIDEEN : aliased OVERRIDEEN_Register; - -- Override values for the OVERRIDEn registers in RADIO for NRF_1Mbit - -- mode. - NRF_1MBIT : aliased NRF_1MBIT_Registers; - -- Override values for the OVERRIDEn registers in RADIO for BLE_1Mbit - -- mode. - BLE_1MBIT : aliased BLE_1MBIT_Registers; - case Discriminent is - when S => - -- Size of RAM blocks in bytes. - SIZERAMBLOCKS : aliased nrf51.UInt32; - when Default => - -- Deprecated array of size of RAM block in bytes. This name is - -- kept for backward compatinility purposes. Use SIZERAMBLOCKS - -- instead. - SIZERAMBLOCK : aliased SIZERAMBLOCK_Registers; - end case; - end record - with Unchecked_Union, Volatile; - - for FICR_Peripheral use record - CODEPAGESIZE at 16#10# range 0 .. 31; - CODESIZE at 16#14# range 0 .. 31; - CLENR0 at 16#28# range 0 .. 31; - PPFC at 16#2C# range 0 .. 31; - NUMRAMBLOCK at 16#34# range 0 .. 31; - CONFIGID at 16#5C# range 0 .. 31; - DEVICEID at 16#60# range 0 .. 63; - ER at 16#80# range 0 .. 127; - IR at 16#90# range 0 .. 127; - DEVICEADDRTYPE at 16#A0# range 0 .. 31; - DEVICEADDR at 16#A4# range 0 .. 63; - OVERRIDEEN at 16#AC# range 0 .. 31; - NRF_1MBIT at 16#B0# range 0 .. 159; - BLE_1MBIT at 16#EC# range 0 .. 159; - SIZERAMBLOCKS at 16#38# range 0 .. 31; - SIZERAMBLOCK at 16#38# range 0 .. 127; - end record; - - -- Factory Information Configuration. - FICR_Periph : aliased FICR_Peripheral - with Import, Address => FICR_Base; - -end nrf51.FICR; diff --git a/microbit/nrf51/nrf51-gpio.ads b/microbit/nrf51/nrf51-gpio.ads deleted file mode 100644 index 1c34624..0000000 --- a/microbit/nrf51/nrf51-gpio.ads +++ /dev/null @@ -1,497 +0,0 @@ -pragma Ada_2012; -pragma Style_Checks (Off); - --- Copyright (c) 2013, Nordic Semiconductor ASA --- All rights reserved. --- --- Redistribution and use in source and binary forms, with or without --- modification, are permitted provided that the following conditions are met: --- --- * Redistributions of source code must retain the above copyright notice, this --- list of conditions and the following disclaimer. --- --- * Redistributions in binary form must reproduce the above copyright notice, --- this list of conditions and the following disclaimer in the documentation --- and/or other materials provided with the distribution. --- --- * Neither the name of Nordic Semiconductor ASA nor the names of its --- contributors may be used to endorse or promote products derived from --- this software without specific prior written permission. --- --- THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" --- AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE --- IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE --- DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE --- FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL --- DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR --- SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER --- CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, --- OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE --- OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. --- - --- This spec has been automatically generated from nrf51.svd - -pragma Restrictions (No_Elaboration_Code); - -with System; - -package nrf51.GPIO is - pragma Preelaborate; - - --------------- - -- Registers -- - --------------- - - -- Pin 0. - type OUT_PIN0_Field is - (-- Pin driver is low. - Low, - -- Pin driver is high. - High) - with Size => 1; - for OUT_PIN0_Field use - (Low => 0, - High => 1); - - -- OUT_PIN array - type OUT_PIN_Field_Array is array (0 .. 31) of OUT_PIN0_Field - with Component_Size => 1, Size => 32; - - -- Write GPIO port. - type OUT_Register - (As_Array : Boolean := False) - is record - case As_Array is - when False => - -- PIN as a value - Val : nrf51.UInt32; - when True => - -- PIN as an array - Arr : OUT_PIN_Field_Array; - end case; - end record - with Unchecked_Union, Size => 32, Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for OUT_Register use record - Val at 0 range 0 .. 31; - Arr at 0 range 0 .. 31; - end record; - - -- Pin 0. - type OUTSET_PIN0_Field is - (-- Pin driver is low. - Low, - -- Pin driver is high. - High) - with Size => 1; - for OUTSET_PIN0_Field use - (Low => 0, - High => 1); - - -- Pin 0. - type OUTSET_PIN0_Field_1 is - (-- Reset value for the field - Outset_Pin0_Field_Reset, - -- Set pin driver high. - Set) - with Size => 1; - for OUTSET_PIN0_Field_1 use - (Outset_Pin0_Field_Reset => 0, - Set => 1); - - -- OUTSET_PIN array - type OUTSET_PIN_Field_Array is array (0 .. 31) of OUTSET_PIN0_Field_1 - with Component_Size => 1, Size => 32; - - -- Set individual bits in GPIO port. - type OUTSET_Register - (As_Array : Boolean := False) - is record - case As_Array is - when False => - -- PIN as a value - Val : nrf51.UInt32; - when True => - -- PIN as an array - Arr : OUTSET_PIN_Field_Array; - end case; - end record - with Unchecked_Union, Size => 32, Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for OUTSET_Register use record - Val at 0 range 0 .. 31; - Arr at 0 range 0 .. 31; - end record; - - -- Pin 0. - type OUTCLR_PIN0_Field is - (-- Pin driver is low. - Low, - -- Pin driver is high. - High) - with Size => 1; - for OUTCLR_PIN0_Field use - (Low => 0, - High => 1); - - -- Pin 0. - type OUTCLR_PIN0_Field_1 is - (-- Reset value for the field - Outclr_Pin0_Field_Reset, - -- Set pin driver low. - Clear) - with Size => 1; - for OUTCLR_PIN0_Field_1 use - (Outclr_Pin0_Field_Reset => 0, - Clear => 1); - - -- OUTCLR_PIN array - type OUTCLR_PIN_Field_Array is array (0 .. 31) of OUTCLR_PIN0_Field_1 - with Component_Size => 1, Size => 32; - - -- Clear individual bits in GPIO port. - type OUTCLR_Register - (As_Array : Boolean := False) - is record - case As_Array is - when False => - -- PIN as a value - Val : nrf51.UInt32; - when True => - -- PIN as an array - Arr : OUTCLR_PIN_Field_Array; - end case; - end record - with Unchecked_Union, Size => 32, Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for OUTCLR_Register use record - Val at 0 range 0 .. 31; - Arr at 0 range 0 .. 31; - end record; - - -- Pin 0. - type IN_PIN0_Field is - (-- Pin input is low. - Low, - -- Pin input is high. - High) - with Size => 1; - for IN_PIN0_Field use - (Low => 0, - High => 1); - - -- IN_PIN array - type IN_PIN_Field_Array is array (0 .. 31) of IN_PIN0_Field - with Component_Size => 1, Size => 32; - - -- Read GPIO port. - type IN_Register - (As_Array : Boolean := False) - is record - case As_Array is - when False => - -- PIN as a value - Val : nrf51.UInt32; - when True => - -- PIN as an array - Arr : IN_PIN_Field_Array; - end case; - end record - with Unchecked_Union, Size => 32, Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for IN_Register use record - Val at 0 range 0 .. 31; - Arr at 0 range 0 .. 31; - end record; - - -- Pin 0. - type DIR_PIN0_Field is - (-- Pin set as input. - Input, - -- Pin set as output. - Output) - with Size => 1; - for DIR_PIN0_Field use - (Input => 0, - Output => 1); - - -- DIR_PIN array - type DIR_PIN_Field_Array is array (0 .. 31) of DIR_PIN0_Field - with Component_Size => 1, Size => 32; - - -- Direction of GPIO pins. - type DIR_Register - (As_Array : Boolean := False) - is record - case As_Array is - when False => - -- PIN as a value - Val : nrf51.UInt32; - when True => - -- PIN as an array - Arr : DIR_PIN_Field_Array; - end case; - end record - with Unchecked_Union, Size => 32, Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for DIR_Register use record - Val at 0 range 0 .. 31; - Arr at 0 range 0 .. 31; - end record; - - -- Set as output pin 0. - type DIRSET_PIN0_Field is - (-- Pin set as input. - Input, - -- Pin set as output. - Output) - with Size => 1; - for DIRSET_PIN0_Field use - (Input => 0, - Output => 1); - - -- Set as output pin 0. - type DIRSET_PIN0_Field_1 is - (-- Reset value for the field - Dirset_Pin0_Field_Reset, - -- Set pin as output. - Set) - with Size => 1; - for DIRSET_PIN0_Field_1 use - (Dirset_Pin0_Field_Reset => 0, - Set => 1); - - -- DIRSET_PIN array - type DIRSET_PIN_Field_Array is array (0 .. 31) of DIRSET_PIN0_Field_1 - with Component_Size => 1, Size => 32; - - -- DIR set register. - type DIRSET_Register - (As_Array : Boolean := False) - is record - case As_Array is - when False => - -- PIN as a value - Val : nrf51.UInt32; - when True => - -- PIN as an array - Arr : DIRSET_PIN_Field_Array; - end case; - end record - with Unchecked_Union, Size => 32, Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for DIRSET_Register use record - Val at 0 range 0 .. 31; - Arr at 0 range 0 .. 31; - end record; - - -- Set as input pin 0. - type DIRCLR_PIN0_Field is - (-- Pin set as input. - Input, - -- Pin set as output. - Output) - with Size => 1; - for DIRCLR_PIN0_Field use - (Input => 0, - Output => 1); - - -- Set as input pin 0. - type DIRCLR_PIN0_Field_1 is - (-- Reset value for the field - Dirclr_Pin0_Field_Reset, - -- Set pin as input. - Clear) - with Size => 1; - for DIRCLR_PIN0_Field_1 use - (Dirclr_Pin0_Field_Reset => 0, - Clear => 1); - - -- DIRCLR_PIN array - type DIRCLR_PIN_Field_Array is array (0 .. 31) of DIRCLR_PIN0_Field_1 - with Component_Size => 1, Size => 32; - - -- DIR clear register. - type DIRCLR_Register - (As_Array : Boolean := False) - is record - case As_Array is - when False => - -- PIN as a value - Val : nrf51.UInt32; - when True => - -- PIN as an array - Arr : DIRCLR_PIN_Field_Array; - end case; - end record - with Unchecked_Union, Size => 32, Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for DIRCLR_Register use record - Val at 0 range 0 .. 31; - Arr at 0 range 0 .. 31; - end record; - - -- Pin direction. - type PIN_CNF_DIR_Field is - (-- Configure pin as an input pin. - Input, - -- Configure pin as an output pin. - Output) - with Size => 1; - for PIN_CNF_DIR_Field use - (Input => 0, - Output => 1); - - -- Connect or disconnect input path. - type PIN_CNF_INPUT_Field is - (-- Connect input pin. - Connect, - -- Disconnect input pin. - Disconnect) - with Size => 1; - for PIN_CNF_INPUT_Field use - (Connect => 0, - Disconnect => 1); - - -- Pull-up or -down configuration. - type PIN_CNF_PULL_Field is - (-- No pull. - Disabled, - -- Pulldown on pin. - Pulldown, - -- Pullup on pin. - Pullup) - with Size => 2; - for PIN_CNF_PULL_Field use - (Disabled => 0, - Pulldown => 1, - Pullup => 3); - - -- Drive configuration. - type PIN_CNF_DRIVE_Field is - (-- Standard '0', Standard '1'. - S0S1, - -- High '0', Standard '1'. - H0S1, - -- Standard '0', High '1'. - S0H1, - -- High '0', High '1'. - H0H1, - -- Disconnected '0', Standard '1'. - D0S1, - -- Disconnected '0', High '1'. - D0H1, - -- Standard '0', Disconnected '1'. - S0D1, - -- High '0', Disconnected '1'. - H0D1) - with Size => 3; - for PIN_CNF_DRIVE_Field use - (S0S1 => 0, - H0S1 => 1, - S0H1 => 2, - H0H1 => 3, - D0S1 => 4, - D0H1 => 5, - S0D1 => 6, - H0D1 => 7); - - -- Pin sensing mechanism. - type PIN_CNF_SENSE_Field is - (-- Disabled. - Disabled, - -- Wakeup on high level. - High, - -- Wakeup on low level. - Low) - with Size => 2; - for PIN_CNF_SENSE_Field use - (Disabled => 0, - High => 2, - Low => 3); - - -- Configuration of GPIO pins. - type PIN_CNF_Register is record - -- Pin direction. - DIR : PIN_CNF_DIR_Field := nrf51.GPIO.Input; - -- Connect or disconnect input path. - INPUT : PIN_CNF_INPUT_Field := nrf51.GPIO.Disconnect; - -- Pull-up or -down configuration. - PULL : PIN_CNF_PULL_Field := nrf51.GPIO.Disabled; - -- unspecified - Reserved_4_7 : nrf51.UInt4 := 16#0#; - -- Drive configuration. - DRIVE : PIN_CNF_DRIVE_Field := nrf51.GPIO.S0S1; - -- unspecified - Reserved_11_15 : nrf51.UInt5 := 16#0#; - -- Pin sensing mechanism. - SENSE : PIN_CNF_SENSE_Field := nrf51.GPIO.Disabled; - -- unspecified - Reserved_18_31 : nrf51.UInt14 := 16#0#; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for PIN_CNF_Register use record - DIR at 0 range 0 .. 0; - INPUT at 0 range 1 .. 1; - PULL at 0 range 2 .. 3; - Reserved_4_7 at 0 range 4 .. 7; - DRIVE at 0 range 8 .. 10; - Reserved_11_15 at 0 range 11 .. 15; - SENSE at 0 range 16 .. 17; - Reserved_18_31 at 0 range 18 .. 31; - end record; - - -- Configuration of GPIO pins. - type PIN_CNF_Registers is array (0 .. 31) of PIN_CNF_Register; - - ----------------- - -- Peripherals -- - ----------------- - - -- General purpose input and output. - type GPIO_Peripheral is record - -- Write GPIO port. - OUT_k : aliased OUT_Register; - -- Set individual bits in GPIO port. - OUTSET : aliased OUTSET_Register; - -- Clear individual bits in GPIO port. - OUTCLR : aliased OUTCLR_Register; - -- Read GPIO port. - IN_k : aliased IN_Register; - -- Direction of GPIO pins. - DIR : aliased DIR_Register; - -- DIR set register. - DIRSET : aliased DIRSET_Register; - -- DIR clear register. - DIRCLR : aliased DIRCLR_Register; - -- Configuration of GPIO pins. - PIN_CNF : aliased PIN_CNF_Registers; - end record - with Volatile; - - for GPIO_Peripheral use record - OUT_k at 16#504# range 0 .. 31; - OUTSET at 16#508# range 0 .. 31; - OUTCLR at 16#50C# range 0 .. 31; - IN_k at 16#510# range 0 .. 31; - DIR at 16#514# range 0 .. 31; - DIRSET at 16#518# range 0 .. 31; - DIRCLR at 16#51C# range 0 .. 31; - PIN_CNF at 16#700# range 0 .. 1023; - end record; - - -- General purpose input and output. - GPIO_Periph : aliased GPIO_Peripheral - with Import, Address => GPIO_Base; - -end nrf51.GPIO; diff --git a/microbit/nrf51/nrf51-gpiote.ads b/microbit/nrf51/nrf51-gpiote.ads deleted file mode 100644 index 0097cfd..0000000 --- a/microbit/nrf51/nrf51-gpiote.ads +++ /dev/null @@ -1,375 +0,0 @@ -pragma Ada_2012; -pragma Style_Checks (Off); - --- Copyright (c) 2013, Nordic Semiconductor ASA --- All rights reserved. --- --- Redistribution and use in source and binary forms, with or without --- modification, are permitted provided that the following conditions are met: --- --- * Redistributions of source code must retain the above copyright notice, this --- list of conditions and the following disclaimer. --- --- * Redistributions in binary form must reproduce the above copyright notice, --- this list of conditions and the following disclaimer in the documentation --- and/or other materials provided with the distribution. --- --- * Neither the name of Nordic Semiconductor ASA nor the names of its --- contributors may be used to endorse or promote products derived from --- this software without specific prior written permission. --- --- THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" --- AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE --- IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE --- DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE --- FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL --- DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR --- SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER --- CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, --- OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE --- OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. --- - --- This spec has been automatically generated from nrf51.svd - -pragma Restrictions (No_Elaboration_Code); - -with System; - -package nrf51.GPIOTE is - pragma Preelaborate; - - --------------- - -- Registers -- - --------------- - - -- Tasks asssociated with GPIOTE channels. - - -- Tasks asssociated with GPIOTE channels. - type TASKS_OUT_Registers is array (0 .. 3) of nrf51.UInt32; - - -- Tasks asssociated with GPIOTE channels. - - -- Tasks asssociated with GPIOTE channels. - type EVENTS_IN_Registers is array (0 .. 3) of nrf51.UInt32; - - -- Enable interrupt on IN[0] event. - type INTENSET_IN0_Field is - (-- Interrupt disabled. - Disabled, - -- Interrupt enabled. - Enabled) - with Size => 1; - for INTENSET_IN0_Field use - (Disabled => 0, - Enabled => 1); - - -- Enable interrupt on IN[0] event. - type INTENSET_IN0_Field_1 is - (-- Reset value for the field - Intenset_In0_Field_Reset, - -- Enable interrupt on write. - Set) - with Size => 1; - for INTENSET_IN0_Field_1 use - (Intenset_In0_Field_Reset => 0, - Set => 1); - - -- INTENSET_IN array - type INTENSET_IN_Field_Array is array (0 .. 3) of INTENSET_IN0_Field_1 - with Component_Size => 1, Size => 4; - - -- Type definition for INTENSET_IN - type INTENSET_IN_Field - (As_Array : Boolean := False) - is record - case As_Array is - when False => - -- IN as a value - Val : nrf51.UInt4; - when True => - -- IN as an array - Arr : INTENSET_IN_Field_Array; - end case; - end record - with Unchecked_Union, Size => 4; - - for INTENSET_IN_Field use record - Val at 0 range 0 .. 3; - Arr at 0 range 0 .. 3; - end record; - - -- Enable interrupt on PORT event. - type INTENSET_PORT_Field is - (-- Interrupt disabled. - Disabled, - -- Interrupt enabled. - Enabled) - with Size => 1; - for INTENSET_PORT_Field use - (Disabled => 0, - Enabled => 1); - - -- Enable interrupt on PORT event. - type INTENSET_PORT_Field_1 is - (-- Reset value for the field - Intenset_Port_Field_Reset, - -- Enable interrupt on write. - Set) - with Size => 1; - for INTENSET_PORT_Field_1 use - (Intenset_Port_Field_Reset => 0, - Set => 1); - - -- Interrupt enable set register. - type INTENSET_Register is record - -- Enable interrupt on IN[0] event. - IN_k : INTENSET_IN_Field := (As_Array => False, Val => 16#0#); - -- unspecified - Reserved_4_30 : nrf51.UInt27 := 16#0#; - -- Enable interrupt on PORT event. - PORT : INTENSET_PORT_Field_1 := Intenset_Port_Field_Reset; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for INTENSET_Register use record - IN_k at 0 range 0 .. 3; - Reserved_4_30 at 0 range 4 .. 30; - PORT at 0 range 31 .. 31; - end record; - - -- Disable interrupt on IN[0] event. - type INTENCLR_IN0_Field is - (-- Interrupt disabled. - Disabled, - -- Interrupt enabled. - Enabled) - with Size => 1; - for INTENCLR_IN0_Field use - (Disabled => 0, - Enabled => 1); - - -- Disable interrupt on IN[0] event. - type INTENCLR_IN0_Field_1 is - (-- Reset value for the field - Intenclr_In0_Field_Reset, - -- Disable interrupt on write. - Clear) - with Size => 1; - for INTENCLR_IN0_Field_1 use - (Intenclr_In0_Field_Reset => 0, - Clear => 1); - - -- INTENCLR_IN array - type INTENCLR_IN_Field_Array is array (0 .. 3) of INTENCLR_IN0_Field_1 - with Component_Size => 1, Size => 4; - - -- Type definition for INTENCLR_IN - type INTENCLR_IN_Field - (As_Array : Boolean := False) - is record - case As_Array is - when False => - -- IN as a value - Val : nrf51.UInt4; - when True => - -- IN as an array - Arr : INTENCLR_IN_Field_Array; - end case; - end record - with Unchecked_Union, Size => 4; - - for INTENCLR_IN_Field use record - Val at 0 range 0 .. 3; - Arr at 0 range 0 .. 3; - end record; - - -- Disable interrupt on PORT event. - type INTENCLR_PORT_Field is - (-- Interrupt disabled. - Disabled, - -- Interrupt enabled. - Enabled) - with Size => 1; - for INTENCLR_PORT_Field use - (Disabled => 0, - Enabled => 1); - - -- Disable interrupt on PORT event. - type INTENCLR_PORT_Field_1 is - (-- Reset value for the field - Intenclr_Port_Field_Reset, - -- Disable interrupt on write. - Clear) - with Size => 1; - for INTENCLR_PORT_Field_1 use - (Intenclr_Port_Field_Reset => 0, - Clear => 1); - - -- Interrupt enable clear register. - type INTENCLR_Register is record - -- Disable interrupt on IN[0] event. - IN_k : INTENCLR_IN_Field := (As_Array => False, Val => 16#0#); - -- unspecified - Reserved_4_30 : nrf51.UInt27 := 16#0#; - -- Disable interrupt on PORT event. - PORT : INTENCLR_PORT_Field_1 := Intenclr_Port_Field_Reset; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for INTENCLR_Register use record - IN_k at 0 range 0 .. 3; - Reserved_4_30 at 0 range 4 .. 30; - PORT at 0 range 31 .. 31; - end record; - - -- Mode - type CONFIG_MODE_Field is - (-- Disabled. - Disabled, - -- Channel configure in event mode. - Event, - -- Channel configure in task mode. - Task_k) - with Size => 2; - for CONFIG_MODE_Field use - (Disabled => 0, - Event => 1, - Task_k => 3); - - subtype CONFIG_PSEL_Field is nrf51.UInt5; - - -- Effects on output when in Task mode, or events on input that generates - -- an event. - type CONFIG_POLARITY_Field is - (-- No task or event. - None, - -- Low to high. - Lotohi, - -- High to low. - Hitolo, - -- Toggle. - Toggle) - with Size => 2; - for CONFIG_POLARITY_Field use - (None => 0, - Lotohi => 1, - Hitolo => 2, - Toggle => 3); - - -- Initial value of the output when the GPIOTE channel is configured as a - -- Task. - type CONFIG_OUTINIT_Field is - (-- Initial low output when in task mode. - Low, - -- Initial high output when in task mode. - High) - with Size => 1; - for CONFIG_OUTINIT_Field use - (Low => 0, - High => 1); - - -- Channel configuration registers. - type CONFIG_Register is record - -- Mode - MODE : CONFIG_MODE_Field := nrf51.GPIOTE.Disabled; - -- unspecified - Reserved_2_7 : nrf51.UInt6 := 16#0#; - -- Pin select. - PSEL : CONFIG_PSEL_Field := 16#0#; - -- unspecified - Reserved_13_15 : nrf51.UInt3 := 16#0#; - -- Effects on output when in Task mode, or events on input that - -- generates an event. - POLARITY : CONFIG_POLARITY_Field := nrf51.GPIOTE.None; - -- unspecified - Reserved_18_19 : nrf51.UInt2 := 16#0#; - -- Initial value of the output when the GPIOTE channel is configured as - -- a Task. - OUTINIT : CONFIG_OUTINIT_Field := nrf51.GPIOTE.Low; - -- unspecified - Reserved_21_31 : nrf51.UInt11 := 16#0#; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for CONFIG_Register use record - MODE at 0 range 0 .. 1; - Reserved_2_7 at 0 range 2 .. 7; - PSEL at 0 range 8 .. 12; - Reserved_13_15 at 0 range 13 .. 15; - POLARITY at 0 range 16 .. 17; - Reserved_18_19 at 0 range 18 .. 19; - OUTINIT at 0 range 20 .. 20; - Reserved_21_31 at 0 range 21 .. 31; - end record; - - -- Channel configuration registers. - type CONFIG_Registers is array (0 .. 3) of CONFIG_Register; - - -- Peripheral power control. - type POWER_POWER_Field is - (-- Module power disabled. - Disabled, - -- Module power enabled. - Enabled) - with Size => 1; - for POWER_POWER_Field use - (Disabled => 0, - Enabled => 1); - - -- Peripheral power control. - type POWER_Register is record - -- Peripheral power control. - POWER : POWER_POWER_Field := nrf51.GPIOTE.Disabled; - -- unspecified - Reserved_1_31 : nrf51.UInt31 := 16#0#; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for POWER_Register use record - POWER at 0 range 0 .. 0; - Reserved_1_31 at 0 range 1 .. 31; - end record; - - ----------------- - -- Peripherals -- - ----------------- - - -- GPIO tasks and events. - type GPIOTE_Peripheral is record - -- Tasks asssociated with GPIOTE channels. - TASKS_OUT : aliased TASKS_OUT_Registers; - -- Tasks asssociated with GPIOTE channels. - EVENTS_IN : aliased EVENTS_IN_Registers; - -- Event generated from multiple pins. - EVENTS_PORT : aliased nrf51.UInt32; - -- Interrupt enable set register. - INTENSET : aliased INTENSET_Register; - -- Interrupt enable clear register. - INTENCLR : aliased INTENCLR_Register; - -- Channel configuration registers. - CONFIG : aliased CONFIG_Registers; - -- Peripheral power control. - POWER : aliased POWER_Register; - end record - with Volatile; - - for GPIOTE_Peripheral use record - TASKS_OUT at 16#0# range 0 .. 127; - EVENTS_IN at 16#100# range 0 .. 127; - EVENTS_PORT at 16#17C# range 0 .. 31; - INTENSET at 16#304# range 0 .. 31; - INTENCLR at 16#308# range 0 .. 31; - CONFIG at 16#510# range 0 .. 127; - POWER at 16#FFC# range 0 .. 31; - end record; - - -- GPIO tasks and events. - GPIOTE_Periph : aliased GPIOTE_Peripheral - with Import, Address => GPIOTE_Base; - -end nrf51.GPIOTE; diff --git a/microbit/nrf51/nrf51-lpcomp.ads b/microbit/nrf51/nrf51-lpcomp.ads deleted file mode 100644 index a238a63..0000000 --- a/microbit/nrf51/nrf51-lpcomp.ads +++ /dev/null @@ -1,642 +0,0 @@ -pragma Ada_2012; -pragma Style_Checks (Off); - --- Copyright (c) 2013, Nordic Semiconductor ASA --- All rights reserved. --- --- Redistribution and use in source and binary forms, with or without --- modification, are permitted provided that the following conditions are met: --- --- * Redistributions of source code must retain the above copyright notice, this --- list of conditions and the following disclaimer. --- --- * Redistributions in binary form must reproduce the above copyright notice, --- this list of conditions and the following disclaimer in the documentation --- and/or other materials provided with the distribution. --- --- * Neither the name of Nordic Semiconductor ASA nor the names of its --- contributors may be used to endorse or promote products derived from --- this software without specific prior written permission. --- --- THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" --- AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE --- IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE --- DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE --- FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL --- DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR --- SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER --- CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, --- OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE --- OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. --- - --- This spec has been automatically generated from nrf51.svd - -pragma Restrictions (No_Elaboration_Code); - -with System; - -package nrf51.LPCOMP is - pragma Preelaborate; - - --------------- - -- Registers -- - --------------- - - -- Shortcut between READY event and SAMPLE task. - type SHORTS_READY_SAMPLE_Field is - (-- Shortcut disabled. - Disabled, - -- Shortcut enabled. - Enabled) - with Size => 1; - for SHORTS_READY_SAMPLE_Field use - (Disabled => 0, - Enabled => 1); - - -- Shortcut between RADY event and STOP task. - type SHORTS_READY_STOP_Field is - (-- Shortcut disabled. - Disabled, - -- Shortcut enabled. - Enabled) - with Size => 1; - for SHORTS_READY_STOP_Field use - (Disabled => 0, - Enabled => 1); - - -- Shortcut between DOWN event and STOP task. - type SHORTS_DOWN_STOP_Field is - (-- Shortcut disabled. - Disabled, - -- Shortcut enabled. - Enabled) - with Size => 1; - for SHORTS_DOWN_STOP_Field use - (Disabled => 0, - Enabled => 1); - - -- Shortcut between UP event and STOP task. - type SHORTS_UP_STOP_Field is - (-- Shortcut disabled. - Disabled, - -- Shortcut enabled. - Enabled) - with Size => 1; - for SHORTS_UP_STOP_Field use - (Disabled => 0, - Enabled => 1); - - -- Shortcut between CROSS event and STOP task. - type SHORTS_CROSS_STOP_Field is - (-- Shortcut disabled. - Disabled, - -- Shortcut enabled. - Enabled) - with Size => 1; - for SHORTS_CROSS_STOP_Field use - (Disabled => 0, - Enabled => 1); - - -- Shortcuts for the LPCOMP. - type SHORTS_Register is record - -- Shortcut between READY event and SAMPLE task. - READY_SAMPLE : SHORTS_READY_SAMPLE_Field := nrf51.LPCOMP.Disabled; - -- Shortcut between RADY event and STOP task. - READY_STOP : SHORTS_READY_STOP_Field := nrf51.LPCOMP.Disabled; - -- Shortcut between DOWN event and STOP task. - DOWN_STOP : SHORTS_DOWN_STOP_Field := nrf51.LPCOMP.Disabled; - -- Shortcut between UP event and STOP task. - UP_STOP : SHORTS_UP_STOP_Field := nrf51.LPCOMP.Disabled; - -- Shortcut between CROSS event and STOP task. - CROSS_STOP : SHORTS_CROSS_STOP_Field := nrf51.LPCOMP.Disabled; - -- unspecified - Reserved_5_31 : nrf51.UInt27 := 16#0#; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for SHORTS_Register use record - READY_SAMPLE at 0 range 0 .. 0; - READY_STOP at 0 range 1 .. 1; - DOWN_STOP at 0 range 2 .. 2; - UP_STOP at 0 range 3 .. 3; - CROSS_STOP at 0 range 4 .. 4; - Reserved_5_31 at 0 range 5 .. 31; - end record; - - -- Enable interrupt on READY event. - type INTENSET_READY_Field is - (-- Interrupt disabled. - Disabled, - -- Interrupt enabled. - Enabled) - with Size => 1; - for INTENSET_READY_Field use - (Disabled => 0, - Enabled => 1); - - -- Enable interrupt on READY event. - type INTENSET_READY_Field_1 is - (-- Reset value for the field - Intenset_Ready_Field_Reset, - -- Enable interrupt on write. - Set) - with Size => 1; - for INTENSET_READY_Field_1 use - (Intenset_Ready_Field_Reset => 0, - Set => 1); - - -- Enable interrupt on DOWN event. - type INTENSET_DOWN_Field is - (-- Interrupt disabled. - Disabled, - -- Interrupt enabled. - Enabled) - with Size => 1; - for INTENSET_DOWN_Field use - (Disabled => 0, - Enabled => 1); - - -- Enable interrupt on DOWN event. - type INTENSET_DOWN_Field_1 is - (-- Reset value for the field - Intenset_Down_Field_Reset, - -- Enable interrupt on write. - Set) - with Size => 1; - for INTENSET_DOWN_Field_1 use - (Intenset_Down_Field_Reset => 0, - Set => 1); - - -- Enable interrupt on UP event. - type INTENSET_UP_Field is - (-- Interrupt disabled. - Disabled, - -- Interrupt enabled. - Enabled) - with Size => 1; - for INTENSET_UP_Field use - (Disabled => 0, - Enabled => 1); - - -- Enable interrupt on UP event. - type INTENSET_UP_Field_1 is - (-- Reset value for the field - Intenset_Up_Field_Reset, - -- Enable interrupt on write. - Set) - with Size => 1; - for INTENSET_UP_Field_1 use - (Intenset_Up_Field_Reset => 0, - Set => 1); - - -- Enable interrupt on CROSS event. - type INTENSET_CROSS_Field is - (-- Interrupt disabled. - Disabled, - -- Interrupt enabled. - Enabled) - with Size => 1; - for INTENSET_CROSS_Field use - (Disabled => 0, - Enabled => 1); - - -- Enable interrupt on CROSS event. - type INTENSET_CROSS_Field_1 is - (-- Reset value for the field - Intenset_Cross_Field_Reset, - -- Enable interrupt on write. - Set) - with Size => 1; - for INTENSET_CROSS_Field_1 use - (Intenset_Cross_Field_Reset => 0, - Set => 1); - - -- Interrupt enable set register. - type INTENSET_Register is record - -- Enable interrupt on READY event. - READY : INTENSET_READY_Field_1 := Intenset_Ready_Field_Reset; - -- Enable interrupt on DOWN event. - DOWN : INTENSET_DOWN_Field_1 := Intenset_Down_Field_Reset; - -- Enable interrupt on UP event. - UP : INTENSET_UP_Field_1 := Intenset_Up_Field_Reset; - -- Enable interrupt on CROSS event. - CROSS : INTENSET_CROSS_Field_1 := Intenset_Cross_Field_Reset; - -- unspecified - Reserved_4_31 : nrf51.UInt28 := 16#0#; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for INTENSET_Register use record - READY at 0 range 0 .. 0; - DOWN at 0 range 1 .. 1; - UP at 0 range 2 .. 2; - CROSS at 0 range 3 .. 3; - Reserved_4_31 at 0 range 4 .. 31; - end record; - - -- Disable interrupt on READY event. - type INTENCLR_READY_Field is - (-- Interrupt disabled. - Disabled, - -- Interrupt enabled. - Enabled) - with Size => 1; - for INTENCLR_READY_Field use - (Disabled => 0, - Enabled => 1); - - -- Disable interrupt on READY event. - type INTENCLR_READY_Field_1 is - (-- Reset value for the field - Intenclr_Ready_Field_Reset, - -- Disable interrupt on write. - Clear) - with Size => 1; - for INTENCLR_READY_Field_1 use - (Intenclr_Ready_Field_Reset => 0, - Clear => 1); - - -- Disable interrupt on DOWN event. - type INTENCLR_DOWN_Field is - (-- Interrupt disabled. - Disabled, - -- Interrupt enabled. - Enabled) - with Size => 1; - for INTENCLR_DOWN_Field use - (Disabled => 0, - Enabled => 1); - - -- Disable interrupt on DOWN event. - type INTENCLR_DOWN_Field_1 is - (-- Reset value for the field - Intenclr_Down_Field_Reset, - -- Disable interrupt on write. - Clear) - with Size => 1; - for INTENCLR_DOWN_Field_1 use - (Intenclr_Down_Field_Reset => 0, - Clear => 1); - - -- Disable interrupt on UP event. - type INTENCLR_UP_Field is - (-- Interrupt disabled. - Disabled, - -- Interrupt enabled. - Enabled) - with Size => 1; - for INTENCLR_UP_Field use - (Disabled => 0, - Enabled => 1); - - -- Disable interrupt on UP event. - type INTENCLR_UP_Field_1 is - (-- Reset value for the field - Intenclr_Up_Field_Reset, - -- Disable interrupt on write. - Clear) - with Size => 1; - for INTENCLR_UP_Field_1 use - (Intenclr_Up_Field_Reset => 0, - Clear => 1); - - -- Disable interrupt on CROSS event. - type INTENCLR_CROSS_Field is - (-- Interrupt disabled. - Disabled, - -- Interrupt enabled. - Enabled) - with Size => 1; - for INTENCLR_CROSS_Field use - (Disabled => 0, - Enabled => 1); - - -- Disable interrupt on CROSS event. - type INTENCLR_CROSS_Field_1 is - (-- Reset value for the field - Intenclr_Cross_Field_Reset, - -- Disable interrupt on write. - Clear) - with Size => 1; - for INTENCLR_CROSS_Field_1 use - (Intenclr_Cross_Field_Reset => 0, - Clear => 1); - - -- Interrupt enable clear register. - type INTENCLR_Register is record - -- Disable interrupt on READY event. - READY : INTENCLR_READY_Field_1 := Intenclr_Ready_Field_Reset; - -- Disable interrupt on DOWN event. - DOWN : INTENCLR_DOWN_Field_1 := Intenclr_Down_Field_Reset; - -- Disable interrupt on UP event. - UP : INTENCLR_UP_Field_1 := Intenclr_Up_Field_Reset; - -- Disable interrupt on CROSS event. - CROSS : INTENCLR_CROSS_Field_1 := Intenclr_Cross_Field_Reset; - -- unspecified - Reserved_4_31 : nrf51.UInt28 := 16#0#; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for INTENCLR_Register use record - READY at 0 range 0 .. 0; - DOWN at 0 range 1 .. 1; - UP at 0 range 2 .. 2; - CROSS at 0 range 3 .. 3; - Reserved_4_31 at 0 range 4 .. 31; - end record; - - -- Result of last compare. Decision point SAMPLE task. - type RESULT_RESULT_Field is - (-- Input voltage is bellow the reference threshold. - Bellow, - -- Input voltage is above the reference threshold. - Above) - with Size => 1; - for RESULT_RESULT_Field use - (Bellow => 0, - Above => 1); - - -- Result of last compare. - type RESULT_Register is record - -- Read-only. Result of last compare. Decision point SAMPLE task. - RESULT : RESULT_RESULT_Field; - -- unspecified - Reserved_1_31 : nrf51.UInt31; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for RESULT_Register use record - RESULT at 0 range 0 .. 0; - Reserved_1_31 at 0 range 1 .. 31; - end record; - - -- Enable or disable LPCOMP. - type ENABLE_ENABLE_Field is - (-- Disabled LPCOMP. - Disabled, - -- Enable LPCOMP. - Enabled) - with Size => 2; - for ENABLE_ENABLE_Field use - (Disabled => 0, - Enabled => 1); - - -- Enable the LPCOMP. - type ENABLE_Register is record - -- Enable or disable LPCOMP. - ENABLE : ENABLE_ENABLE_Field := nrf51.LPCOMP.Disabled; - -- unspecified - Reserved_2_31 : nrf51.UInt30 := 16#0#; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for ENABLE_Register use record - ENABLE at 0 range 0 .. 1; - Reserved_2_31 at 0 range 2 .. 31; - end record; - - -- Analog input pin select. - type PSEL_PSEL_Field is - (-- Use analog input 0 as analog input. - Analoginput0, - -- Use analog input 1 as analog input. - Analoginput1, - -- Use analog input 2 as analog input. - Analoginput2, - -- Use analog input 3 as analog input. - Analoginput3, - -- Use analog input 4 as analog input. - Analoginput4, - -- Use analog input 5 as analog input. - Analoginput5, - -- Use analog input 6 as analog input. - Analoginput6, - -- Use analog input 7 as analog input. - Analoginput7) - with Size => 3; - for PSEL_PSEL_Field use - (Analoginput0 => 0, - Analoginput1 => 1, - Analoginput2 => 2, - Analoginput3 => 3, - Analoginput4 => 4, - Analoginput5 => 5, - Analoginput6 => 6, - Analoginput7 => 7); - - -- Input pin select. - type PSEL_Register is record - -- Analog input pin select. - PSEL : PSEL_PSEL_Field := nrf51.LPCOMP.Analoginput0; - -- unspecified - Reserved_3_31 : nrf51.UInt29 := 16#0#; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for PSEL_Register use record - PSEL at 0 range 0 .. 2; - Reserved_3_31 at 0 range 3 .. 31; - end record; - - -- Reference select. - type REFSEL_REFSEL_Field is - (-- Use supply with a 1/8 prescaler as reference. - Supplyoneeighthprescaling, - -- Use supply with a 2/8 prescaler as reference. - Supplytwoeighthsprescaling, - -- Use supply with a 3/8 prescaler as reference. - Supplythreeeighthsprescaling, - -- Use supply with a 4/8 prescaler as reference. - Supplyfoureighthsprescaling, - -- Use supply with a 5/8 prescaler as reference. - Supplyfiveeighthsprescaling, - -- Use supply with a 6/8 prescaler as reference. - Supplysixeighthsprescaling, - -- Use supply with a 7/8 prescaler as reference. - Supplyseveneighthsprescaling, - -- Use external analog reference as reference. - Aref) - with Size => 3; - for REFSEL_REFSEL_Field use - (Supplyoneeighthprescaling => 0, - Supplytwoeighthsprescaling => 1, - Supplythreeeighthsprescaling => 2, - Supplyfoureighthsprescaling => 3, - Supplyfiveeighthsprescaling => 4, - Supplysixeighthsprescaling => 5, - Supplyseveneighthsprescaling => 6, - Aref => 7); - - -- Reference select. - type REFSEL_Register is record - -- Reference select. - REFSEL : REFSEL_REFSEL_Field := - nrf51.LPCOMP.Supplyoneeighthprescaling; - -- unspecified - Reserved_3_31 : nrf51.UInt29 := 16#0#; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for REFSEL_Register use record - REFSEL at 0 range 0 .. 2; - Reserved_3_31 at 0 range 3 .. 31; - end record; - - -- External analog reference pin selection. - type EXTREFSEL_EXTREFSEL_Field is - (-- Use analog reference 0 as reference. - Analogreference0, - -- Use analog reference 1 as reference. - Analogreference1) - with Size => 1; - for EXTREFSEL_EXTREFSEL_Field use - (Analogreference0 => 0, - Analogreference1 => 1); - - -- External reference select. - type EXTREFSEL_Register is record - -- External analog reference pin selection. - EXTREFSEL : EXTREFSEL_EXTREFSEL_Field := - nrf51.LPCOMP.Analogreference0; - -- unspecified - Reserved_1_31 : nrf51.UInt31 := 16#0#; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for EXTREFSEL_Register use record - EXTREFSEL at 0 range 0 .. 0; - Reserved_1_31 at 0 range 1 .. 31; - end record; - - -- Analog detect configuration. - type ANADETECT_ANADETECT_Field is - (-- Generate ANADETEC on crossing, both upwards and downwards crossing. - Cross, - -- Generate ANADETEC on upwards crossing only. - Up, - -- Generate ANADETEC on downwards crossing only. - Down) - with Size => 2; - for ANADETECT_ANADETECT_Field use - (Cross => 0, - Up => 1, - Down => 2); - - -- Analog detect configuration. - type ANADETECT_Register is record - -- Analog detect configuration. - ANADETECT : ANADETECT_ANADETECT_Field := nrf51.LPCOMP.Cross; - -- unspecified - Reserved_2_31 : nrf51.UInt30 := 16#0#; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for ANADETECT_Register use record - ANADETECT at 0 range 0 .. 1; - Reserved_2_31 at 0 range 2 .. 31; - end record; - - -- Peripheral power control. - type POWER_POWER_Field is - (-- Module power disabled. - Disabled, - -- Module power enabled. - Enabled) - with Size => 1; - for POWER_POWER_Field use - (Disabled => 0, - Enabled => 1); - - -- Peripheral power control. - type POWER_Register is record - -- Peripheral power control. - POWER : POWER_POWER_Field := nrf51.LPCOMP.Disabled; - -- unspecified - Reserved_1_31 : nrf51.UInt31 := 16#0#; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for POWER_Register use record - POWER at 0 range 0 .. 0; - Reserved_1_31 at 0 range 1 .. 31; - end record; - - ----------------- - -- Peripherals -- - ----------------- - - -- Low power comparator. - type LPCOMP_Peripheral is record - -- Start the comparator. - TASKS_START : aliased nrf51.UInt32; - -- Stop the comparator. - TASKS_STOP : aliased nrf51.UInt32; - -- Sample comparator value. - TASKS_SAMPLE : aliased nrf51.UInt32; - -- LPCOMP is ready and output is valid. - EVENTS_READY : aliased nrf51.UInt32; - -- Input voltage crossed the threshold going down. - EVENTS_DOWN : aliased nrf51.UInt32; - -- Input voltage crossed the threshold going up. - EVENTS_UP : aliased nrf51.UInt32; - -- Input voltage crossed the threshold in any direction. - EVENTS_CROSS : aliased nrf51.UInt32; - -- Shortcuts for the LPCOMP. - SHORTS : aliased SHORTS_Register; - -- Interrupt enable set register. - INTENSET : aliased INTENSET_Register; - -- Interrupt enable clear register. - INTENCLR : aliased INTENCLR_Register; - -- Result of last compare. - RESULT : aliased RESULT_Register; - -- Enable the LPCOMP. - ENABLE : aliased ENABLE_Register; - -- Input pin select. - PSEL : aliased PSEL_Register; - -- Reference select. - REFSEL : aliased REFSEL_Register; - -- External reference select. - EXTREFSEL : aliased EXTREFSEL_Register; - -- Analog detect configuration. - ANADETECT : aliased ANADETECT_Register; - -- Peripheral power control. - POWER : aliased POWER_Register; - end record - with Volatile; - - for LPCOMP_Peripheral use record - TASKS_START at 16#0# range 0 .. 31; - TASKS_STOP at 16#4# range 0 .. 31; - TASKS_SAMPLE at 16#8# range 0 .. 31; - EVENTS_READY at 16#100# range 0 .. 31; - EVENTS_DOWN at 16#104# range 0 .. 31; - EVENTS_UP at 16#108# range 0 .. 31; - EVENTS_CROSS at 16#10C# range 0 .. 31; - SHORTS at 16#200# range 0 .. 31; - INTENSET at 16#304# range 0 .. 31; - INTENCLR at 16#308# range 0 .. 31; - RESULT at 16#400# range 0 .. 31; - ENABLE at 16#500# range 0 .. 31; - PSEL at 16#504# range 0 .. 31; - REFSEL at 16#508# range 0 .. 31; - EXTREFSEL at 16#50C# range 0 .. 31; - ANADETECT at 16#520# range 0 .. 31; - POWER at 16#FFC# range 0 .. 31; - end record; - - -- Low power comparator. - LPCOMP_Periph : aliased LPCOMP_Peripheral - with Import, Address => LPCOMP_Base; - -end nrf51.LPCOMP; diff --git a/microbit/nrf51/nrf51-mpu.ads b/microbit/nrf51/nrf51-mpu.ads deleted file mode 100644 index 8e24a30..0000000 --- a/microbit/nrf51/nrf51-mpu.ads +++ /dev/null @@ -1,531 +0,0 @@ -pragma Ada_2012; -pragma Style_Checks (Off); - --- Copyright (c) 2013, Nordic Semiconductor ASA --- All rights reserved. --- --- Redistribution and use in source and binary forms, with or without --- modification, are permitted provided that the following conditions are met: --- --- * Redistributions of source code must retain the above copyright notice, this --- list of conditions and the following disclaimer. --- --- * Redistributions in binary form must reproduce the above copyright notice, --- this list of conditions and the following disclaimer in the documentation --- and/or other materials provided with the distribution. --- --- * Neither the name of Nordic Semiconductor ASA nor the names of its --- contributors may be used to endorse or promote products derived from --- this software without specific prior written permission. --- --- THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" --- AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE --- IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE --- DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE --- FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL --- DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR --- SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER --- CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, --- OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE --- OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. --- - --- This spec has been automatically generated from nrf51.svd - -pragma Restrictions (No_Elaboration_Code); - -with System; - -package nrf51.MPU is - pragma Preelaborate; - - --------------- - -- Registers -- - --------------- - - -- POWER_CLOCK region configuration. - type PERR0_POWER_CLOCK_Field is - (-- Peripheral configured in region 1. - Inregion1, - -- Peripheral configured in region 0. - Inregion0) - with Size => 1; - for PERR0_POWER_CLOCK_Field use - (Inregion1 => 0, - Inregion0 => 1); - - -- RADIO region configuration. - type PERR0_RADIO_Field is - (-- Peripheral configured in region 1. - Inregion1, - -- Peripheral configured in region 0. - Inregion0) - with Size => 1; - for PERR0_RADIO_Field use - (Inregion1 => 0, - Inregion0 => 1); - - -- UART0 region configuration. - type PERR0_UART0_Field is - (-- Peripheral configured in region 1. - Inregion1, - -- Peripheral configured in region 0. - Inregion0) - with Size => 1; - for PERR0_UART0_Field use - (Inregion1 => 0, - Inregion0 => 1); - - -- SPI0 and TWI0 region configuration. - type PERR0_SPI0_TWI0_Field is - (-- Peripheral configured in region 1. - Inregion1, - -- Peripheral configured in region 0. - Inregion0) - with Size => 1; - for PERR0_SPI0_TWI0_Field use - (Inregion1 => 0, - Inregion0 => 1); - - -- SPI1 and TWI1 region configuration. - type PERR0_SPI1_TWI1_Field is - (-- Peripheral configured in region 1. - Inregion1, - -- Peripheral configured in region 0. - Inregion0) - with Size => 1; - for PERR0_SPI1_TWI1_Field use - (Inregion1 => 0, - Inregion0 => 1); - - -- GPIOTE region configuration. - type PERR0_GPIOTE_Field is - (-- Peripheral configured in region 1. - Inregion1, - -- Peripheral configured in region 0. - Inregion0) - with Size => 1; - for PERR0_GPIOTE_Field use - (Inregion1 => 0, - Inregion0 => 1); - - -- ADC region configuration. - type PERR0_ADC_Field is - (-- Peripheral configured in region 1. - Inregion1, - -- Peripheral configured in region 0. - Inregion0) - with Size => 1; - for PERR0_ADC_Field use - (Inregion1 => 0, - Inregion0 => 1); - - -- TIMER0 region configuration. - type PERR0_TIMER0_Field is - (-- Peripheral configured in region 1. - Inregion1, - -- Peripheral configured in region 0. - Inregion0) - with Size => 1; - for PERR0_TIMER0_Field use - (Inregion1 => 0, - Inregion0 => 1); - - -- PERR0_TIMER array - type PERR0_TIMER_Field_Array is array (0 .. 2) of PERR0_TIMER0_Field - with Component_Size => 1, Size => 3; - - -- Type definition for PERR0_TIMER - type PERR0_TIMER_Field - (As_Array : Boolean := False) - is record - case As_Array is - when False => - -- TIMER as a value - Val : nrf51.UInt3; - when True => - -- TIMER as an array - Arr : PERR0_TIMER_Field_Array; - end case; - end record - with Unchecked_Union, Size => 3; - - for PERR0_TIMER_Field use record - Val at 0 range 0 .. 2; - Arr at 0 range 0 .. 2; - end record; - - -- RTC0 region configuration. - type PERR0_RTC0_Field is - (-- Peripheral configured in region 1. - Inregion1, - -- Peripheral configured in region 0. - Inregion0) - with Size => 1; - for PERR0_RTC0_Field use - (Inregion1 => 0, - Inregion0 => 1); - - -- TEMP region configuration. - type PERR0_TEMP_Field is - (-- Peripheral configured in region 1. - Inregion1, - -- Peripheral configured in region 0. - Inregion0) - with Size => 1; - for PERR0_TEMP_Field use - (Inregion1 => 0, - Inregion0 => 1); - - -- RNG region configuration. - type PERR0_RNG_Field is - (-- Peripheral configured in region 1. - Inregion1, - -- Peripheral configured in region 0. - Inregion0) - with Size => 1; - for PERR0_RNG_Field use - (Inregion1 => 0, - Inregion0 => 1); - - -- ECB region configuration. - type PERR0_ECB_Field is - (-- Peripheral configured in region 1. - Inregion1, - -- Peripheral configured in region 0. - Inregion0) - with Size => 1; - for PERR0_ECB_Field use - (Inregion1 => 0, - Inregion0 => 1); - - -- CCM and AAR region configuration. - type PERR0_CCM_AAR_Field is - (-- Peripheral configured in region 1. - Inregion1, - -- Peripheral configured in region 0. - Inregion0) - with Size => 1; - for PERR0_CCM_AAR_Field use - (Inregion1 => 0, - Inregion0 => 1); - - -- WDT region configuration. - type PERR0_WDT_Field is - (-- Peripheral configured in region 1. - Inregion1, - -- Peripheral configured in region 0. - Inregion0) - with Size => 1; - for PERR0_WDT_Field use - (Inregion1 => 0, - Inregion0 => 1); - - -- RTC1 region configuration. - type PERR0_RTC1_Field is - (-- Peripheral configured in region 1. - Inregion1, - -- Peripheral configured in region 0. - Inregion0) - with Size => 1; - for PERR0_RTC1_Field use - (Inregion1 => 0, - Inregion0 => 1); - - -- QDEC region configuration. - type PERR0_QDEC_Field is - (-- Peripheral configured in region 1. - Inregion1, - -- Peripheral configured in region 0. - Inregion0) - with Size => 1; - for PERR0_QDEC_Field use - (Inregion1 => 0, - Inregion0 => 1); - - -- LPCOMP region configuration. - type PERR0_LPCOMP_Field is - (-- Peripheral configured in region 1. - Inregion1, - -- Peripheral configured in region 0. - Inregion0) - with Size => 1; - for PERR0_LPCOMP_Field use - (Inregion1 => 0, - Inregion0 => 1); - - -- NVMC region configuration. - type PERR0_NVMC_Field is - (-- Peripheral configured in region 1. - Inregion1, - -- Peripheral configured in region 0. - Inregion0) - with Size => 1; - for PERR0_NVMC_Field use - (Inregion1 => 0, - Inregion0 => 1); - - -- PPI region configuration. - type PERR0_PPI_Field is - (-- Peripheral configured in region 1. - Inregion1, - -- Peripheral configured in region 0. - Inregion0) - with Size => 1; - for PERR0_PPI_Field use - (Inregion1 => 0, - Inregion0 => 1); - - -- Configuration of peripherals in mpu regions. - type PERR0_Register is record - -- POWER_CLOCK region configuration. - POWER_CLOCK : PERR0_POWER_CLOCK_Field := nrf51.MPU.Inregion1; - -- RADIO region configuration. - RADIO : PERR0_RADIO_Field := nrf51.MPU.Inregion1; - -- UART0 region configuration. - UART0 : PERR0_UART0_Field := nrf51.MPU.Inregion1; - -- SPI0 and TWI0 region configuration. - SPI0_TWI0 : PERR0_SPI0_TWI0_Field := nrf51.MPU.Inregion1; - -- SPI1 and TWI1 region configuration. - SPI1_TWI1 : PERR0_SPI1_TWI1_Field := nrf51.MPU.Inregion1; - -- unspecified - Reserved_5_5 : nrf51.Bit := 16#0#; - -- GPIOTE region configuration. - GPIOTE : PERR0_GPIOTE_Field := nrf51.MPU.Inregion1; - -- ADC region configuration. - ADC : PERR0_ADC_Field := nrf51.MPU.Inregion1; - -- TIMER0 region configuration. - TIMER : PERR0_TIMER_Field := (As_Array => False, Val => 16#0#); - -- RTC0 region configuration. - RTC0 : PERR0_RTC0_Field := nrf51.MPU.Inregion1; - -- TEMP region configuration. - TEMP : PERR0_TEMP_Field := nrf51.MPU.Inregion1; - -- RNG region configuration. - RNG : PERR0_RNG_Field := nrf51.MPU.Inregion1; - -- ECB region configuration. - ECB : PERR0_ECB_Field := nrf51.MPU.Inregion1; - -- CCM and AAR region configuration. - CCM_AAR : PERR0_CCM_AAR_Field := nrf51.MPU.Inregion1; - -- WDT region configuration. - WDT : PERR0_WDT_Field := nrf51.MPU.Inregion1; - -- RTC1 region configuration. - RTC1 : PERR0_RTC1_Field := nrf51.MPU.Inregion1; - -- QDEC region configuration. - QDEC : PERR0_QDEC_Field := nrf51.MPU.Inregion1; - -- LPCOMP region configuration. - LPCOMP : PERR0_LPCOMP_Field := nrf51.MPU.Inregion1; - -- unspecified - Reserved_20_29 : nrf51.UInt10 := 16#0#; - -- NVMC region configuration. - NVMC : PERR0_NVMC_Field := nrf51.MPU.Inregion1; - -- PPI region configuration. - PPI : PERR0_PPI_Field := nrf51.MPU.Inregion1; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for PERR0_Register use record - POWER_CLOCK at 0 range 0 .. 0; - RADIO at 0 range 1 .. 1; - UART0 at 0 range 2 .. 2; - SPI0_TWI0 at 0 range 3 .. 3; - SPI1_TWI1 at 0 range 4 .. 4; - Reserved_5_5 at 0 range 5 .. 5; - GPIOTE at 0 range 6 .. 6; - ADC at 0 range 7 .. 7; - TIMER at 0 range 8 .. 10; - RTC0 at 0 range 11 .. 11; - TEMP at 0 range 12 .. 12; - RNG at 0 range 13 .. 13; - ECB at 0 range 14 .. 14; - CCM_AAR at 0 range 15 .. 15; - WDT at 0 range 16 .. 16; - RTC1 at 0 range 17 .. 17; - QDEC at 0 range 18 .. 18; - LPCOMP at 0 range 19 .. 19; - Reserved_20_29 at 0 range 20 .. 29; - NVMC at 0 range 30 .. 30; - PPI at 0 range 31 .. 31; - end record; - - -- Protection enable for region 0. - type PROTENSET0_PROTREG0_Field is - (-- Protection disabled. - Disabled, - -- Protection enabled. - Enabled) - with Size => 1; - for PROTENSET0_PROTREG0_Field use - (Disabled => 0, - Enabled => 1); - - -- Protection enable for region 0. - type PROTENSET0_PROTREG0_Field_1 is - (-- Reset value for the field - Protenset0_Protreg0_Field_Reset, - -- Enable protection on write. - Set) - with Size => 1; - for PROTENSET0_PROTREG0_Field_1 use - (Protenset0_Protreg0_Field_Reset => 0, - Set => 1); - - -- PROTENSET0_PROTREG array - type PROTENSET0_PROTREG_Field_Array is array (0 .. 31) - of PROTENSET0_PROTREG0_Field_1 - with Component_Size => 1, Size => 32; - - -- Erase and write protection bit enable set register. - type PROTENSET0_Register - (As_Array : Boolean := False) - is record - case As_Array is - when False => - -- PROTREG as a value - Val : nrf51.UInt32; - when True => - -- PROTREG as an array - Arr : PROTENSET0_PROTREG_Field_Array; - end case; - end record - with Unchecked_Union, Size => 32, Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for PROTENSET0_Register use record - Val at 0 range 0 .. 31; - Arr at 0 range 0 .. 31; - end record; - - -- Protection enable for region 32. - type PROTENSET1_PROTREG32_Field is - (-- Protection disabled. - Disabled, - -- Protection enabled. - Enabled) - with Size => 1; - for PROTENSET1_PROTREG32_Field use - (Disabled => 0, - Enabled => 1); - - -- Protection enable for region 32. - type PROTENSET1_PROTREG32_Field_1 is - (-- Reset value for the field - Protenset1_Protreg32_Field_Reset, - -- Enable protection on write. - Set) - with Size => 1; - for PROTENSET1_PROTREG32_Field_1 use - (Protenset1_Protreg32_Field_Reset => 0, - Set => 1); - - -- PROTENSET1_PROTREG array - type PROTENSET1_PROTREG_Field_Array is array (32 .. 63) - of PROTENSET1_PROTREG32_Field_1 - with Component_Size => 1, Size => 32; - - -- Erase and write protection bit enable set register. - type PROTENSET1_Register - (As_Array : Boolean := False) - is record - case As_Array is - when False => - -- PROTREG as a value - Val : nrf51.UInt32; - when True => - -- PROTREG as an array - Arr : PROTENSET1_PROTREG_Field_Array; - end case; - end record - with Unchecked_Union, Size => 32, Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for PROTENSET1_Register use record - Val at 0 range 0 .. 31; - Arr at 0 range 0 .. 31; - end record; - - -- Disable protection mechanism in debug mode. - type DISABLEINDEBUG_DISABLEINDEBUG_Field is - (-- Protection enabled. - Enabled, - -- Protection disabled. - Disabled) - with Size => 1; - for DISABLEINDEBUG_DISABLEINDEBUG_Field use - (Enabled => 0, - Disabled => 1); - - -- Disable erase and write protection mechanism in debug mode. - type DISABLEINDEBUG_Register is record - -- Disable protection mechanism in debug mode. - DISABLEINDEBUG : DISABLEINDEBUG_DISABLEINDEBUG_Field := - nrf51.MPU.Disabled; - -- unspecified - Reserved_1_31 : nrf51.UInt31 := 16#0#; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for DISABLEINDEBUG_Register use record - DISABLEINDEBUG at 0 range 0 .. 0; - Reserved_1_31 at 0 range 1 .. 31; - end record; - - -- Erase and write protection block size. - type PROTBLOCKSIZE_PROTBLOCKSIZE_Field is - (-- Erase and write protection block size is 4k. - Val_4K) - with Size => 2; - for PROTBLOCKSIZE_PROTBLOCKSIZE_Field use - (Val_4K => 0); - - -- Erase and write protection block size. - type PROTBLOCKSIZE_Register is record - -- Erase and write protection block size. - PROTBLOCKSIZE : PROTBLOCKSIZE_PROTBLOCKSIZE_Field := nrf51.MPU.Val_4K; - -- unspecified - Reserved_2_31 : nrf51.UInt30 := 16#0#; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for PROTBLOCKSIZE_Register use record - PROTBLOCKSIZE at 0 range 0 .. 1; - Reserved_2_31 at 0 range 2 .. 31; - end record; - - ----------------- - -- Peripherals -- - ----------------- - - -- Memory Protection Unit. - type MPU_Peripheral is record - -- Configuration of peripherals in mpu regions. - PERR0 : aliased PERR0_Register; - -- Length of RAM region 0. - RLENR0 : aliased nrf51.UInt32; - -- Erase and write protection bit enable set register. - PROTENSET0 : aliased PROTENSET0_Register; - -- Erase and write protection bit enable set register. - PROTENSET1 : aliased PROTENSET1_Register; - -- Disable erase and write protection mechanism in debug mode. - DISABLEINDEBUG : aliased DISABLEINDEBUG_Register; - -- Erase and write protection block size. - PROTBLOCKSIZE : aliased PROTBLOCKSIZE_Register; - end record - with Volatile; - - for MPU_Peripheral use record - PERR0 at 16#528# range 0 .. 31; - RLENR0 at 16#52C# range 0 .. 31; - PROTENSET0 at 16#600# range 0 .. 31; - PROTENSET1 at 16#604# range 0 .. 31; - DISABLEINDEBUG at 16#608# range 0 .. 31; - PROTBLOCKSIZE at 16#60C# range 0 .. 31; - end record; - - -- Memory Protection Unit. - MPU_Periph : aliased MPU_Peripheral - with Import, Address => MPU_Base; - -end nrf51.MPU; diff --git a/microbit/nrf51/nrf51-nvmc.ads b/microbit/nrf51/nrf51-nvmc.ads deleted file mode 100644 index 438097e..0000000 --- a/microbit/nrf51/nrf51-nvmc.ads +++ /dev/null @@ -1,201 +0,0 @@ -pragma Ada_2012; -pragma Style_Checks (Off); - --- Copyright (c) 2013, Nordic Semiconductor ASA --- All rights reserved. --- --- Redistribution and use in source and binary forms, with or without --- modification, are permitted provided that the following conditions are met: --- --- * Redistributions of source code must retain the above copyright notice, this --- list of conditions and the following disclaimer. --- --- * Redistributions in binary form must reproduce the above copyright notice, --- this list of conditions and the following disclaimer in the documentation --- and/or other materials provided with the distribution. --- --- * Neither the name of Nordic Semiconductor ASA nor the names of its --- contributors may be used to endorse or promote products derived from --- this software without specific prior written permission. --- --- THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" --- AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE --- IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE --- DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE --- FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL --- DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR --- SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER --- CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, --- OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE --- OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. --- - --- This spec has been automatically generated from nrf51.svd - -pragma Restrictions (No_Elaboration_Code); - -with System; - -package nrf51.NVMC is - pragma Preelaborate; - - --------------- - -- Registers -- - --------------- - - -- NVMC ready. - type READY_READY_Field is - (-- NVMC is busy (on-going write or erase operation). - Busy, - -- NVMC is ready. - Ready) - with Size => 1; - for READY_READY_Field use - (Busy => 0, - Ready => 1); - - -- Ready flag. - type READY_Register is record - -- Read-only. NVMC ready. - READY : READY_READY_Field; - -- unspecified - Reserved_1_31 : nrf51.UInt31; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for READY_Register use record - READY at 0 range 0 .. 0; - Reserved_1_31 at 0 range 1 .. 31; - end record; - - -- Program write enable. - type CONFIG_WEN_Field is - (-- Read only access. - Ren, - -- Write enabled. - Wen, - -- Erase enabled. - Een) - with Size => 2; - for CONFIG_WEN_Field use - (Ren => 0, - Wen => 1, - Een => 2); - - -- Configuration register. - type CONFIG_Register is record - -- Program write enable. - WEN : CONFIG_WEN_Field := nrf51.NVMC.Ren; - -- unspecified - Reserved_2_31 : nrf51.UInt30 := 16#0#; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for CONFIG_Register use record - WEN at 0 range 0 .. 1; - Reserved_2_31 at 0 range 2 .. 31; - end record; - - -- Starts the erasing of all user NVM (code region 0/1 and UICR registers). - type ERASEALL_ERASEALL_Field is - (-- No operation. - Nooperation, - -- Start chip erase. - Erase) - with Size => 1; - for ERASEALL_ERASEALL_Field use - (Nooperation => 0, - Erase => 1); - - -- Register for erasing all non-volatile user memory. - type ERASEALL_Register is record - -- Starts the erasing of all user NVM (code region 0/1 and UICR - -- registers). - ERASEALL : ERASEALL_ERASEALL_Field := nrf51.NVMC.Nooperation; - -- unspecified - Reserved_1_31 : nrf51.UInt31 := 16#0#; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for ERASEALL_Register use record - ERASEALL at 0 range 0 .. 0; - Reserved_1_31 at 0 range 1 .. 31; - end record; - - -- It can only be used when all contents of code region 1 are erased. - type ERASEUICR_ERASEUICR_Field is - (-- No operation. - Nooperation, - -- Start UICR erase. - Erase) - with Size => 1; - for ERASEUICR_ERASEUICR_Field use - (Nooperation => 0, - Erase => 1); - - -- Register for start erasing User Information Congfiguration Registers. - type ERASEUICR_Register is record - -- It can only be used when all contents of code region 1 are erased. - ERASEUICR : ERASEUICR_ERASEUICR_Field := nrf51.NVMC.Nooperation; - -- unspecified - Reserved_1_31 : nrf51.UInt31 := 16#0#; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for ERASEUICR_Register use record - ERASEUICR at 0 range 0 .. 0; - Reserved_1_31 at 0 range 1 .. 31; - end record; - - ----------------- - -- Peripherals -- - ----------------- - - type NVMC_Disc is - (Age, - Cr1); - - -- Non Volatile Memory Controller. - type NVMC_Peripheral - (Discriminent : NVMC_Disc := Age) - is record - -- Ready flag. - READY : aliased READY_Register; - -- Configuration register. - CONFIG : aliased CONFIG_Register; - -- Register for erasing all non-volatile user memory. - ERASEALL : aliased ERASEALL_Register; - -- Register for erasing a protected non-volatile memory page. - ERASEPCR0 : aliased nrf51.UInt32; - -- Register for start erasing User Information Congfiguration Registers. - ERASEUICR : aliased ERASEUICR_Register; - case Discriminent is - when Age => - -- Register for erasing a non-protected non-volatile memory page. - ERASEPAGE : aliased nrf51.UInt32; - when Cr1 => - -- Register for erasing a non-protected non-volatile memory page. - ERASEPCR1 : aliased nrf51.UInt32; - end case; - end record - with Unchecked_Union, Volatile; - - for NVMC_Peripheral use record - READY at 16#400# range 0 .. 31; - CONFIG at 16#504# range 0 .. 31; - ERASEALL at 16#50C# range 0 .. 31; - ERASEPCR0 at 16#510# range 0 .. 31; - ERASEUICR at 16#514# range 0 .. 31; - ERASEPAGE at 16#508# range 0 .. 31; - ERASEPCR1 at 16#508# range 0 .. 31; - end record; - - -- Non Volatile Memory Controller. - NVMC_Periph : aliased NVMC_Peripheral - with Import, Address => NVMC_Base; - -end nrf51.NVMC; diff --git a/microbit/nrf51/nrf51-power.ads b/microbit/nrf51/nrf51-power.ads deleted file mode 100644 index f2a2acf..0000000 --- a/microbit/nrf51/nrf51-power.ads +++ /dev/null @@ -1,704 +0,0 @@ -pragma Ada_2012; -pragma Style_Checks (Off); - --- Copyright (c) 2013, Nordic Semiconductor ASA --- All rights reserved. --- --- Redistribution and use in source and binary forms, with or without --- modification, are permitted provided that the following conditions are met: --- --- * Redistributions of source code must retain the above copyright notice, this --- list of conditions and the following disclaimer. --- --- * Redistributions in binary form must reproduce the above copyright notice, --- this list of conditions and the following disclaimer in the documentation --- and/or other materials provided with the distribution. --- --- * Neither the name of Nordic Semiconductor ASA nor the names of its --- contributors may be used to endorse or promote products derived from --- this software without specific prior written permission. --- --- THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" --- AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE --- IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE --- DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE --- FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL --- DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR --- SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER --- CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, --- OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE --- OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. --- - --- This spec has been automatically generated from nrf51.svd - -pragma Restrictions (No_Elaboration_Code); - -with System; - -package nrf51.POWER is - pragma Preelaborate; - - --------------- - -- Registers -- - --------------- - - -- Enable interrupt on POFWARN event. - type INTENSET_POFWARN_Field is - (-- Interrupt disabled. - Disabled, - -- Interrupt enabled. - Enabled) - with Size => 1; - for INTENSET_POFWARN_Field use - (Disabled => 0, - Enabled => 1); - - -- Enable interrupt on POFWARN event. - type INTENSET_POFWARN_Field_1 is - (-- Reset value for the field - Intenset_Pofwarn_Field_Reset, - -- Enable interrupt on write. - Set) - with Size => 1; - for INTENSET_POFWARN_Field_1 use - (Intenset_Pofwarn_Field_Reset => 0, - Set => 1); - - -- Interrupt enable set register. - type INTENSET_Register is record - -- unspecified - Reserved_0_1 : nrf51.UInt2 := 16#0#; - -- Enable interrupt on POFWARN event. - POFWARN : INTENSET_POFWARN_Field_1 := - Intenset_Pofwarn_Field_Reset; - -- unspecified - Reserved_3_31 : nrf51.UInt29 := 16#0#; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for INTENSET_Register use record - Reserved_0_1 at 0 range 0 .. 1; - POFWARN at 0 range 2 .. 2; - Reserved_3_31 at 0 range 3 .. 31; - end record; - - -- Disable interrupt on POFWARN event. - type INTENCLR_POFWARN_Field is - (-- Interrupt disabled. - Disabled, - -- Interrupt enabled. - Enabled) - with Size => 1; - for INTENCLR_POFWARN_Field use - (Disabled => 0, - Enabled => 1); - - -- Disable interrupt on POFWARN event. - type INTENCLR_POFWARN_Field_1 is - (-- Reset value for the field - Intenclr_Pofwarn_Field_Reset, - -- Disable interrupt on write. - Clear) - with Size => 1; - for INTENCLR_POFWARN_Field_1 use - (Intenclr_Pofwarn_Field_Reset => 0, - Clear => 1); - - -- Interrupt enable clear register. - type INTENCLR_Register is record - -- unspecified - Reserved_0_1 : nrf51.UInt2 := 16#0#; - -- Disable interrupt on POFWARN event. - POFWARN : INTENCLR_POFWARN_Field_1 := - Intenclr_Pofwarn_Field_Reset; - -- unspecified - Reserved_3_31 : nrf51.UInt29 := 16#0#; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for INTENCLR_Register use record - Reserved_0_1 at 0 range 0 .. 1; - POFWARN at 0 range 2 .. 2; - Reserved_3_31 at 0 range 3 .. 31; - end record; - - -- Reset from pin-reset detected. - type RESETREAS_RESETPIN_Field is - (-- Reset not detected. - Notdetected, - -- Reset detected. - Detected) - with Size => 1; - for RESETREAS_RESETPIN_Field use - (Notdetected => 0, - Detected => 1); - - -- Reset from watchdog detected. - type RESETREAS_DOG_Field is - (-- Reset not detected. - Notdetected, - -- Reset detected. - Detected) - with Size => 1; - for RESETREAS_DOG_Field use - (Notdetected => 0, - Detected => 1); - - -- Reset from AIRCR.SYSRESETREQ detected. - type RESETREAS_SREQ_Field is - (-- Reset not detected. - Notdetected, - -- Reset detected. - Detected) - with Size => 1; - for RESETREAS_SREQ_Field use - (Notdetected => 0, - Detected => 1); - - -- Reset from CPU lock-up detected. - type RESETREAS_LOCKUP_Field is - (-- Reset not detected. - Notdetected, - -- Reset detected. - Detected) - with Size => 1; - for RESETREAS_LOCKUP_Field use - (Notdetected => 0, - Detected => 1); - - -- Reset from wake-up from OFF mode detected by the use of DETECT signal - -- from GPIO. - type RESETREAS_OFF_Field is - (-- Reset not detected. - Notdetected, - -- Reset detected. - Detected) - with Size => 1; - for RESETREAS_OFF_Field use - (Notdetected => 0, - Detected => 1); - - -- Reset from wake-up from OFF mode detected by the use of ANADETECT signal - -- from LPCOMP. - type RESETREAS_LPCOMP_Field is - (-- Reset not detected. - Notdetected, - -- Reset detected. - Detected) - with Size => 1; - for RESETREAS_LPCOMP_Field use - (Notdetected => 0, - Detected => 1); - - -- Reset from wake-up from OFF mode detected by entering into debug - -- interface mode. - type RESETREAS_DIF_Field is - (-- Reset not detected. - Notdetected, - -- Reset detected. - Detected) - with Size => 1; - for RESETREAS_DIF_Field use - (Notdetected => 0, - Detected => 1); - - -- Reset reason. - type RESETREAS_Register is record - -- Reset from pin-reset detected. - RESETPIN : RESETREAS_RESETPIN_Field := nrf51.POWER.Notdetected; - -- Reset from watchdog detected. - DOG : RESETREAS_DOG_Field := nrf51.POWER.Notdetected; - -- Reset from AIRCR.SYSRESETREQ detected. - SREQ : RESETREAS_SREQ_Field := nrf51.POWER.Notdetected; - -- Reset from CPU lock-up detected. - LOCKUP : RESETREAS_LOCKUP_Field := nrf51.POWER.Notdetected; - -- unspecified - Reserved_4_15 : nrf51.UInt12 := 16#0#; - -- Reset from wake-up from OFF mode detected by the use of DETECT signal - -- from GPIO. - OFF : RESETREAS_OFF_Field := nrf51.POWER.Notdetected; - -- Reset from wake-up from OFF mode detected by the use of ANADETECT - -- signal from LPCOMP. - LPCOMP : RESETREAS_LPCOMP_Field := nrf51.POWER.Notdetected; - -- Reset from wake-up from OFF mode detected by entering into debug - -- interface mode. - DIF : RESETREAS_DIF_Field := nrf51.POWER.Notdetected; - -- unspecified - Reserved_19_31 : nrf51.UInt13 := 16#0#; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for RESETREAS_Register use record - RESETPIN at 0 range 0 .. 0; - DOG at 0 range 1 .. 1; - SREQ at 0 range 2 .. 2; - LOCKUP at 0 range 3 .. 3; - Reserved_4_15 at 0 range 4 .. 15; - OFF at 0 range 16 .. 16; - LPCOMP at 0 range 17 .. 17; - DIF at 0 range 18 .. 18; - Reserved_19_31 at 0 range 19 .. 31; - end record; - - -- RAM block 0 status. - type RAMSTATUS_RAMBLOCK0_Field is - (-- RAM block 0 is off or powering up. - Off, - -- RAM block 0 is on. - On) - with Size => 1; - for RAMSTATUS_RAMBLOCK0_Field use - (Off => 0, - On => 1); - - -- RAM block 1 status. - type RAMSTATUS_RAMBLOCK1_Field is - (-- RAM block 1 is off or powering up. - Off, - -- RAM block 1 is on. - On) - with Size => 1; - for RAMSTATUS_RAMBLOCK1_Field use - (Off => 0, - On => 1); - - -- RAM block 2 status. - type RAMSTATUS_RAMBLOCK2_Field is - (-- RAM block 2 is off or powering up. - Off, - -- RAM block 2 is on. - On) - with Size => 1; - for RAMSTATUS_RAMBLOCK2_Field use - (Off => 0, - On => 1); - - -- RAM block 3 status. - type RAMSTATUS_RAMBLOCK3_Field is - (-- RAM block 3 is off or powering up. - Off, - -- RAM block 3 is on. - On) - with Size => 1; - for RAMSTATUS_RAMBLOCK3_Field use - (Off => 0, - On => 1); - - -- Ram status register. - type RAMSTATUS_Register is record - -- Read-only. RAM block 0 status. - RAMBLOCK0 : RAMSTATUS_RAMBLOCK0_Field; - -- Read-only. RAM block 1 status. - RAMBLOCK1 : RAMSTATUS_RAMBLOCK1_Field; - -- Read-only. RAM block 2 status. - RAMBLOCK2 : RAMSTATUS_RAMBLOCK2_Field; - -- Read-only. RAM block 3 status. - RAMBLOCK3 : RAMSTATUS_RAMBLOCK3_Field; - -- unspecified - Reserved_4_31 : nrf51.UInt28; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for RAMSTATUS_Register use record - RAMBLOCK0 at 0 range 0 .. 0; - RAMBLOCK1 at 0 range 1 .. 1; - RAMBLOCK2 at 0 range 2 .. 2; - RAMBLOCK3 at 0 range 3 .. 3; - Reserved_4_31 at 0 range 4 .. 31; - end record; - - -- Enter system off mode. - type SYSTEMOFF_SYSTEMOFF_Field is - (-- Reset value for the field - Systemoff_Systemoff_Field_Reset, - -- Enter system off mode. - Enter) - with Size => 1; - for SYSTEMOFF_SYSTEMOFF_Field use - (Systemoff_Systemoff_Field_Reset => 0, - Enter => 1); - - -- System off register. - type SYSTEMOFF_Register is record - -- Write-only. Enter system off mode. - SYSTEMOFF : SYSTEMOFF_SYSTEMOFF_Field := - Systemoff_Systemoff_Field_Reset; - -- unspecified - Reserved_1_31 : nrf51.UInt31 := 16#0#; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for SYSTEMOFF_Register use record - SYSTEMOFF at 0 range 0 .. 0; - Reserved_1_31 at 0 range 1 .. 31; - end record; - - -- Power failure comparator enable. - type POFCON_POF_Field is - (-- Disabled. - Disabled, - -- Enabled. - Enabled) - with Size => 1; - for POFCON_POF_Field use - (Disabled => 0, - Enabled => 1); - - -- Set threshold level. - type POFCON_THRESHOLD_Field is - (-- Set threshold to 2.1Volts. - V21, - -- Set threshold to 2.3Volts. - V23, - -- Set threshold to 2.5Volts. - V25, - -- Set threshold to 2.7Volts. - V27) - with Size => 2; - for POFCON_THRESHOLD_Field use - (V21 => 0, - V23 => 1, - V25 => 2, - V27 => 3); - - -- Power failure configuration. - type POFCON_Register is record - -- Power failure comparator enable. - POF : POFCON_POF_Field := nrf51.POWER.Disabled; - -- Set threshold level. - THRESHOLD : POFCON_THRESHOLD_Field := nrf51.POWER.V21; - -- unspecified - Reserved_3_31 : nrf51.UInt29 := 16#0#; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for POFCON_Register use record - POF at 0 range 0 .. 0; - THRESHOLD at 0 range 1 .. 2; - Reserved_3_31 at 0 range 3 .. 31; - end record; - - subtype GPREGRET_GPREGRET_Field is nrf51.Byte; - - -- General purpose retention register. This register is a retained - -- register. - type GPREGRET_Register is record - -- General purpose retention register. - GPREGRET : GPREGRET_GPREGRET_Field := 16#0#; - -- unspecified - Reserved_8_31 : nrf51.UInt24 := 16#0#; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for GPREGRET_Register use record - GPREGRET at 0 range 0 .. 7; - Reserved_8_31 at 0 range 8 .. 31; - end record; - - -- RAM block 0 behaviour in ON mode. - type RAMON_ONRAM0_Field is - (-- RAM block 0 OFF in ON mode. - Ram0Off, - -- RAM block 0 ON in ON mode. - Ram0On) - with Size => 1; - for RAMON_ONRAM0_Field use - (Ram0Off => 0, - Ram0On => 1); - - -- RAM block 1 behaviour in ON mode. - type RAMON_ONRAM1_Field is - (-- RAM block 1 OFF in ON mode. - Ram1Off, - -- RAM block 1 ON in ON mode. - Ram1On) - with Size => 1; - for RAMON_ONRAM1_Field use - (Ram1Off => 0, - Ram1On => 1); - - -- RAM block 0 behaviour in OFF mode. - type RAMON_OFFRAM0_Field is - (-- RAM block 0 OFF in OFF mode. - Ram0Off, - -- RAM block 0 ON in OFF mode. - Ram0On) - with Size => 1; - for RAMON_OFFRAM0_Field use - (Ram0Off => 0, - Ram0On => 1); - - -- RAM block 1 behaviour in OFF mode. - type RAMON_OFFRAM1_Field is - (-- RAM block 1 OFF in OFF mode. - Ram1Off, - -- RAM block 1 ON in OFF mode. - Ram1On) - with Size => 1; - for RAMON_OFFRAM1_Field use - (Ram1Off => 0, - Ram1On => 1); - - -- Ram on/off. - type RAMON_Register is record - -- RAM block 0 behaviour in ON mode. - ONRAM0 : RAMON_ONRAM0_Field := nrf51.POWER.Ram0On; - -- RAM block 1 behaviour in ON mode. - ONRAM1 : RAMON_ONRAM1_Field := nrf51.POWER.Ram1On; - -- unspecified - Reserved_2_15 : nrf51.UInt14 := 16#0#; - -- RAM block 0 behaviour in OFF mode. - OFFRAM0 : RAMON_OFFRAM0_Field := nrf51.POWER.Ram0Off; - -- RAM block 1 behaviour in OFF mode. - OFFRAM1 : RAMON_OFFRAM1_Field := nrf51.POWER.Ram1Off; - -- unspecified - Reserved_18_31 : nrf51.UInt14 := 16#0#; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for RAMON_Register use record - ONRAM0 at 0 range 0 .. 0; - ONRAM1 at 0 range 1 .. 1; - Reserved_2_15 at 0 range 2 .. 15; - OFFRAM0 at 0 range 16 .. 16; - OFFRAM1 at 0 range 17 .. 17; - Reserved_18_31 at 0 range 18 .. 31; - end record; - - -- Enable or disable pin reset in debug interface mode. - type RESET_RESET_Field is - (-- Pin reset in debug interface mode disabled. - Disabled, - -- Pin reset in debug interface mode enabled. - Enabled) - with Size => 1; - for RESET_RESET_Field use - (Disabled => 0, - Enabled => 1); - - -- Pin reset functionality configuration register. This register is a - -- retained register. - type RESET_Register is record - -- Enable or disable pin reset in debug interface mode. - RESET : RESET_RESET_Field := nrf51.POWER.Disabled; - -- unspecified - Reserved_1_31 : nrf51.UInt31 := 16#0#; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for RESET_Register use record - RESET at 0 range 0 .. 0; - Reserved_1_31 at 0 range 1 .. 31; - end record; - - -- RAM block 2 behaviour in ON mode. - type RAMONB_ONRAM2_Field is - (-- RAM block 2 OFF in ON mode. - Ram2Off, - -- RAM block 2 ON in ON mode. - Ram2On) - with Size => 1; - for RAMONB_ONRAM2_Field use - (Ram2Off => 0, - Ram2On => 1); - - -- RAM block 3 behaviour in ON mode. - type RAMONB_ONRAM3_Field is - (-- RAM block 33 OFF in ON mode. - Ram3Off, - -- RAM block 3 ON in ON mode. - Ram3On) - with Size => 1; - for RAMONB_ONRAM3_Field use - (Ram3Off => 0, - Ram3On => 1); - - -- RAM block 2 behaviour in OFF mode. - type RAMONB_OFFRAM2_Field is - (-- RAM block 2 OFF in OFF mode. - Ram2Off, - -- RAM block 2 ON in OFF mode. - Ram2On) - with Size => 1; - for RAMONB_OFFRAM2_Field use - (Ram2Off => 0, - Ram2On => 1); - - -- RAM block 3 behaviour in OFF mode. - type RAMONB_OFFRAM3_Field is - (-- RAM block 3 OFF in OFF mode. - Ram3Off, - -- RAM block 3 ON in OFF mode. - Ram3On) - with Size => 1; - for RAMONB_OFFRAM3_Field use - (Ram3Off => 0, - Ram3On => 1); - - -- Ram on/off. - type RAMONB_Register is record - -- RAM block 2 behaviour in ON mode. - ONRAM2 : RAMONB_ONRAM2_Field := nrf51.POWER.Ram2On; - -- RAM block 3 behaviour in ON mode. - ONRAM3 : RAMONB_ONRAM3_Field := nrf51.POWER.Ram3On; - -- unspecified - Reserved_2_15 : nrf51.UInt14 := 16#0#; - -- RAM block 2 behaviour in OFF mode. - OFFRAM2 : RAMONB_OFFRAM2_Field := nrf51.POWER.Ram2Off; - -- RAM block 3 behaviour in OFF mode. - OFFRAM3 : RAMONB_OFFRAM3_Field := nrf51.POWER.Ram3Off; - -- unspecified - Reserved_18_31 : nrf51.UInt14 := 16#0#; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for RAMONB_Register use record - ONRAM2 at 0 range 0 .. 0; - ONRAM3 at 0 range 1 .. 1; - Reserved_2_15 at 0 range 2 .. 15; - OFFRAM2 at 0 range 16 .. 16; - OFFRAM3 at 0 range 17 .. 17; - Reserved_18_31 at 0 range 18 .. 31; - end record; - - -- Enable DCDC converter. - type DCDCEN_DCDCEN_Field is - (-- DCDC converter disabled. - Disabled, - -- DCDC converter enabled. - Enabled) - with Size => 1; - for DCDCEN_DCDCEN_Field use - (Disabled => 0, - Enabled => 1); - - -- DCDC converter enable configuration register. - type DCDCEN_Register is record - -- Enable DCDC converter. - DCDCEN : DCDCEN_DCDCEN_Field := nrf51.POWER.Disabled; - -- unspecified - Reserved_1_31 : nrf51.UInt31 := 16#0#; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for DCDCEN_Register use record - DCDCEN at 0 range 0 .. 0; - Reserved_1_31 at 0 range 1 .. 31; - end record; - - -- DCDC power-up force off. - type DCDCFORCE_FORCEOFF_Field is - (-- No force. - Noforce, - -- Force. - Force) - with Size => 1; - for DCDCFORCE_FORCEOFF_Field use - (Noforce => 0, - Force => 1); - - -- DCDC power-up force on. - type DCDCFORCE_FORCEON_Field is - (-- No force. - Noforce, - -- Force. - Force) - with Size => 1; - for DCDCFORCE_FORCEON_Field use - (Noforce => 0, - Force => 1); - - -- DCDC power-up force register. - type DCDCFORCE_Register is record - -- DCDC power-up force off. - FORCEOFF : DCDCFORCE_FORCEOFF_Field := nrf51.POWER.Noforce; - -- DCDC power-up force on. - FORCEON : DCDCFORCE_FORCEON_Field := nrf51.POWER.Noforce; - -- unspecified - Reserved_2_31 : nrf51.UInt30 := 16#0#; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for DCDCFORCE_Register use record - FORCEOFF at 0 range 0 .. 0; - FORCEON at 0 range 1 .. 1; - Reserved_2_31 at 0 range 2 .. 31; - end record; - - ----------------- - -- Peripherals -- - ----------------- - - -- Power Control. - type POWER_Peripheral is record - -- Enable constant latency mode. - TASKS_CONSTLAT : aliased nrf51.UInt32; - -- Enable low power mode (variable latency). - TASKS_LOWPWR : aliased nrf51.UInt32; - -- Power failure warning. - EVENTS_POFWARN : aliased nrf51.UInt32; - -- Interrupt enable set register. - INTENSET : aliased INTENSET_Register; - -- Interrupt enable clear register. - INTENCLR : aliased INTENCLR_Register; - -- Reset reason. - RESETREAS : aliased RESETREAS_Register; - -- Ram status register. - RAMSTATUS : aliased RAMSTATUS_Register; - -- System off register. - SYSTEMOFF : aliased SYSTEMOFF_Register; - -- Power failure configuration. - POFCON : aliased POFCON_Register; - -- General purpose retention register. This register is a retained - -- register. - GPREGRET : aliased GPREGRET_Register; - -- Ram on/off. - RAMON : aliased RAMON_Register; - -- Pin reset functionality configuration register. This register is a - -- retained register. - RESET : aliased RESET_Register; - -- Ram on/off. - RAMONB : aliased RAMONB_Register; - -- DCDC converter enable configuration register. - DCDCEN : aliased DCDCEN_Register; - -- DCDC power-up force register. - DCDCFORCE : aliased DCDCFORCE_Register; - end record - with Volatile; - - for POWER_Peripheral use record - TASKS_CONSTLAT at 16#78# range 0 .. 31; - TASKS_LOWPWR at 16#7C# range 0 .. 31; - EVENTS_POFWARN at 16#108# range 0 .. 31; - INTENSET at 16#304# range 0 .. 31; - INTENCLR at 16#308# range 0 .. 31; - RESETREAS at 16#400# range 0 .. 31; - RAMSTATUS at 16#428# range 0 .. 31; - SYSTEMOFF at 16#500# range 0 .. 31; - POFCON at 16#510# range 0 .. 31; - GPREGRET at 16#51C# range 0 .. 31; - RAMON at 16#524# range 0 .. 31; - RESET at 16#544# range 0 .. 31; - RAMONB at 16#554# range 0 .. 31; - DCDCEN at 16#578# range 0 .. 31; - DCDCFORCE at 16#A08# range 0 .. 31; - end record; - - -- Power Control. - POWER_Periph : aliased POWER_Peripheral - with Import, Address => POWER_Base; - -end nrf51.POWER; diff --git a/microbit/nrf51/nrf51-ppi.ads b/microbit/nrf51/nrf51-ppi.ads deleted file mode 100644 index d33ae67..0000000 --- a/microbit/nrf51/nrf51-ppi.ads +++ /dev/null @@ -1,575 +0,0 @@ -pragma Ada_2012; -pragma Style_Checks (Off); - --- Copyright (c) 2013, Nordic Semiconductor ASA --- All rights reserved. --- --- Redistribution and use in source and binary forms, with or without --- modification, are permitted provided that the following conditions are met: --- --- * Redistributions of source code must retain the above copyright notice, this --- list of conditions and the following disclaimer. --- --- * Redistributions in binary form must reproduce the above copyright notice, --- this list of conditions and the following disclaimer in the documentation --- and/or other materials provided with the distribution. --- --- * Neither the name of Nordic Semiconductor ASA nor the names of its --- contributors may be used to endorse or promote products derived from --- this software without specific prior written permission. --- --- THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" --- AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE --- IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE --- DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE --- FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL --- DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR --- SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER --- CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, --- OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE --- OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. --- - --- This spec has been automatically generated from nrf51.svd - -pragma Restrictions (No_Elaboration_Code); - -with System; - -package nrf51.PPI is - pragma Preelaborate; - - --------------- - -- Registers -- - --------------- - - --------------------------------------- - -- PPI_TASKS_CHG cluster's Registers -- - --------------------------------------- - - -- Channel group tasks. - type PPI_TASKS_CHG_Cluster is record - -- Enable channel group. - EN : aliased nrf51.UInt32; - -- Disable channel group. - DIS : aliased nrf51.UInt32; - end record - with Size => 64; - - for PPI_TASKS_CHG_Cluster use record - EN at 16#0# range 0 .. 31; - DIS at 16#4# range 0 .. 31; - end record; - - -- Channel group tasks. - type PPI_TASKS_CHG_Clusters is array (0 .. 3) of PPI_TASKS_CHG_Cluster; - - -- Enable PPI channel 0. - type CHEN_CH0_Field is - (-- Channel disabled. - Disabled, - -- Channel enabled. - Enabled) - with Size => 1; - for CHEN_CH0_Field use - (Disabled => 0, - Enabled => 1); - - -- CHEN_CH array - type CHEN_CH_Field_Array is array (0 .. 2) of CHEN_CH0_Field - with Component_Size => 1, Size => 3; - - -- Type definition for CHEN_CH - type CHEN_CH_Field - (As_Array : Boolean := False) - is record - case As_Array is - when False => - -- CH as a value - Val : nrf51.UInt3; - when True => - -- CH as an array - Arr : CHEN_CH_Field_Array; - end case; - end record - with Unchecked_Union, Size => 3; - - for CHEN_CH_Field use record - Val at 0 range 0 .. 2; - Arr at 0 range 0 .. 2; - end record; - - -- Enable PPI channel 3. - type CHEN_CH3_Field is - (-- Channel disabled - Disabled, - -- Channel enabled - Enabled) - with Size => 1; - for CHEN_CH3_Field use - (Disabled => 0, - Enabled => 1); - - -- Enable PPI channel 4. - type CHEN_CH4_Field is - (-- Channel disabled. - Disabled, - -- Channel enabled. - Enabled) - with Size => 1; - for CHEN_CH4_Field use - (Disabled => 0, - Enabled => 1); - - -- CHEN_CH array - type CHEN_CH_Field_Array_1 is array (4 .. 15) of CHEN_CH4_Field - with Component_Size => 1, Size => 12; - - -- Type definition for CHEN_CH - type CHEN_CH_Field_1 - (As_Array : Boolean := False) - is record - case As_Array is - when False => - -- CH as a value - Val : nrf51.UInt12; - when True => - -- CH as an array - Arr : CHEN_CH_Field_Array_1; - end case; - end record - with Unchecked_Union, Size => 12; - - for CHEN_CH_Field_1 use record - Val at 0 range 0 .. 11; - Arr at 0 range 0 .. 11; - end record; - - -- Enable PPI channel 20. - type CHEN_CH20_Field is - (-- Channel disabled. - Disabled, - -- Channel enabled. - Enabled) - with Size => 1; - for CHEN_CH20_Field use - (Disabled => 0, - Enabled => 1); - - -- CHEN_CH array - type CHEN_CH_Field_Array_2 is array (20 .. 31) of CHEN_CH20_Field - with Component_Size => 1, Size => 12; - - -- Type definition for CHEN_CH - type CHEN_CH_Field_2 - (As_Array : Boolean := False) - is record - case As_Array is - when False => - -- CH as a value - Val : nrf51.UInt12; - when True => - -- CH as an array - Arr : CHEN_CH_Field_Array_2; - end case; - end record - with Unchecked_Union, Size => 12; - - for CHEN_CH_Field_2 use record - Val at 0 range 0 .. 11; - Arr at 0 range 0 .. 11; - end record; - - -- Channel enable. - type CHEN_Register is record - -- Enable PPI channel 0. - CH : CHEN_CH_Field := (As_Array => False, Val => 16#0#); - -- Enable PPI channel 3. - CH3 : CHEN_CH3_Field := nrf51.PPI.Disabled; - -- Enable PPI channel 4. - CH_1 : CHEN_CH_Field_1 := (As_Array => False, Val => 16#0#); - -- unspecified - Reserved_16_19 : nrf51.UInt4 := 16#0#; - -- Enable PPI channel 20. - CH_2 : CHEN_CH_Field_2 := (As_Array => False, Val => 16#0#); - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for CHEN_Register use record - CH at 0 range 0 .. 2; - CH3 at 0 range 3 .. 3; - CH_1 at 0 range 4 .. 15; - Reserved_16_19 at 0 range 16 .. 19; - CH_2 at 0 range 20 .. 31; - end record; - - -- Enable PPI channel 0. - type CHENSET_CH0_Field is - (-- Channel disabled. - Disabled, - -- Channel enabled. - Enabled) - with Size => 1; - for CHENSET_CH0_Field use - (Disabled => 0, - Enabled => 1); - - -- Enable PPI channel 0. - type CHENSET_CH0_Field_1 is - (-- Reset value for the field - Chenset_Ch0_Field_Reset, - -- Enable channel on write. - Set) - with Size => 1; - for CHENSET_CH0_Field_1 use - (Chenset_Ch0_Field_Reset => 0, - Set => 1); - - -- CHENSET_CH array - type CHENSET_CH_Field_Array is array (0 .. 15) of CHENSET_CH0_Field_1 - with Component_Size => 1, Size => 16; - - -- Type definition for CHENSET_CH - type CHENSET_CH_Field - (As_Array : Boolean := False) - is record - case As_Array is - when False => - -- CH as a value - Val : nrf51.UInt16; - when True => - -- CH as an array - Arr : CHENSET_CH_Field_Array; - end case; - end record - with Unchecked_Union, Size => 16; - - for CHENSET_CH_Field use record - Val at 0 range 0 .. 15; - Arr at 0 range 0 .. 15; - end record; - - -- Enable PPI channel 20. - type CHENSET_CH20_Field is - (-- Channel disabled. - Disabled, - -- Channel enabled. - Enabled) - with Size => 1; - for CHENSET_CH20_Field use - (Disabled => 0, - Enabled => 1); - - -- Enable PPI channel 20. - type CHENSET_CH20_Field_1 is - (-- Reset value for the field - Chenset_Ch20_Field_Reset, - -- Enable channel on write. - Set) - with Size => 1; - for CHENSET_CH20_Field_1 use - (Chenset_Ch20_Field_Reset => 0, - Set => 1); - - -- CHENSET_CH array - type CHENSET_CH_Field_Array_1 is array (20 .. 31) of CHENSET_CH20_Field_1 - with Component_Size => 1, Size => 12; - - -- Type definition for CHENSET_CH - type CHENSET_CH_Field_1 - (As_Array : Boolean := False) - is record - case As_Array is - when False => - -- CH as a value - Val : nrf51.UInt12; - when True => - -- CH as an array - Arr : CHENSET_CH_Field_Array_1; - end case; - end record - with Unchecked_Union, Size => 12; - - for CHENSET_CH_Field_1 use record - Val at 0 range 0 .. 11; - Arr at 0 range 0 .. 11; - end record; - - -- Channel enable set. - type CHENSET_Register is record - -- Enable PPI channel 0. - CH : CHENSET_CH_Field := (As_Array => False, Val => 16#0#); - -- unspecified - Reserved_16_19 : nrf51.UInt4 := 16#0#; - -- Enable PPI channel 20. - CH_1 : CHENSET_CH_Field_1 := - (As_Array => False, Val => 16#0#); - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for CHENSET_Register use record - CH at 0 range 0 .. 15; - Reserved_16_19 at 0 range 16 .. 19; - CH_1 at 0 range 20 .. 31; - end record; - - -- Disable PPI channel 0. - type CHENCLR_CH0_Field is - (-- Channel disabled. - Disabled, - -- Channel enabled. - Enabled) - with Size => 1; - for CHENCLR_CH0_Field use - (Disabled => 0, - Enabled => 1); - - -- Disable PPI channel 0. - type CHENCLR_CH0_Field_1 is - (-- Reset value for the field - Chenclr_Ch0_Field_Reset, - -- Disable channel on write. - Clear) - with Size => 1; - for CHENCLR_CH0_Field_1 use - (Chenclr_Ch0_Field_Reset => 0, - Clear => 1); - - -- CHENCLR_CH array - type CHENCLR_CH_Field_Array is array (0 .. 15) of CHENCLR_CH0_Field_1 - with Component_Size => 1, Size => 16; - - -- Type definition for CHENCLR_CH - type CHENCLR_CH_Field - (As_Array : Boolean := False) - is record - case As_Array is - when False => - -- CH as a value - Val : nrf51.UInt16; - when True => - -- CH as an array - Arr : CHENCLR_CH_Field_Array; - end case; - end record - with Unchecked_Union, Size => 16; - - for CHENCLR_CH_Field use record - Val at 0 range 0 .. 15; - Arr at 0 range 0 .. 15; - end record; - - -- Disable PPI channel 20. - type CHENCLR_CH20_Field is - (-- Channel disabled. - Disabled, - -- Channel enabled. - Enabled) - with Size => 1; - for CHENCLR_CH20_Field use - (Disabled => 0, - Enabled => 1); - - -- Disable PPI channel 20. - type CHENCLR_CH20_Field_1 is - (-- Reset value for the field - Chenclr_Ch20_Field_Reset, - -- Disable channel on write. - Clear) - with Size => 1; - for CHENCLR_CH20_Field_1 use - (Chenclr_Ch20_Field_Reset => 0, - Clear => 1); - - -- CHENCLR_CH array - type CHENCLR_CH_Field_Array_1 is array (20 .. 31) of CHENCLR_CH20_Field_1 - with Component_Size => 1, Size => 12; - - -- Type definition for CHENCLR_CH - type CHENCLR_CH_Field_1 - (As_Array : Boolean := False) - is record - case As_Array is - when False => - -- CH as a value - Val : nrf51.UInt12; - when True => - -- CH as an array - Arr : CHENCLR_CH_Field_Array_1; - end case; - end record - with Unchecked_Union, Size => 12; - - for CHENCLR_CH_Field_1 use record - Val at 0 range 0 .. 11; - Arr at 0 range 0 .. 11; - end record; - - -- Channel enable clear. - type CHENCLR_Register is record - -- Disable PPI channel 0. - CH : CHENCLR_CH_Field := (As_Array => False, Val => 16#0#); - -- unspecified - Reserved_16_19 : nrf51.UInt4 := 16#0#; - -- Disable PPI channel 20. - CH_1 : CHENCLR_CH_Field_1 := - (As_Array => False, Val => 16#0#); - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for CHENCLR_Register use record - CH at 0 range 0 .. 15; - Reserved_16_19 at 0 range 16 .. 19; - CH_1 at 0 range 20 .. 31; - end record; - - -------------------------------- - -- PPI_CH cluster's Registers -- - -------------------------------- - - -- PPI Channel. - type PPI_CH_Cluster is record - -- Channel event end-point. - EEP : aliased nrf51.UInt32; - -- Channel task end-point. - TEP : aliased nrf51.UInt32; - end record - with Size => 64; - - for PPI_CH_Cluster use record - EEP at 16#0# range 0 .. 31; - TEP at 16#4# range 0 .. 31; - end record; - - -- PPI Channel. - type PPI_CH_Clusters is array (0 .. 15) of PPI_CH_Cluster; - - -- Include CH0 in channel group. - type CHG_CH0_Field is - (-- Channel excluded. - Excluded, - -- Channel included. - Included) - with Size => 1; - for CHG_CH0_Field use - (Excluded => 0, - Included => 1); - - -- CHG_CH array - type CHG_CH_Field_Array is array (0 .. 15) of CHG_CH0_Field - with Component_Size => 1, Size => 16; - - -- Type definition for CHG_CH - type CHG_CH_Field - (As_Array : Boolean := False) - is record - case As_Array is - when False => - -- CH as a value - Val : nrf51.UInt16; - when True => - -- CH as an array - Arr : CHG_CH_Field_Array; - end case; - end record - with Unchecked_Union, Size => 16; - - for CHG_CH_Field use record - Val at 0 range 0 .. 15; - Arr at 0 range 0 .. 15; - end record; - - -- Include CH20 in channel group. - type CHG_CH20_Field is - (-- Channel excluded. - Excluded, - -- Channel included. - Included) - with Size => 1; - for CHG_CH20_Field use - (Excluded => 0, - Included => 1); - - -- CHG_CH array - type CHG_CH_Field_Array_1 is array (20 .. 31) of CHG_CH20_Field - with Component_Size => 1, Size => 12; - - -- Type definition for CHG_CH - type CHG_CH_Field_1 - (As_Array : Boolean := False) - is record - case As_Array is - when False => - -- CH as a value - Val : nrf51.UInt12; - when True => - -- CH as an array - Arr : CHG_CH_Field_Array_1; - end case; - end record - with Unchecked_Union, Size => 12; - - for CHG_CH_Field_1 use record - Val at 0 range 0 .. 11; - Arr at 0 range 0 .. 11; - end record; - - -- Channel group configuration. - type CHG_Register is record - -- Include CH0 in channel group. - CH : CHG_CH_Field := (As_Array => False, Val => 16#0#); - -- unspecified - Reserved_16_19 : nrf51.UInt4 := 16#0#; - -- Include CH20 in channel group. - CH_1 : CHG_CH_Field_1 := (As_Array => False, Val => 16#0#); - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for CHG_Register use record - CH at 0 range 0 .. 15; - Reserved_16_19 at 0 range 16 .. 19; - CH_1 at 0 range 20 .. 31; - end record; - - -- Channel group configuration. - type CHG_Registers is array (0 .. 3) of CHG_Register; - - ----------------- - -- Peripherals -- - ----------------- - - -- PPI controller. - type PPI_Peripheral is record - -- Channel group tasks. - TASKS_CHG : aliased PPI_TASKS_CHG_Clusters; - -- Channel enable. - CHEN : aliased CHEN_Register; - -- Channel enable set. - CHENSET : aliased CHENSET_Register; - -- Channel enable clear. - CHENCLR : aliased CHENCLR_Register; - -- PPI Channel. - CH : aliased PPI_CH_Clusters; - -- Channel group configuration. - CHG : aliased CHG_Registers; - end record - with Volatile; - - for PPI_Peripheral use record - TASKS_CHG at 16#0# range 0 .. 255; - CHEN at 16#500# range 0 .. 31; - CHENSET at 16#504# range 0 .. 31; - CHENCLR at 16#508# range 0 .. 31; - CH at 16#510# range 0 .. 1023; - CHG at 16#800# range 0 .. 127; - end record; - - -- PPI controller. - PPI_Periph : aliased PPI_Peripheral - with Import, Address => PPI_Base; - -end nrf51.PPI; diff --git a/microbit/nrf51/nrf51-qdec.ads b/microbit/nrf51/nrf51-qdec.ads deleted file mode 100644 index 1b7a57c..0000000 --- a/microbit/nrf51/nrf51-qdec.ads +++ /dev/null @@ -1,602 +0,0 @@ -pragma Ada_2012; -pragma Style_Checks (Off); - --- Copyright (c) 2013, Nordic Semiconductor ASA --- All rights reserved. --- --- Redistribution and use in source and binary forms, with or without --- modification, are permitted provided that the following conditions are met: --- --- * Redistributions of source code must retain the above copyright notice, this --- list of conditions and the following disclaimer. --- --- * Redistributions in binary form must reproduce the above copyright notice, --- this list of conditions and the following disclaimer in the documentation --- and/or other materials provided with the distribution. --- --- * Neither the name of Nordic Semiconductor ASA nor the names of its --- contributors may be used to endorse or promote products derived from --- this software without specific prior written permission. --- --- THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" --- AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE --- IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE --- DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE --- FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL --- DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR --- SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER --- CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, --- OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE --- OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. --- - --- This spec has been automatically generated from nrf51.svd - -pragma Restrictions (No_Elaboration_Code); - -with System; - -package nrf51.QDEC is - pragma Preelaborate; - - --------------- - -- Registers -- - --------------- - - -- Shortcut between REPORTRDY event and READCLRACC task. - type SHORTS_REPORTRDY_READCLRACC_Field is - (-- Shortcut disabled. - Disabled, - -- Shortcut enabled. - Enabled) - with Size => 1; - for SHORTS_REPORTRDY_READCLRACC_Field use - (Disabled => 0, - Enabled => 1); - - -- Shortcut between SAMPLERDY event and STOP task. - type SHORTS_SAMPLERDY_STOP_Field is - (-- Shortcut disabled. - Disabled, - -- Shortcut enabled. - Enabled) - with Size => 1; - for SHORTS_SAMPLERDY_STOP_Field use - (Disabled => 0, - Enabled => 1); - - -- Shortcuts for the QDEC. - type SHORTS_Register is record - -- Shortcut between REPORTRDY event and READCLRACC task. - REPORTRDY_READCLRACC : SHORTS_REPORTRDY_READCLRACC_Field := - nrf51.QDEC.Disabled; - -- Shortcut between SAMPLERDY event and STOP task. - SAMPLERDY_STOP : SHORTS_SAMPLERDY_STOP_Field := - nrf51.QDEC.Disabled; - -- unspecified - Reserved_2_31 : nrf51.UInt30 := 16#0#; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for SHORTS_Register use record - REPORTRDY_READCLRACC at 0 range 0 .. 0; - SAMPLERDY_STOP at 0 range 1 .. 1; - Reserved_2_31 at 0 range 2 .. 31; - end record; - - -- Enable interrupt on SAMPLERDY event. - type INTENSET_SAMPLERDY_Field is - (-- Interrupt disabled. - Disabled, - -- Interrupt enabled. - Enabled) - with Size => 1; - for INTENSET_SAMPLERDY_Field use - (Disabled => 0, - Enabled => 1); - - -- Enable interrupt on SAMPLERDY event. - type INTENSET_SAMPLERDY_Field_1 is - (-- Reset value for the field - Intenset_Samplerdy_Field_Reset, - -- Enable interrupt on write. - Set) - with Size => 1; - for INTENSET_SAMPLERDY_Field_1 use - (Intenset_Samplerdy_Field_Reset => 0, - Set => 1); - - -- Enable interrupt on REPORTRDY event. - type INTENSET_REPORTRDY_Field is - (-- Interrupt disabled. - Disabled, - -- Interrupt enabled. - Enabled) - with Size => 1; - for INTENSET_REPORTRDY_Field use - (Disabled => 0, - Enabled => 1); - - -- Enable interrupt on REPORTRDY event. - type INTENSET_REPORTRDY_Field_1 is - (-- Reset value for the field - Intenset_Reportrdy_Field_Reset, - -- Enable interrupt on write. - Set) - with Size => 1; - for INTENSET_REPORTRDY_Field_1 use - (Intenset_Reportrdy_Field_Reset => 0, - Set => 1); - - -- Enable interrupt on ACCOF event. - type INTENSET_ACCOF_Field is - (-- Interrupt disabled. - Disabled, - -- Interrupt enabled. - Enabled) - with Size => 1; - for INTENSET_ACCOF_Field use - (Disabled => 0, - Enabled => 1); - - -- Enable interrupt on ACCOF event. - type INTENSET_ACCOF_Field_1 is - (-- Reset value for the field - Intenset_Accof_Field_Reset, - -- Enable interrupt on write. - Set) - with Size => 1; - for INTENSET_ACCOF_Field_1 use - (Intenset_Accof_Field_Reset => 0, - Set => 1); - - -- Interrupt enable set register. - type INTENSET_Register is record - -- Enable interrupt on SAMPLERDY event. - SAMPLERDY : INTENSET_SAMPLERDY_Field_1 := - Intenset_Samplerdy_Field_Reset; - -- Enable interrupt on REPORTRDY event. - REPORTRDY : INTENSET_REPORTRDY_Field_1 := - Intenset_Reportrdy_Field_Reset; - -- Enable interrupt on ACCOF event. - ACCOF : INTENSET_ACCOF_Field_1 := Intenset_Accof_Field_Reset; - -- unspecified - Reserved_3_31 : nrf51.UInt29 := 16#0#; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for INTENSET_Register use record - SAMPLERDY at 0 range 0 .. 0; - REPORTRDY at 0 range 1 .. 1; - ACCOF at 0 range 2 .. 2; - Reserved_3_31 at 0 range 3 .. 31; - end record; - - -- Disable interrupt on SAMPLERDY event. - type INTENCLR_SAMPLERDY_Field is - (-- Interrupt disabled. - Disabled, - -- Interrupt enabled. - Enabled) - with Size => 1; - for INTENCLR_SAMPLERDY_Field use - (Disabled => 0, - Enabled => 1); - - -- Disable interrupt on SAMPLERDY event. - type INTENCLR_SAMPLERDY_Field_1 is - (-- Reset value for the field - Intenclr_Samplerdy_Field_Reset, - -- Disable interrupt on write. - Clear) - with Size => 1; - for INTENCLR_SAMPLERDY_Field_1 use - (Intenclr_Samplerdy_Field_Reset => 0, - Clear => 1); - - -- Disable interrupt on REPORTRDY event. - type INTENCLR_REPORTRDY_Field is - (-- Interrupt disabled. - Disabled, - -- Interrupt enabled. - Enabled) - with Size => 1; - for INTENCLR_REPORTRDY_Field use - (Disabled => 0, - Enabled => 1); - - -- Disable interrupt on REPORTRDY event. - type INTENCLR_REPORTRDY_Field_1 is - (-- Reset value for the field - Intenclr_Reportrdy_Field_Reset, - -- Disable interrupt on write. - Clear) - with Size => 1; - for INTENCLR_REPORTRDY_Field_1 use - (Intenclr_Reportrdy_Field_Reset => 0, - Clear => 1); - - -- Disable interrupt on ACCOF event. - type INTENCLR_ACCOF_Field is - (-- Interrupt disabled. - Disabled, - -- Interrupt enabled. - Enabled) - with Size => 1; - for INTENCLR_ACCOF_Field use - (Disabled => 0, - Enabled => 1); - - -- Disable interrupt on ACCOF event. - type INTENCLR_ACCOF_Field_1 is - (-- Reset value for the field - Intenclr_Accof_Field_Reset, - -- Disable interrupt on write. - Clear) - with Size => 1; - for INTENCLR_ACCOF_Field_1 use - (Intenclr_Accof_Field_Reset => 0, - Clear => 1); - - -- Interrupt enable clear register. - type INTENCLR_Register is record - -- Disable interrupt on SAMPLERDY event. - SAMPLERDY : INTENCLR_SAMPLERDY_Field_1 := - Intenclr_Samplerdy_Field_Reset; - -- Disable interrupt on REPORTRDY event. - REPORTRDY : INTENCLR_REPORTRDY_Field_1 := - Intenclr_Reportrdy_Field_Reset; - -- Disable interrupt on ACCOF event. - ACCOF : INTENCLR_ACCOF_Field_1 := Intenclr_Accof_Field_Reset; - -- unspecified - Reserved_3_31 : nrf51.UInt29 := 16#0#; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for INTENCLR_Register use record - SAMPLERDY at 0 range 0 .. 0; - REPORTRDY at 0 range 1 .. 1; - ACCOF at 0 range 2 .. 2; - Reserved_3_31 at 0 range 3 .. 31; - end record; - - -- Enable or disable QDEC. - type ENABLE_ENABLE_Field is - (-- Disabled QDEC. - Disabled, - -- Enable QDEC. - Enabled) - with Size => 1; - for ENABLE_ENABLE_Field use - (Disabled => 0, - Enabled => 1); - - -- Enable the QDEC. - type ENABLE_Register is record - -- Enable or disable QDEC. - ENABLE : ENABLE_ENABLE_Field := nrf51.QDEC.Disabled; - -- unspecified - Reserved_1_31 : nrf51.UInt31 := 16#0#; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for ENABLE_Register use record - ENABLE at 0 range 0 .. 0; - Reserved_1_31 at 0 range 1 .. 31; - end record; - - -- LED output pin polarity. - type LEDPOL_LEDPOL_Field is - (-- LED output is active low. - Activelow, - -- LED output is active high. - Activehigh) - with Size => 1; - for LEDPOL_LEDPOL_Field use - (Activelow => 0, - Activehigh => 1); - - -- LED output pin polarity. - type LEDPOL_Register is record - -- LED output pin polarity. - LEDPOL : LEDPOL_LEDPOL_Field := nrf51.QDEC.Activelow; - -- unspecified - Reserved_1_31 : nrf51.UInt31 := 16#0#; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for LEDPOL_Register use record - LEDPOL at 0 range 0 .. 0; - Reserved_1_31 at 0 range 1 .. 31; - end record; - - -- Sample period. - type SAMPLEPER_SAMPLEPER_Field is - (-- 128us sample period. - Val_128US, - -- 256us sample period. - Val_256US, - -- 512us sample period. - Val_512US, - -- 1024us sample period. - Val_1024US, - -- 2048us sample period. - Val_2048US, - -- 4096us sample period. - Val_4096US, - -- 8192us sample period. - Val_8192US, - -- 16384us sample period. - Val_16384US) - with Size => 3; - for SAMPLEPER_SAMPLEPER_Field use - (Val_128US => 0, - Val_256US => 1, - Val_512US => 2, - Val_1024US => 3, - Val_2048US => 4, - Val_4096US => 5, - Val_8192US => 6, - Val_16384US => 7); - - -- Sample period. - type SAMPLEPER_Register is record - -- Sample period. - SAMPLEPER : SAMPLEPER_SAMPLEPER_Field := nrf51.QDEC.Val_128US; - -- unspecified - Reserved_3_31 : nrf51.UInt29 := 16#0#; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for SAMPLEPER_Register use record - SAMPLEPER at 0 range 0 .. 2; - Reserved_3_31 at 0 range 3 .. 31; - end record; - - -- Number of samples to generate an EVENT_REPORTRDY. - type REPORTPER_REPORTPER_Field is - (-- 10 samples per report. - Val_10Smpl, - -- 40 samples per report. - Val_40Smpl, - -- 80 samples per report. - Val_80Smpl, - -- 120 samples per report. - Val_120Smpl, - -- 160 samples per report. - Val_160Smpl, - -- 200 samples per report. - Val_200Smpl, - -- 240 samples per report. - Val_240Smpl, - -- 280 samples per report. - Val_280Smpl) - with Size => 3; - for REPORTPER_REPORTPER_Field use - (Val_10Smpl => 0, - Val_40Smpl => 1, - Val_80Smpl => 2, - Val_120Smpl => 3, - Val_160Smpl => 4, - Val_200Smpl => 5, - Val_240Smpl => 6, - Val_280Smpl => 7); - - -- Number of samples to generate an EVENT_REPORTRDY. - type REPORTPER_Register is record - -- Number of samples to generate an EVENT_REPORTRDY. - REPORTPER : REPORTPER_REPORTPER_Field := nrf51.QDEC.Val_10Smpl; - -- unspecified - Reserved_3_31 : nrf51.UInt29 := 16#0#; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for REPORTPER_Register use record - REPORTPER at 0 range 0 .. 2; - Reserved_3_31 at 0 range 3 .. 31; - end record; - - -- Enable debounce input filters. - type DBFEN_DBFEN_Field is - (-- Debounce input filters disabled. - Disabled, - -- Debounce input filters enabled. - Enabled) - with Size => 1; - for DBFEN_DBFEN_Field use - (Disabled => 0, - Enabled => 1); - - -- Enable debouncer input filters. - type DBFEN_Register is record - -- Enable debounce input filters. - DBFEN : DBFEN_DBFEN_Field := nrf51.QDEC.Disabled; - -- unspecified - Reserved_1_31 : nrf51.UInt31 := 16#0#; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for DBFEN_Register use record - DBFEN at 0 range 0 .. 0; - Reserved_1_31 at 0 range 1 .. 31; - end record; - - subtype LEDPRE_LEDPRE_Field is nrf51.UInt9; - - -- Time LED is switched ON before the sample. - type LEDPRE_Register is record - -- Period in us the LED in switched on prior to sampling. - LEDPRE : LEDPRE_LEDPRE_Field := 16#10#; - -- unspecified - Reserved_9_31 : nrf51.UInt23 := 16#0#; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for LEDPRE_Register use record - LEDPRE at 0 range 0 .. 8; - Reserved_9_31 at 0 range 9 .. 31; - end record; - - subtype ACCDBL_ACCDBL_Field is nrf51.UInt4; - - -- Accumulated double (error) transitions register. - type ACCDBL_Register is record - -- Read-only. Accumulated double (error) transitions. - ACCDBL : ACCDBL_ACCDBL_Field; - -- unspecified - Reserved_4_31 : nrf51.UInt28; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for ACCDBL_Register use record - ACCDBL at 0 range 0 .. 3; - Reserved_4_31 at 0 range 4 .. 31; - end record; - - subtype ACCDBLREAD_ACCDBLREAD_Field is nrf51.UInt4; - - -- Snapshot of ACCDBL register. Value generated by the TASKS_READCLEACC - -- task. - type ACCDBLREAD_Register is record - -- Read-only. Snapshot of accumulated double (error) transitions. - ACCDBLREAD : ACCDBLREAD_ACCDBLREAD_Field; - -- unspecified - Reserved_4_31 : nrf51.UInt28; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for ACCDBLREAD_Register use record - ACCDBLREAD at 0 range 0 .. 3; - Reserved_4_31 at 0 range 4 .. 31; - end record; - - -- Peripheral power control. - type POWER_POWER_Field is - (-- Module power disabled. - Disabled, - -- Module power enabled. - Enabled) - with Size => 1; - for POWER_POWER_Field use - (Disabled => 0, - Enabled => 1); - - -- Peripheral power control. - type POWER_Register is record - -- Peripheral power control. - POWER : POWER_POWER_Field := nrf51.QDEC.Disabled; - -- unspecified - Reserved_1_31 : nrf51.UInt31 := 16#0#; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for POWER_Register use record - POWER at 0 range 0 .. 0; - Reserved_1_31 at 0 range 1 .. 31; - end record; - - ----------------- - -- Peripherals -- - ----------------- - - -- Rotary decoder. - type QDEC_Peripheral is record - -- Start the quadrature decoder. - TASKS_START : aliased nrf51.UInt32; - -- Stop the quadrature decoder. - TASKS_STOP : aliased nrf51.UInt32; - -- Transfers the content from ACC registers to ACCREAD registers, and - -- clears the ACC registers. - TASKS_READCLRACC : aliased nrf51.UInt32; - -- A new sample is written to the sample register. - EVENTS_SAMPLERDY : aliased nrf51.UInt32; - -- REPORTPER number of samples accumulated in ACC register, and ACC - -- register different than zero. - EVENTS_REPORTRDY : aliased nrf51.UInt32; - -- ACC or ACCDBL register overflow. - EVENTS_ACCOF : aliased nrf51.UInt32; - -- Shortcuts for the QDEC. - SHORTS : aliased SHORTS_Register; - -- Interrupt enable set register. - INTENSET : aliased INTENSET_Register; - -- Interrupt enable clear register. - INTENCLR : aliased INTENCLR_Register; - -- Enable the QDEC. - ENABLE : aliased ENABLE_Register; - -- LED output pin polarity. - LEDPOL : aliased LEDPOL_Register; - -- Sample period. - SAMPLEPER : aliased SAMPLEPER_Register; - -- Motion sample value. - SAMPLE : aliased nrf51.UInt32; - -- Number of samples to generate an EVENT_REPORTRDY. - REPORTPER : aliased REPORTPER_Register; - -- Accumulated valid transitions register. - ACC : aliased nrf51.UInt32; - -- Snapshot of ACC register. Value generated by the TASKS_READCLEACC - -- task. - ACCREAD : aliased nrf51.UInt32; - -- Pin select for LED output. - PSELLED : aliased nrf51.UInt32; - -- Pin select for phase A input. - PSELA : aliased nrf51.UInt32; - -- Pin select for phase B input. - PSELB : aliased nrf51.UInt32; - -- Enable debouncer input filters. - DBFEN : aliased DBFEN_Register; - -- Time LED is switched ON before the sample. - LEDPRE : aliased LEDPRE_Register; - -- Accumulated double (error) transitions register. - ACCDBL : aliased ACCDBL_Register; - -- Snapshot of ACCDBL register. Value generated by the TASKS_READCLEACC - -- task. - ACCDBLREAD : aliased ACCDBLREAD_Register; - -- Peripheral power control. - POWER : aliased POWER_Register; - end record - with Volatile; - - for QDEC_Peripheral use record - TASKS_START at 16#0# range 0 .. 31; - TASKS_STOP at 16#4# range 0 .. 31; - TASKS_READCLRACC at 16#8# range 0 .. 31; - EVENTS_SAMPLERDY at 16#100# range 0 .. 31; - EVENTS_REPORTRDY at 16#104# range 0 .. 31; - EVENTS_ACCOF at 16#108# range 0 .. 31; - SHORTS at 16#200# range 0 .. 31; - INTENSET at 16#304# range 0 .. 31; - INTENCLR at 16#308# range 0 .. 31; - ENABLE at 16#500# range 0 .. 31; - LEDPOL at 16#504# range 0 .. 31; - SAMPLEPER at 16#508# range 0 .. 31; - SAMPLE at 16#50C# range 0 .. 31; - REPORTPER at 16#510# range 0 .. 31; - ACC at 16#514# range 0 .. 31; - ACCREAD at 16#518# range 0 .. 31; - PSELLED at 16#51C# range 0 .. 31; - PSELA at 16#520# range 0 .. 31; - PSELB at 16#524# range 0 .. 31; - DBFEN at 16#528# range 0 .. 31; - LEDPRE at 16#540# range 0 .. 31; - ACCDBL at 16#544# range 0 .. 31; - ACCDBLREAD at 16#548# range 0 .. 31; - POWER at 16#FFC# range 0 .. 31; - end record; - - -- Rotary decoder. - QDEC_Periph : aliased QDEC_Peripheral - with Import, Address => QDEC_Base; - -end nrf51.QDEC; diff --git a/microbit/nrf51/nrf51-radio.ads b/microbit/nrf51/nrf51-radio.ads deleted file mode 100644 index a4a5965..0000000 --- a/microbit/nrf51/nrf51-radio.ads +++ /dev/null @@ -1,1627 +0,0 @@ -pragma Ada_2012; -pragma Style_Checks (Off); - --- Copyright (c) 2013, Nordic Semiconductor ASA --- All rights reserved. --- --- Redistribution and use in source and binary forms, with or without --- modification, are permitted provided that the following conditions are met: --- --- * Redistributions of source code must retain the above copyright notice, this --- list of conditions and the following disclaimer. --- --- * Redistributions in binary form must reproduce the above copyright notice, --- this list of conditions and the following disclaimer in the documentation --- and/or other materials provided with the distribution. --- --- * Neither the name of Nordic Semiconductor ASA nor the names of its --- contributors may be used to endorse or promote products derived from --- this software without specific prior written permission. --- --- THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" --- AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE --- IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE --- DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE --- FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL --- DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR --- SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER --- CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, --- OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE --- OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. --- - --- This spec has been automatically generated from nrf51.svd - -pragma Restrictions (No_Elaboration_Code); - -with System; - -package nrf51.RADIO is - pragma Preelaborate; - - --------------- - -- Registers -- - --------------- - - -- Shortcut between READY event and START task. - type SHORTS_READY_START_Field is - (-- Shortcut disabled. - Disabled, - -- Shortcut enabled. - Enabled) - with Size => 1; - for SHORTS_READY_START_Field use - (Disabled => 0, - Enabled => 1); - - -- Shortcut between END event and DISABLE task. - type SHORTS_END_DISABLE_Field is - (-- Shortcut disabled. - Disabled, - -- Shortcut enabled. - Enabled) - with Size => 1; - for SHORTS_END_DISABLE_Field use - (Disabled => 0, - Enabled => 1); - - -- Shortcut between DISABLED event and TXEN task. - type SHORTS_DISABLED_TXEN_Field is - (-- Shortcut disabled. - Disabled, - -- Shortcut enabled. - Enabled) - with Size => 1; - for SHORTS_DISABLED_TXEN_Field use - (Disabled => 0, - Enabled => 1); - - -- Shortcut between DISABLED event and RXEN task. - type SHORTS_DISABLED_RXEN_Field is - (-- Shortcut disabled. - Disabled, - -- Shortcut enabled. - Enabled) - with Size => 1; - for SHORTS_DISABLED_RXEN_Field use - (Disabled => 0, - Enabled => 1); - - -- Shortcut between ADDRESS event and RSSISTART task. - type SHORTS_ADDRESS_RSSISTART_Field is - (-- Shortcut disabled. - Disabled, - -- Shortcut enabled. - Enabled) - with Size => 1; - for SHORTS_ADDRESS_RSSISTART_Field use - (Disabled => 0, - Enabled => 1); - - -- Shortcut between END event and START task. - type SHORTS_END_START_Field is - (-- Shortcut disabled. - Disabled, - -- Shortcut enabled. - Enabled) - with Size => 1; - for SHORTS_END_START_Field use - (Disabled => 0, - Enabled => 1); - - -- Shortcut between ADDRESS event and BCSTART task. - type SHORTS_ADDRESS_BCSTART_Field is - (-- Shortcut disabled. - Disabled, - -- Shortcut enabled. - Enabled) - with Size => 1; - for SHORTS_ADDRESS_BCSTART_Field use - (Disabled => 0, - Enabled => 1); - - -- Shortcut between DISABLED event and RSSISTOP task. - type SHORTS_DISABLED_RSSISTOP_Field is - (-- Shortcut disabled. - Disabled, - -- Shortcut enabled. - Enabled) - with Size => 1; - for SHORTS_DISABLED_RSSISTOP_Field use - (Disabled => 0, - Enabled => 1); - - -- Shortcuts for the radio. - type SHORTS_Register is record - -- Shortcut between READY event and START task. - READY_START : SHORTS_READY_START_Field := nrf51.RADIO.Disabled; - -- Shortcut between END event and DISABLE task. - END_DISABLE : SHORTS_END_DISABLE_Field := nrf51.RADIO.Disabled; - -- Shortcut between DISABLED event and TXEN task. - DISABLED_TXEN : SHORTS_DISABLED_TXEN_Field := nrf51.RADIO.Disabled; - -- Shortcut between DISABLED event and RXEN task. - DISABLED_RXEN : SHORTS_DISABLED_RXEN_Field := nrf51.RADIO.Disabled; - -- Shortcut between ADDRESS event and RSSISTART task. - ADDRESS_RSSISTART : SHORTS_ADDRESS_RSSISTART_Field := - nrf51.RADIO.Disabled; - -- Shortcut between END event and START task. - END_START : SHORTS_END_START_Field := nrf51.RADIO.Disabled; - -- Shortcut between ADDRESS event and BCSTART task. - ADDRESS_BCSTART : SHORTS_ADDRESS_BCSTART_Field := - nrf51.RADIO.Disabled; - -- unspecified - Reserved_7_7 : nrf51.Bit := 16#0#; - -- Shortcut between DISABLED event and RSSISTOP task. - DISABLED_RSSISTOP : SHORTS_DISABLED_RSSISTOP_Field := - nrf51.RADIO.Disabled; - -- unspecified - Reserved_9_31 : nrf51.UInt23 := 16#0#; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for SHORTS_Register use record - READY_START at 0 range 0 .. 0; - END_DISABLE at 0 range 1 .. 1; - DISABLED_TXEN at 0 range 2 .. 2; - DISABLED_RXEN at 0 range 3 .. 3; - ADDRESS_RSSISTART at 0 range 4 .. 4; - END_START at 0 range 5 .. 5; - ADDRESS_BCSTART at 0 range 6 .. 6; - Reserved_7_7 at 0 range 7 .. 7; - DISABLED_RSSISTOP at 0 range 8 .. 8; - Reserved_9_31 at 0 range 9 .. 31; - end record; - - -- Enable interrupt on READY event. - type INTENSET_READY_Field is - (-- Interrupt disabled. - Disabled, - -- Interrupt enabled. - Enabled) - with Size => 1; - for INTENSET_READY_Field use - (Disabled => 0, - Enabled => 1); - - -- Enable interrupt on READY event. - type INTENSET_READY_Field_1 is - (-- Reset value for the field - Intenset_Ready_Field_Reset, - -- Enable interrupt on write. - Set) - with Size => 1; - for INTENSET_READY_Field_1 use - (Intenset_Ready_Field_Reset => 0, - Set => 1); - - -- Enable interrupt on ADDRESS event. - type INTENSET_ADDRESS_Field is - (-- Interrupt disabled. - Disabled, - -- Interrupt enabled. - Enabled) - with Size => 1; - for INTENSET_ADDRESS_Field use - (Disabled => 0, - Enabled => 1); - - -- Enable interrupt on ADDRESS event. - type INTENSET_ADDRESS_Field_1 is - (-- Reset value for the field - Intenset_Address_Field_Reset, - -- Enable interrupt on write. - Set) - with Size => 1; - for INTENSET_ADDRESS_Field_1 use - (Intenset_Address_Field_Reset => 0, - Set => 1); - - -- Enable interrupt on PAYLOAD event. - type INTENSET_PAYLOAD_Field is - (-- Interrupt disabled. - Disabled, - -- Interrupt enabled. - Enabled) - with Size => 1; - for INTENSET_PAYLOAD_Field use - (Disabled => 0, - Enabled => 1); - - -- Enable interrupt on PAYLOAD event. - type INTENSET_PAYLOAD_Field_1 is - (-- Reset value for the field - Intenset_Payload_Field_Reset, - -- Enable interrupt on write. - Set) - with Size => 1; - for INTENSET_PAYLOAD_Field_1 use - (Intenset_Payload_Field_Reset => 0, - Set => 1); - - -- Enable interrupt on END event. - type INTENSET_END_Field is - (-- Interrupt disabled. - Disabled, - -- Interrupt enabled. - Enabled) - with Size => 1; - for INTENSET_END_Field use - (Disabled => 0, - Enabled => 1); - - -- Enable interrupt on END event. - type INTENSET_END_Field_1 is - (-- Reset value for the field - Intenset_End_Field_Reset, - -- Enable interrupt on write. - Set) - with Size => 1; - for INTENSET_END_Field_1 use - (Intenset_End_Field_Reset => 0, - Set => 1); - - -- Enable interrupt on DISABLED event. - type INTENSET_DISABLED_Field is - (-- Interrupt disabled. - Disabled, - -- Interrupt enabled. - Enabled) - with Size => 1; - for INTENSET_DISABLED_Field use - (Disabled => 0, - Enabled => 1); - - -- Enable interrupt on DISABLED event. - type INTENSET_DISABLED_Field_1 is - (-- Reset value for the field - Intenset_Disabled_Field_Reset, - -- Enable interrupt on write. - Set) - with Size => 1; - for INTENSET_DISABLED_Field_1 use - (Intenset_Disabled_Field_Reset => 0, - Set => 1); - - -- Enable interrupt on DEVMATCH event. - type INTENSET_DEVMATCH_Field is - (-- Interrupt disabled. - Disabled, - -- Interrupt enabled. - Enabled) - with Size => 1; - for INTENSET_DEVMATCH_Field use - (Disabled => 0, - Enabled => 1); - - -- Enable interrupt on DEVMATCH event. - type INTENSET_DEVMATCH_Field_1 is - (-- Reset value for the field - Intenset_Devmatch_Field_Reset, - -- Enable interrupt on write. - Set) - with Size => 1; - for INTENSET_DEVMATCH_Field_1 use - (Intenset_Devmatch_Field_Reset => 0, - Set => 1); - - -- Enable interrupt on DEVMISS event. - type INTENSET_DEVMISS_Field is - (-- Interrupt disabled. - Disabled, - -- Interrupt enabled. - Enabled) - with Size => 1; - for INTENSET_DEVMISS_Field use - (Disabled => 0, - Enabled => 1); - - -- Enable interrupt on DEVMISS event. - type INTENSET_DEVMISS_Field_1 is - (-- Reset value for the field - Intenset_Devmiss_Field_Reset, - -- Enable interrupt on write. - Set) - with Size => 1; - for INTENSET_DEVMISS_Field_1 use - (Intenset_Devmiss_Field_Reset => 0, - Set => 1); - - -- Enable interrupt on RSSIEND event. - type INTENSET_RSSIEND_Field is - (-- Interrupt disabled. - Disabled, - -- Interrupt enabled. - Enabled) - with Size => 1; - for INTENSET_RSSIEND_Field use - (Disabled => 0, - Enabled => 1); - - -- Enable interrupt on RSSIEND event. - type INTENSET_RSSIEND_Field_1 is - (-- Reset value for the field - Intenset_Rssiend_Field_Reset, - -- Enable interrupt on write. - Set) - with Size => 1; - for INTENSET_RSSIEND_Field_1 use - (Intenset_Rssiend_Field_Reset => 0, - Set => 1); - - -- Enable interrupt on BCMATCH event. - type INTENSET_BCMATCH_Field is - (-- Interrupt disabled. - Disabled, - -- Interrupt enabled. - Enabled) - with Size => 1; - for INTENSET_BCMATCH_Field use - (Disabled => 0, - Enabled => 1); - - -- Enable interrupt on BCMATCH event. - type INTENSET_BCMATCH_Field_1 is - (-- Reset value for the field - Intenset_Bcmatch_Field_Reset, - -- Enable interrupt on write. - Set) - with Size => 1; - for INTENSET_BCMATCH_Field_1 use - (Intenset_Bcmatch_Field_Reset => 0, - Set => 1); - - -- Interrupt enable set register. - type INTENSET_Register is record - -- Enable interrupt on READY event. - READY : INTENSET_READY_Field_1 := Intenset_Ready_Field_Reset; - -- Enable interrupt on ADDRESS event. - ADDRESS : INTENSET_ADDRESS_Field_1 := - Intenset_Address_Field_Reset; - -- Enable interrupt on PAYLOAD event. - PAYLOAD : INTENSET_PAYLOAD_Field_1 := - Intenset_Payload_Field_Reset; - -- Enable interrupt on END event. - END_k : INTENSET_END_Field_1 := Intenset_End_Field_Reset; - -- Enable interrupt on DISABLED event. - DISABLED : INTENSET_DISABLED_Field_1 := - Intenset_Disabled_Field_Reset; - -- Enable interrupt on DEVMATCH event. - DEVMATCH : INTENSET_DEVMATCH_Field_1 := - Intenset_Devmatch_Field_Reset; - -- Enable interrupt on DEVMISS event. - DEVMISS : INTENSET_DEVMISS_Field_1 := - Intenset_Devmiss_Field_Reset; - -- Enable interrupt on RSSIEND event. - RSSIEND : INTENSET_RSSIEND_Field_1 := - Intenset_Rssiend_Field_Reset; - -- unspecified - Reserved_8_9 : nrf51.UInt2 := 16#0#; - -- Enable interrupt on BCMATCH event. - BCMATCH : INTENSET_BCMATCH_Field_1 := - Intenset_Bcmatch_Field_Reset; - -- unspecified - Reserved_11_31 : nrf51.UInt21 := 16#0#; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for INTENSET_Register use record - READY at 0 range 0 .. 0; - ADDRESS at 0 range 1 .. 1; - PAYLOAD at 0 range 2 .. 2; - END_k at 0 range 3 .. 3; - DISABLED at 0 range 4 .. 4; - DEVMATCH at 0 range 5 .. 5; - DEVMISS at 0 range 6 .. 6; - RSSIEND at 0 range 7 .. 7; - Reserved_8_9 at 0 range 8 .. 9; - BCMATCH at 0 range 10 .. 10; - Reserved_11_31 at 0 range 11 .. 31; - end record; - - -- Disable interrupt on READY event. - type INTENCLR_READY_Field is - (-- Interrupt disabled. - Disabled, - -- Interrupt enabled. - Enabled) - with Size => 1; - for INTENCLR_READY_Field use - (Disabled => 0, - Enabled => 1); - - -- Disable interrupt on READY event. - type INTENCLR_READY_Field_1 is - (-- Reset value for the field - Intenclr_Ready_Field_Reset, - -- Disable interrupt on write. - Clear) - with Size => 1; - for INTENCLR_READY_Field_1 use - (Intenclr_Ready_Field_Reset => 0, - Clear => 1); - - -- Disable interrupt on ADDRESS event. - type INTENCLR_ADDRESS_Field is - (-- Interrupt disabled. - Disabled, - -- Interrupt enabled. - Enabled) - with Size => 1; - for INTENCLR_ADDRESS_Field use - (Disabled => 0, - Enabled => 1); - - -- Disable interrupt on ADDRESS event. - type INTENCLR_ADDRESS_Field_1 is - (-- Reset value for the field - Intenclr_Address_Field_Reset, - -- Disable interrupt on write. - Clear) - with Size => 1; - for INTENCLR_ADDRESS_Field_1 use - (Intenclr_Address_Field_Reset => 0, - Clear => 1); - - -- Disable interrupt on PAYLOAD event. - type INTENCLR_PAYLOAD_Field is - (-- Interrupt disabled. - Disabled, - -- Interrupt enabled. - Enabled) - with Size => 1; - for INTENCLR_PAYLOAD_Field use - (Disabled => 0, - Enabled => 1); - - -- Disable interrupt on PAYLOAD event. - type INTENCLR_PAYLOAD_Field_1 is - (-- Reset value for the field - Intenclr_Payload_Field_Reset, - -- Disable interrupt on write. - Clear) - with Size => 1; - for INTENCLR_PAYLOAD_Field_1 use - (Intenclr_Payload_Field_Reset => 0, - Clear => 1); - - -- Disable interrupt on END event. - type INTENCLR_END_Field is - (-- Interrupt disabled. - Disabled, - -- Interrupt enabled. - Enabled) - with Size => 1; - for INTENCLR_END_Field use - (Disabled => 0, - Enabled => 1); - - -- Disable interrupt on END event. - type INTENCLR_END_Field_1 is - (-- Reset value for the field - Intenclr_End_Field_Reset, - -- Disable interrupt on write. - Clear) - with Size => 1; - for INTENCLR_END_Field_1 use - (Intenclr_End_Field_Reset => 0, - Clear => 1); - - -- Disable interrupt on DISABLED event. - type INTENCLR_DISABLED_Field is - (-- Interrupt disabled. - Disabled, - -- Interrupt enabled. - Enabled) - with Size => 1; - for INTENCLR_DISABLED_Field use - (Disabled => 0, - Enabled => 1); - - -- Disable interrupt on DISABLED event. - type INTENCLR_DISABLED_Field_1 is - (-- Reset value for the field - Intenclr_Disabled_Field_Reset, - -- Disable interrupt on write. - Clear) - with Size => 1; - for INTENCLR_DISABLED_Field_1 use - (Intenclr_Disabled_Field_Reset => 0, - Clear => 1); - - -- Disable interrupt on DEVMATCH event. - type INTENCLR_DEVMATCH_Field is - (-- Interrupt disabled. - Disabled, - -- Interrupt enabled. - Enabled) - with Size => 1; - for INTENCLR_DEVMATCH_Field use - (Disabled => 0, - Enabled => 1); - - -- Disable interrupt on DEVMATCH event. - type INTENCLR_DEVMATCH_Field_1 is - (-- Reset value for the field - Intenclr_Devmatch_Field_Reset, - -- Disable interrupt on write. - Clear) - with Size => 1; - for INTENCLR_DEVMATCH_Field_1 use - (Intenclr_Devmatch_Field_Reset => 0, - Clear => 1); - - -- Disable interrupt on DEVMISS event. - type INTENCLR_DEVMISS_Field is - (-- Interrupt disabled. - Disabled, - -- Interrupt enabled. - Enabled) - with Size => 1; - for INTENCLR_DEVMISS_Field use - (Disabled => 0, - Enabled => 1); - - -- Disable interrupt on DEVMISS event. - type INTENCLR_DEVMISS_Field_1 is - (-- Reset value for the field - Intenclr_Devmiss_Field_Reset, - -- Disable interrupt on write. - Clear) - with Size => 1; - for INTENCLR_DEVMISS_Field_1 use - (Intenclr_Devmiss_Field_Reset => 0, - Clear => 1); - - -- Disable interrupt on RSSIEND event. - type INTENCLR_RSSIEND_Field is - (-- Interrupt disabled. - Disabled, - -- Interrupt enabled. - Enabled) - with Size => 1; - for INTENCLR_RSSIEND_Field use - (Disabled => 0, - Enabled => 1); - - -- Disable interrupt on RSSIEND event. - type INTENCLR_RSSIEND_Field_1 is - (-- Reset value for the field - Intenclr_Rssiend_Field_Reset, - -- Disable interrupt on write. - Clear) - with Size => 1; - for INTENCLR_RSSIEND_Field_1 use - (Intenclr_Rssiend_Field_Reset => 0, - Clear => 1); - - -- Disable interrupt on BCMATCH event. - type INTENCLR_BCMATCH_Field is - (-- Interrupt disabled. - Disabled, - -- Interrupt enabled. - Enabled) - with Size => 1; - for INTENCLR_BCMATCH_Field use - (Disabled => 0, - Enabled => 1); - - -- Disable interrupt on BCMATCH event. - type INTENCLR_BCMATCH_Field_1 is - (-- Reset value for the field - Intenclr_Bcmatch_Field_Reset, - -- Disable interrupt on write. - Clear) - with Size => 1; - for INTENCLR_BCMATCH_Field_1 use - (Intenclr_Bcmatch_Field_Reset => 0, - Clear => 1); - - -- Interrupt enable clear register. - type INTENCLR_Register is record - -- Disable interrupt on READY event. - READY : INTENCLR_READY_Field_1 := Intenclr_Ready_Field_Reset; - -- Disable interrupt on ADDRESS event. - ADDRESS : INTENCLR_ADDRESS_Field_1 := - Intenclr_Address_Field_Reset; - -- Disable interrupt on PAYLOAD event. - PAYLOAD : INTENCLR_PAYLOAD_Field_1 := - Intenclr_Payload_Field_Reset; - -- Disable interrupt on END event. - END_k : INTENCLR_END_Field_1 := Intenclr_End_Field_Reset; - -- Disable interrupt on DISABLED event. - DISABLED : INTENCLR_DISABLED_Field_1 := - Intenclr_Disabled_Field_Reset; - -- Disable interrupt on DEVMATCH event. - DEVMATCH : INTENCLR_DEVMATCH_Field_1 := - Intenclr_Devmatch_Field_Reset; - -- Disable interrupt on DEVMISS event. - DEVMISS : INTENCLR_DEVMISS_Field_1 := - Intenclr_Devmiss_Field_Reset; - -- Disable interrupt on RSSIEND event. - RSSIEND : INTENCLR_RSSIEND_Field_1 := - Intenclr_Rssiend_Field_Reset; - -- unspecified - Reserved_8_9 : nrf51.UInt2 := 16#0#; - -- Disable interrupt on BCMATCH event. - BCMATCH : INTENCLR_BCMATCH_Field_1 := - Intenclr_Bcmatch_Field_Reset; - -- unspecified - Reserved_11_31 : nrf51.UInt21 := 16#0#; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for INTENCLR_Register use record - READY at 0 range 0 .. 0; - ADDRESS at 0 range 1 .. 1; - PAYLOAD at 0 range 2 .. 2; - END_k at 0 range 3 .. 3; - DISABLED at 0 range 4 .. 4; - DEVMATCH at 0 range 5 .. 5; - DEVMISS at 0 range 6 .. 6; - RSSIEND at 0 range 7 .. 7; - Reserved_8_9 at 0 range 8 .. 9; - BCMATCH at 0 range 10 .. 10; - Reserved_11_31 at 0 range 11 .. 31; - end record; - - -- CRC status of received packet. - type CRCSTATUS_CRCSTATUS_Field is - (-- Packet received with CRC error. - Crcerror, - -- Packet received with CRC ok. - Crcok) - with Size => 1; - for CRCSTATUS_CRCSTATUS_Field use - (Crcerror => 0, - Crcok => 1); - - -- CRC status of received packet. - type CRCSTATUS_Register is record - -- Read-only. CRC status of received packet. - CRCSTATUS : CRCSTATUS_CRCSTATUS_Field; - -- unspecified - Reserved_1_31 : nrf51.UInt31; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for CRCSTATUS_Register use record - CRCSTATUS at 0 range 0 .. 0; - Reserved_1_31 at 0 range 1 .. 31; - end record; - - subtype RXMATCH_RXMATCH_Field is nrf51.UInt3; - - -- Received address. - type RXMATCH_Register is record - -- Read-only. Logical address in which previous packet was received. - RXMATCH : RXMATCH_RXMATCH_Field; - -- unspecified - Reserved_3_31 : nrf51.UInt29; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for RXMATCH_Register use record - RXMATCH at 0 range 0 .. 2; - Reserved_3_31 at 0 range 3 .. 31; - end record; - - subtype RXCRC_RXCRC_Field is nrf51.UInt24; - - -- Received CRC. - type RXCRC_Register is record - -- Read-only. CRC field of previously received packet. - RXCRC : RXCRC_RXCRC_Field; - -- unspecified - Reserved_24_31 : nrf51.Byte; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for RXCRC_Register use record - RXCRC at 0 range 0 .. 23; - Reserved_24_31 at 0 range 24 .. 31; - end record; - - subtype DAI_DAI_Field is nrf51.UInt3; - - -- Device address match index. - type DAI_Register is record - -- Read-only. Index (n) of device address (see DAB[n] and DAP[n]) that - -- obtained an address match. - DAI : DAI_DAI_Field; - -- unspecified - Reserved_3_31 : nrf51.UInt29; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for DAI_Register use record - DAI at 0 range 0 .. 2; - Reserved_3_31 at 0 range 3 .. 31; - end record; - - subtype FREQUENCY_FREQUENCY_Field is nrf51.UInt7; - - -- Frequency. - type FREQUENCY_Register is record - -- Radio channel frequency offset in MHz: RF Frequency = 2400 + - -- FREQUENCY (MHz). Decision point: TXEN or RXEN task. - FREQUENCY : FREQUENCY_FREQUENCY_Field := 16#2#; - -- unspecified - Reserved_7_31 : nrf51.UInt25 := 16#0#; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for FREQUENCY_Register use record - FREQUENCY at 0 range 0 .. 6; - Reserved_7_31 at 0 range 7 .. 31; - end record; - - -- Radio output power. Decision point: TXEN task. - type TXPOWER_TXPOWER_Field is - (-- 0dBm. - Val_0DBm, - -- +4dBm. - Pos4DBm, - -- -30dBm. - Neg30DBm, - -- -20dBm. - Neg20DBm, - -- -16dBm. - Neg16DBm, - -- -12dBm. - Neg12DBm, - -- -8dBm. - Neg8DBm, - -- -4dBm. - Neg4DBm) - with Size => 8; - for TXPOWER_TXPOWER_Field use - (Val_0DBm => 0, - Pos4DBm => 4, - Neg30DBm => 216, - Neg20DBm => 236, - Neg16DBm => 240, - Neg12DBm => 244, - Neg8DBm => 248, - Neg4DBm => 252); - - -- Output power. - type TXPOWER_Register is record - -- Radio output power. Decision point: TXEN task. - TXPOWER : TXPOWER_TXPOWER_Field := nrf51.RADIO.Val_0DBm; - -- unspecified - Reserved_8_31 : nrf51.UInt24 := 16#0#; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for TXPOWER_Register use record - TXPOWER at 0 range 0 .. 7; - Reserved_8_31 at 0 range 8 .. 31; - end record; - - -- Radio data rate and modulation setting. Decision point: TXEN or RXEN - -- task. - type MODE_MODE_Field is - (-- 1Mbit/s Nordic propietary radio mode. - Nrf_1Mbit, - -- 2Mbit/s Nordic propietary radio mode. - Nrf_2Mbit, - -- 250kbit/s Nordic propietary radio mode. - Nrf_250Kbit, - -- 1Mbit/s Bluetooth Low Energy - Ble_1Mbit) - with Size => 2; - for MODE_MODE_Field use - (Nrf_1Mbit => 0, - Nrf_2Mbit => 1, - Nrf_250Kbit => 2, - Ble_1Mbit => 3); - - -- Data rate and modulation. - type MODE_Register is record - -- Radio data rate and modulation setting. Decision point: TXEN or RXEN - -- task. - MODE : MODE_MODE_Field := nrf51.RADIO.Nrf_1Mbit; - -- unspecified - Reserved_2_31 : nrf51.UInt30 := 16#0#; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for MODE_Register use record - MODE at 0 range 0 .. 1; - Reserved_2_31 at 0 range 2 .. 31; - end record; - - subtype PCNF0_LFLEN_Field is nrf51.UInt4; - subtype PCNF0_S0LEN_Field is nrf51.Bit; - subtype PCNF0_S1LEN_Field is nrf51.UInt4; - - -- Packet configuration 0. - type PCNF0_Register is record - -- Length of length field in number of bits. Decision point: START task. - LFLEN : PCNF0_LFLEN_Field := 16#0#; - -- unspecified - Reserved_4_7 : nrf51.UInt4 := 16#0#; - -- Length of S0 field in number of bytes. Decision point: START task. - S0LEN : PCNF0_S0LEN_Field := 16#0#; - -- unspecified - Reserved_9_15 : nrf51.UInt7 := 16#0#; - -- Length of S1 field in number of bits. Decision point: START task. - S1LEN : PCNF0_S1LEN_Field := 16#0#; - -- unspecified - Reserved_20_31 : nrf51.UInt12 := 16#0#; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for PCNF0_Register use record - LFLEN at 0 range 0 .. 3; - Reserved_4_7 at 0 range 4 .. 7; - S0LEN at 0 range 8 .. 8; - Reserved_9_15 at 0 range 9 .. 15; - S1LEN at 0 range 16 .. 19; - Reserved_20_31 at 0 range 20 .. 31; - end record; - - subtype PCNF1_MAXLEN_Field is nrf51.Byte; - subtype PCNF1_STATLEN_Field is nrf51.Byte; - subtype PCNF1_BALEN_Field is nrf51.UInt3; - - -- On air endianness of packet length field. Decision point: START task. - type PCNF1_ENDIAN_Field is - (-- Least significant bit on air first - Little, - -- Most significant bit on air first - Big) - with Size => 1; - for PCNF1_ENDIAN_Field use - (Little => 0, - Big => 1); - - -- Packet whitening enable. - type PCNF1_WHITEEN_Field is - (-- Whitening disabled. - Disabled, - -- Whitening enabled. - Enabled) - with Size => 1; - for PCNF1_WHITEEN_Field use - (Disabled => 0, - Enabled => 1); - - -- Packet configuration 1. - type PCNF1_Register is record - -- Maximum length of packet payload in number of bytes. - MAXLEN : PCNF1_MAXLEN_Field := 16#0#; - -- Static length in number of bytes. Decision point: START task. - STATLEN : PCNF1_STATLEN_Field := 16#0#; - -- Base address length in number of bytes. Decision point: START task. - BALEN : PCNF1_BALEN_Field := 16#0#; - -- unspecified - Reserved_19_23 : nrf51.UInt5 := 16#0#; - -- On air endianness of packet length field. Decision point: START task. - ENDIAN : PCNF1_ENDIAN_Field := nrf51.RADIO.Little; - -- Packet whitening enable. - WHITEEN : PCNF1_WHITEEN_Field := nrf51.RADIO.Disabled; - -- unspecified - Reserved_26_31 : nrf51.UInt6 := 16#0#; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for PCNF1_Register use record - MAXLEN at 0 range 0 .. 7; - STATLEN at 0 range 8 .. 15; - BALEN at 0 range 16 .. 18; - Reserved_19_23 at 0 range 19 .. 23; - ENDIAN at 0 range 24 .. 24; - WHITEEN at 0 range 25 .. 25; - Reserved_26_31 at 0 range 26 .. 31; - end record; - - -- PREFIX0_AP array element - subtype PREFIX0_AP_Element is nrf51.Byte; - - -- PREFIX0_AP array - type PREFIX0_AP_Field_Array is array (0 .. 3) of PREFIX0_AP_Element - with Component_Size => 8, Size => 32; - - -- Prefixes bytes for logical addresses 0 to 3. - type PREFIX0_Register - (As_Array : Boolean := False) - is record - case As_Array is - when False => - -- AP as a value - Val : nrf51.UInt32; - when True => - -- AP as an array - Arr : PREFIX0_AP_Field_Array; - end case; - end record - with Unchecked_Union, Size => 32, Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for PREFIX0_Register use record - Val at 0 range 0 .. 31; - Arr at 0 range 0 .. 31; - end record; - - -- PREFIX1_AP array element - subtype PREFIX1_AP_Element is nrf51.Byte; - - -- PREFIX1_AP array - type PREFIX1_AP_Field_Array is array (4 .. 7) of PREFIX1_AP_Element - with Component_Size => 8, Size => 32; - - -- Prefixes bytes for logical addresses 4 to 7. - type PREFIX1_Register - (As_Array : Boolean := False) - is record - case As_Array is - when False => - -- AP as a value - Val : nrf51.UInt32; - when True => - -- AP as an array - Arr : PREFIX1_AP_Field_Array; - end case; - end record - with Unchecked_Union, Size => 32, Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for PREFIX1_Register use record - Val at 0 range 0 .. 31; - Arr at 0 range 0 .. 31; - end record; - - subtype TXADDRESS_TXADDRESS_Field is nrf51.UInt3; - - -- Transmit address select. - type TXADDRESS_Register is record - -- Logical address to be used when transmitting a packet. Decision - -- point: START task. - TXADDRESS : TXADDRESS_TXADDRESS_Field := 16#0#; - -- unspecified - Reserved_3_31 : nrf51.UInt29 := 16#0#; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for TXADDRESS_Register use record - TXADDRESS at 0 range 0 .. 2; - Reserved_3_31 at 0 range 3 .. 31; - end record; - - -- Enable reception on logical address 0. Decision point: START task. - type RXADDRESSES_ADDR0_Field is - (-- Reception disabled. - Disabled, - -- Reception enabled. - Enabled) - with Size => 1; - for RXADDRESSES_ADDR0_Field use - (Disabled => 0, - Enabled => 1); - - -- RXADDRESSES_ADDR array - type RXADDRESSES_ADDR_Field_Array is array (0 .. 7) - of RXADDRESSES_ADDR0_Field - with Component_Size => 1, Size => 8; - - -- Type definition for RXADDRESSES_ADDR - type RXADDRESSES_ADDR_Field - (As_Array : Boolean := False) - is record - case As_Array is - when False => - -- ADDR as a value - Val : nrf51.Byte; - when True => - -- ADDR as an array - Arr : RXADDRESSES_ADDR_Field_Array; - end case; - end record - with Unchecked_Union, Size => 8; - - for RXADDRESSES_ADDR_Field use record - Val at 0 range 0 .. 7; - Arr at 0 range 0 .. 7; - end record; - - -- Receive address select. - type RXADDRESSES_Register is record - -- Enable reception on logical address 0. Decision point: START task. - ADDR : RXADDRESSES_ADDR_Field := - (As_Array => False, Val => 16#0#); - -- unspecified - Reserved_8_31 : nrf51.UInt24 := 16#0#; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for RXADDRESSES_Register use record - ADDR at 0 range 0 .. 7; - Reserved_8_31 at 0 range 8 .. 31; - end record; - - -- CRC length. Decision point: START task. - type CRCCNF_LEN_Field is - (-- CRC calculation disabled. - Disabled, - -- One byte long CRC. - One, - -- Two bytes long CRC. - Two, - -- Three bytes long CRC. - Three) - with Size => 2; - for CRCCNF_LEN_Field use - (Disabled => 0, - One => 1, - Two => 2, - Three => 3); - - -- Leave packet address field out of the CRC calculation. Decision point: - -- START task. - type CRCCNF_SKIPADDR_Field is - (-- Include packet address in CRC calculation. - Include, - -- Packet address is skipped in CRC calculation. The CRC calculation will --- start at the first byte after the address. - Skip) - with Size => 1; - for CRCCNF_SKIPADDR_Field use - (Include => 0, - Skip => 1); - - -- CRC configuration. - type CRCCNF_Register is record - -- CRC length. Decision point: START task. - LEN : CRCCNF_LEN_Field := nrf51.RADIO.Disabled; - -- unspecified - Reserved_2_7 : nrf51.UInt6 := 16#0#; - -- Leave packet address field out of the CRC calculation. Decision - -- point: START task. - SKIPADDR : CRCCNF_SKIPADDR_Field := nrf51.RADIO.Include; - -- unspecified - Reserved_9_31 : nrf51.UInt23 := 16#0#; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for CRCCNF_Register use record - LEN at 0 range 0 .. 1; - Reserved_2_7 at 0 range 2 .. 7; - SKIPADDR at 0 range 8 .. 8; - Reserved_9_31 at 0 range 9 .. 31; - end record; - - subtype CRCPOLY_CRCPOLY_Field is nrf51.UInt24; - - -- CRC polynomial. - type CRCPOLY_Register is record - -- CRC polynomial. Decision point: START task. - CRCPOLY : CRCPOLY_CRCPOLY_Field := 16#0#; - -- unspecified - Reserved_24_31 : nrf51.Byte := 16#0#; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for CRCPOLY_Register use record - CRCPOLY at 0 range 0 .. 23; - Reserved_24_31 at 0 range 24 .. 31; - end record; - - subtype CRCINIT_CRCINIT_Field is nrf51.UInt24; - - -- CRC initial value. - type CRCINIT_Register is record - -- Initial value for CRC calculation. Decision point: START task. - CRCINIT : CRCINIT_CRCINIT_Field := 16#0#; - -- unspecified - Reserved_24_31 : nrf51.Byte := 16#0#; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for CRCINIT_Register use record - CRCINIT at 0 range 0 .. 23; - Reserved_24_31 at 0 range 24 .. 31; - end record; - - -- Constant carrier. Decision point: TXEN task. - type TEST_CONSTCARRIER_Field is - (-- Constant carrier disabled. - Disabled, - -- Constant carrier enabled. - Enabled) - with Size => 1; - for TEST_CONSTCARRIER_Field use - (Disabled => 0, - Enabled => 1); - - -- PLL lock. Decision point: TXEN or RXEN task. - type TEST_PLLLOCK_Field is - (-- PLL lock disabled. - Disabled, - -- PLL lock enabled. - Enabled) - with Size => 1; - for TEST_PLLLOCK_Field use - (Disabled => 0, - Enabled => 1); - - -- Test features enable register. - type TEST_Register is record - -- Constant carrier. Decision point: TXEN task. - CONSTCARRIER : TEST_CONSTCARRIER_Field := nrf51.RADIO.Disabled; - -- PLL lock. Decision point: TXEN or RXEN task. - PLLLOCK : TEST_PLLLOCK_Field := nrf51.RADIO.Disabled; - -- unspecified - Reserved_2_31 : nrf51.UInt30 := 16#0#; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for TEST_Register use record - CONSTCARRIER at 0 range 0 .. 0; - PLLLOCK at 0 range 1 .. 1; - Reserved_2_31 at 0 range 2 .. 31; - end record; - - subtype TIFS_TIFS_Field is nrf51.Byte; - - -- Inter Frame Spacing in microseconds. - type TIFS_Register is record - -- Inter frame spacing in microseconds. Decision point: START rask - TIFS : TIFS_TIFS_Field := 16#0#; - -- unspecified - Reserved_8_31 : nrf51.UInt24 := 16#0#; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for TIFS_Register use record - TIFS at 0 range 0 .. 7; - Reserved_8_31 at 0 range 8 .. 31; - end record; - - subtype RSSISAMPLE_RSSISAMPLE_Field is nrf51.UInt7; - - -- RSSI sample. - type RSSISAMPLE_Register is record - -- Read-only. RSSI sample result. The result is read as a positive value - -- so that ReceivedSignalStrength = -RSSISAMPLE dBm - RSSISAMPLE : RSSISAMPLE_RSSISAMPLE_Field; - -- unspecified - Reserved_7_31 : nrf51.UInt25; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for RSSISAMPLE_Register use record - RSSISAMPLE at 0 range 0 .. 6; - Reserved_7_31 at 0 range 7 .. 31; - end record; - - -- Current radio state. - type STATE_STATE_Field is - (-- Radio is in the Disabled state. - Disabled, - -- Radio is in the Rx Ramp Up state. - Rxru, - -- Radio is in the Rx Idle state. - Rxidle, - -- Radio is in the Rx state. - Rx, - -- Radio is in the Rx Disable state. - Rxdisable, - -- Radio is in the Tx Ramp Up state. - Txru, - -- Radio is in the Tx Idle state. - Txidle, - -- Radio is in the Tx state. - Tx, - -- Radio is in the Tx Disable state. - Txdisable) - with Size => 4; - for STATE_STATE_Field use - (Disabled => 0, - Rxru => 1, - Rxidle => 2, - Rx => 3, - Rxdisable => 4, - Txru => 9, - Txidle => 10, - Tx => 11, - Txdisable => 12); - - -- Current radio state. - type STATE_Register is record - -- Read-only. Current radio state. - STATE : STATE_STATE_Field; - -- unspecified - Reserved_4_31 : nrf51.UInt28; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for STATE_Register use record - STATE at 0 range 0 .. 3; - Reserved_4_31 at 0 range 4 .. 31; - end record; - - subtype DATAWHITEIV_DATAWHITEIV_Field is nrf51.UInt7; - - -- Data whitening initial value. - type DATAWHITEIV_Register is record - -- Data whitening initial value. Bit 0 corresponds to Position 0 of the - -- LSFR, Bit 1 to position 5... Decision point: TXEN or RXEN task. - DATAWHITEIV : DATAWHITEIV_DATAWHITEIV_Field := 16#40#; - -- unspecified - Reserved_7_31 : nrf51.UInt25 := 16#0#; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for DATAWHITEIV_Register use record - DATAWHITEIV at 0 range 0 .. 6; - Reserved_7_31 at 0 range 7 .. 31; - end record; - - -- Device address base segment. - - -- Device address base segment. - type DAB_Registers is array (0 .. 7) of nrf51.UInt32; - - subtype DAP_DAP_Field is nrf51.UInt16; - - -- Device address prefix. - type DAP_Register is record - -- Device address prefix. - DAP : DAP_DAP_Field := 16#0#; - -- unspecified - Reserved_16_31 : nrf51.UInt16 := 16#0#; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for DAP_Register use record - DAP at 0 range 0 .. 15; - Reserved_16_31 at 0 range 16 .. 31; - end record; - - -- Device address prefix. - type DAP_Registers is array (0 .. 7) of DAP_Register; - - -- Enable or disable device address matching using device address 0. - type DACNF_ENA0_Field is - (-- Disabled. - Disabled, - -- Enabled. - Enabled) - with Size => 1; - for DACNF_ENA0_Field use - (Disabled => 0, - Enabled => 1); - - -- DACNF_ENA array - type DACNF_ENA_Field_Array is array (0 .. 7) of DACNF_ENA0_Field - with Component_Size => 1, Size => 8; - - -- Type definition for DACNF_ENA - type DACNF_ENA_Field - (As_Array : Boolean := False) - is record - case As_Array is - when False => - -- ENA as a value - Val : nrf51.Byte; - when True => - -- ENA as an array - Arr : DACNF_ENA_Field_Array; - end case; - end record - with Unchecked_Union, Size => 8; - - for DACNF_ENA_Field use record - Val at 0 range 0 .. 7; - Arr at 0 range 0 .. 7; - end record; - - -- DACNF_TXADD array element - subtype DACNF_TXADD_Element is nrf51.Bit; - - -- DACNF_TXADD array - type DACNF_TXADD_Field_Array is array (0 .. 7) of DACNF_TXADD_Element - with Component_Size => 1, Size => 8; - - -- Type definition for DACNF_TXADD - type DACNF_TXADD_Field - (As_Array : Boolean := False) - is record - case As_Array is - when False => - -- TXADD as a value - Val : nrf51.Byte; - when True => - -- TXADD as an array - Arr : DACNF_TXADD_Field_Array; - end case; - end record - with Unchecked_Union, Size => 8; - - for DACNF_TXADD_Field use record - Val at 0 range 0 .. 7; - Arr at 0 range 0 .. 7; - end record; - - -- Device address match configuration. - type DACNF_Register is record - -- Enable or disable device address matching using device address 0. - ENA : DACNF_ENA_Field := (As_Array => False, Val => 16#0#); - -- TxAdd for device address 0. - TXADD : DACNF_TXADD_Field := (As_Array => False, Val => 16#0#); - -- unspecified - Reserved_16_31 : nrf51.UInt16 := 16#0#; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for DACNF_Register use record - ENA at 0 range 0 .. 7; - TXADD at 0 range 8 .. 15; - Reserved_16_31 at 0 range 16 .. 31; - end record; - - subtype OVERRIDE4_OVERRIDE4_Field is nrf51.UInt28; - - -- Enable or disable override of default trim values. - type OVERRIDE4_ENABLE_Field is - (-- Override trim values disabled. - Disabled, - -- Override trim values enabled. - Enabled) - with Size => 1; - for OVERRIDE4_ENABLE_Field use - (Disabled => 0, - Enabled => 1); - - -- Trim value override register 4. - type OVERRIDE4_Register is record - -- Trim value override 4. - OVERRIDE4 : OVERRIDE4_OVERRIDE4_Field := 16#0#; - -- unspecified - Reserved_28_30 : nrf51.UInt3 := 16#0#; - -- Enable or disable override of default trim values. - ENABLE : OVERRIDE4_ENABLE_Field := nrf51.RADIO.Disabled; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for OVERRIDE4_Register use record - OVERRIDE4 at 0 range 0 .. 27; - Reserved_28_30 at 0 range 28 .. 30; - ENABLE at 0 range 31 .. 31; - end record; - - -- Peripheral power control. - type POWER_POWER_Field is - (-- Module power disabled. - Disabled, - -- Module power enabled. - Enabled) - with Size => 1; - for POWER_POWER_Field use - (Disabled => 0, - Enabled => 1); - - -- Peripheral power control. - type POWER_Register is record - -- Peripheral power control. - POWER : POWER_POWER_Field := nrf51.RADIO.Disabled; - -- unspecified - Reserved_1_31 : nrf51.UInt31 := 16#0#; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for POWER_Register use record - POWER at 0 range 0 .. 0; - Reserved_1_31 at 0 range 1 .. 31; - end record; - - ----------------- - -- Peripherals -- - ----------------- - - -- The radio. - type RADIO_Peripheral is record - -- Enable radio in TX mode. - TASKS_TXEN : aliased nrf51.UInt32; - -- Enable radio in RX mode. - TASKS_RXEN : aliased nrf51.UInt32; - -- Start radio. - TASKS_START : aliased nrf51.UInt32; - -- Stop radio. - TASKS_STOP : aliased nrf51.UInt32; - -- Disable radio. - TASKS_DISABLE : aliased nrf51.UInt32; - -- Start the RSSI and take one sample of the receive signal strength. - TASKS_RSSISTART : aliased nrf51.UInt32; - -- Stop the RSSI measurement. - TASKS_RSSISTOP : aliased nrf51.UInt32; - -- Start the bit counter. - TASKS_BCSTART : aliased nrf51.UInt32; - -- Stop the bit counter. - TASKS_BCSTOP : aliased nrf51.UInt32; - -- Ready event. - EVENTS_READY : aliased nrf51.UInt32; - -- Address event. - EVENTS_ADDRESS : aliased nrf51.UInt32; - -- Payload event. - EVENTS_PAYLOAD : aliased nrf51.UInt32; - -- End event. - EVENTS_END : aliased nrf51.UInt32; - -- Disable event. - EVENTS_DISABLED : aliased nrf51.UInt32; - -- A device address match occurred on the last received packet. - EVENTS_DEVMATCH : aliased nrf51.UInt32; - -- No device address match occurred on the last received packet. - EVENTS_DEVMISS : aliased nrf51.UInt32; - -- Sampling of the receive signal strength complete. A new RSSI sample - -- is ready for readout at the RSSISAMPLE register. - EVENTS_RSSIEND : aliased nrf51.UInt32; - -- Bit counter reached bit count value specified in BCC register. - EVENTS_BCMATCH : aliased nrf51.UInt32; - -- Shortcuts for the radio. - SHORTS : aliased SHORTS_Register; - -- Interrupt enable set register. - INTENSET : aliased INTENSET_Register; - -- Interrupt enable clear register. - INTENCLR : aliased INTENCLR_Register; - -- CRC status of received packet. - CRCSTATUS : aliased CRCSTATUS_Register; - -- Received address. - RXMATCH : aliased RXMATCH_Register; - -- Received CRC. - RXCRC : aliased RXCRC_Register; - -- Device address match index. - DAI : aliased DAI_Register; - -- Packet pointer. Decision point: START task. - PACKETPTR : aliased nrf51.UInt32; - -- Frequency. - FREQUENCY : aliased FREQUENCY_Register; - -- Output power. - TXPOWER : aliased TXPOWER_Register; - -- Data rate and modulation. - MODE : aliased MODE_Register; - -- Packet configuration 0. - PCNF0 : aliased PCNF0_Register; - -- Packet configuration 1. - PCNF1 : aliased PCNF1_Register; - -- Radio base address 0. Decision point: START task. - BASE0 : aliased nrf51.UInt32; - -- Radio base address 1. Decision point: START task. - BASE1 : aliased nrf51.UInt32; - -- Prefixes bytes for logical addresses 0 to 3. - PREFIX0 : aliased PREFIX0_Register; - -- Prefixes bytes for logical addresses 4 to 7. - PREFIX1 : aliased PREFIX1_Register; - -- Transmit address select. - TXADDRESS : aliased TXADDRESS_Register; - -- Receive address select. - RXADDRESSES : aliased RXADDRESSES_Register; - -- CRC configuration. - CRCCNF : aliased CRCCNF_Register; - -- CRC polynomial. - CRCPOLY : aliased CRCPOLY_Register; - -- CRC initial value. - CRCINIT : aliased CRCINIT_Register; - -- Test features enable register. - TEST : aliased TEST_Register; - -- Inter Frame Spacing in microseconds. - TIFS : aliased TIFS_Register; - -- RSSI sample. - RSSISAMPLE : aliased RSSISAMPLE_Register; - -- Current radio state. - STATE : aliased STATE_Register; - -- Data whitening initial value. - DATAWHITEIV : aliased DATAWHITEIV_Register; - -- Bit counter compare. - BCC : aliased nrf51.UInt32; - -- Device address base segment. - DAB : aliased DAB_Registers; - -- Device address prefix. - DAP : aliased DAP_Registers; - -- Device address match configuration. - DACNF : aliased DACNF_Register; - -- Trim value override register 0. - OVERRIDE0 : aliased nrf51.UInt32; - -- Trim value override register 1. - OVERRIDE1 : aliased nrf51.UInt32; - -- Trim value override register 2. - OVERRIDE2 : aliased nrf51.UInt32; - -- Trim value override register 3. - OVERRIDE3 : aliased nrf51.UInt32; - -- Trim value override register 4. - OVERRIDE4 : aliased OVERRIDE4_Register; - -- Peripheral power control. - POWER : aliased POWER_Register; - end record - with Volatile; - - for RADIO_Peripheral use record - TASKS_TXEN at 16#0# range 0 .. 31; - TASKS_RXEN at 16#4# range 0 .. 31; - TASKS_START at 16#8# range 0 .. 31; - TASKS_STOP at 16#C# range 0 .. 31; - TASKS_DISABLE at 16#10# range 0 .. 31; - TASKS_RSSISTART at 16#14# range 0 .. 31; - TASKS_RSSISTOP at 16#18# range 0 .. 31; - TASKS_BCSTART at 16#1C# range 0 .. 31; - TASKS_BCSTOP at 16#20# range 0 .. 31; - EVENTS_READY at 16#100# range 0 .. 31; - EVENTS_ADDRESS at 16#104# range 0 .. 31; - EVENTS_PAYLOAD at 16#108# range 0 .. 31; - EVENTS_END at 16#10C# range 0 .. 31; - EVENTS_DISABLED at 16#110# range 0 .. 31; - EVENTS_DEVMATCH at 16#114# range 0 .. 31; - EVENTS_DEVMISS at 16#118# range 0 .. 31; - EVENTS_RSSIEND at 16#11C# range 0 .. 31; - EVENTS_BCMATCH at 16#128# range 0 .. 31; - SHORTS at 16#200# range 0 .. 31; - INTENSET at 16#304# range 0 .. 31; - INTENCLR at 16#308# range 0 .. 31; - CRCSTATUS at 16#400# range 0 .. 31; - RXMATCH at 16#408# range 0 .. 31; - RXCRC at 16#40C# range 0 .. 31; - DAI at 16#410# range 0 .. 31; - PACKETPTR at 16#504# range 0 .. 31; - FREQUENCY at 16#508# range 0 .. 31; - TXPOWER at 16#50C# range 0 .. 31; - MODE at 16#510# range 0 .. 31; - PCNF0 at 16#514# range 0 .. 31; - PCNF1 at 16#518# range 0 .. 31; - BASE0 at 16#51C# range 0 .. 31; - BASE1 at 16#520# range 0 .. 31; - PREFIX0 at 16#524# range 0 .. 31; - PREFIX1 at 16#528# range 0 .. 31; - TXADDRESS at 16#52C# range 0 .. 31; - RXADDRESSES at 16#530# range 0 .. 31; - CRCCNF at 16#534# range 0 .. 31; - CRCPOLY at 16#538# range 0 .. 31; - CRCINIT at 16#53C# range 0 .. 31; - TEST at 16#540# range 0 .. 31; - TIFS at 16#544# range 0 .. 31; - RSSISAMPLE at 16#548# range 0 .. 31; - STATE at 16#550# range 0 .. 31; - DATAWHITEIV at 16#554# range 0 .. 31; - BCC at 16#560# range 0 .. 31; - DAB at 16#600# range 0 .. 255; - DAP at 16#620# range 0 .. 255; - DACNF at 16#640# range 0 .. 31; - OVERRIDE0 at 16#724# range 0 .. 31; - OVERRIDE1 at 16#728# range 0 .. 31; - OVERRIDE2 at 16#72C# range 0 .. 31; - OVERRIDE3 at 16#730# range 0 .. 31; - OVERRIDE4 at 16#734# range 0 .. 31; - POWER at 16#FFC# range 0 .. 31; - end record; - - -- The radio. - RADIO_Periph : aliased RADIO_Peripheral - with Import, Address => RADIO_Base; - -end nrf51.RADIO; diff --git a/microbit/nrf51/nrf51-rng.ads b/microbit/nrf51/nrf51-rng.ads deleted file mode 100644 index 6ebf858..0000000 --- a/microbit/nrf51/nrf51-rng.ads +++ /dev/null @@ -1,258 +0,0 @@ -pragma Ada_2012; -pragma Style_Checks (Off); - --- Copyright (c) 2013, Nordic Semiconductor ASA --- All rights reserved. --- --- Redistribution and use in source and binary forms, with or without --- modification, are permitted provided that the following conditions are met: --- --- * Redistributions of source code must retain the above copyright notice, this --- list of conditions and the following disclaimer. --- --- * Redistributions in binary form must reproduce the above copyright notice, --- this list of conditions and the following disclaimer in the documentation --- and/or other materials provided with the distribution. --- --- * Neither the name of Nordic Semiconductor ASA nor the names of its --- contributors may be used to endorse or promote products derived from --- this software without specific prior written permission. --- --- THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" --- AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE --- IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE --- DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE --- FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL --- DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR --- SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER --- CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, --- OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE --- OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. --- - --- This spec has been automatically generated from nrf51.svd - -pragma Restrictions (No_Elaboration_Code); - -with System; - -package nrf51.RNG is - pragma Preelaborate; - - --------------- - -- Registers -- - --------------- - - -- Shortcut between VALRDY event and STOP task. - type SHORTS_VALRDY_STOP_Field is - (-- Shortcut disabled. - Disabled, - -- Shortcut enabled. - Enabled) - with Size => 1; - for SHORTS_VALRDY_STOP_Field use - (Disabled => 0, - Enabled => 1); - - -- Shortcuts for the RNG. - type SHORTS_Register is record - -- Shortcut between VALRDY event and STOP task. - VALRDY_STOP : SHORTS_VALRDY_STOP_Field := nrf51.RNG.Disabled; - -- unspecified - Reserved_1_31 : nrf51.UInt31 := 16#0#; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for SHORTS_Register use record - VALRDY_STOP at 0 range 0 .. 0; - Reserved_1_31 at 0 range 1 .. 31; - end record; - - -- Enable interrupt on VALRDY event. - type INTENSET_VALRDY_Field is - (-- Interrupt disabled. - Disabled, - -- Interrupt enabled. - Enabled) - with Size => 1; - for INTENSET_VALRDY_Field use - (Disabled => 0, - Enabled => 1); - - -- Enable interrupt on VALRDY event. - type INTENSET_VALRDY_Field_1 is - (-- Reset value for the field - Intenset_Valrdy_Field_Reset, - -- Enable interrupt on write. - Set) - with Size => 1; - for INTENSET_VALRDY_Field_1 use - (Intenset_Valrdy_Field_Reset => 0, - Set => 1); - - -- Interrupt enable set register - type INTENSET_Register is record - -- Enable interrupt on VALRDY event. - VALRDY : INTENSET_VALRDY_Field_1 := Intenset_Valrdy_Field_Reset; - -- unspecified - Reserved_1_31 : nrf51.UInt31 := 16#0#; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for INTENSET_Register use record - VALRDY at 0 range 0 .. 0; - Reserved_1_31 at 0 range 1 .. 31; - end record; - - -- Disable interrupt on VALRDY event. - type INTENCLR_VALRDY_Field is - (-- Interrupt disabled. - Disabled, - -- Interrupt enabled. - Enabled) - with Size => 1; - for INTENCLR_VALRDY_Field use - (Disabled => 0, - Enabled => 1); - - -- Disable interrupt on VALRDY event. - type INTENCLR_VALRDY_Field_1 is - (-- Reset value for the field - Intenclr_Valrdy_Field_Reset, - -- Disable interrupt on write. - Clear) - with Size => 1; - for INTENCLR_VALRDY_Field_1 use - (Intenclr_Valrdy_Field_Reset => 0, - Clear => 1); - - -- Interrupt enable clear register - type INTENCLR_Register is record - -- Disable interrupt on VALRDY event. - VALRDY : INTENCLR_VALRDY_Field_1 := Intenclr_Valrdy_Field_Reset; - -- unspecified - Reserved_1_31 : nrf51.UInt31 := 16#0#; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for INTENCLR_Register use record - VALRDY at 0 range 0 .. 0; - Reserved_1_31 at 0 range 1 .. 31; - end record; - - -- Digital error correction enable. - type CONFIG_DERCEN_Field is - (-- Digital error correction disabled. - Disabled, - -- Digital error correction enabled. - Enabled) - with Size => 1; - for CONFIG_DERCEN_Field use - (Disabled => 0, - Enabled => 1); - - -- Configuration register. - type CONFIG_Register is record - -- Digital error correction enable. - DERCEN : CONFIG_DERCEN_Field := nrf51.RNG.Disabled; - -- unspecified - Reserved_1_31 : nrf51.UInt31 := 16#0#; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for CONFIG_Register use record - DERCEN at 0 range 0 .. 0; - Reserved_1_31 at 0 range 1 .. 31; - end record; - - subtype VALUE_VALUE_Field is nrf51.Byte; - - -- RNG random number. - type VALUE_Register is record - -- Read-only. Generated random number. - VALUE : VALUE_VALUE_Field; - -- unspecified - Reserved_8_31 : nrf51.UInt24; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for VALUE_Register use record - VALUE at 0 range 0 .. 7; - Reserved_8_31 at 0 range 8 .. 31; - end record; - - -- Peripheral power control. - type POWER_POWER_Field is - (-- Module power disabled. - Disabled, - -- Module power enabled. - Enabled) - with Size => 1; - for POWER_POWER_Field use - (Disabled => 0, - Enabled => 1); - - -- Peripheral power control. - type POWER_Register is record - -- Peripheral power control. - POWER : POWER_POWER_Field := nrf51.RNG.Disabled; - -- unspecified - Reserved_1_31 : nrf51.UInt31 := 16#0#; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for POWER_Register use record - POWER at 0 range 0 .. 0; - Reserved_1_31 at 0 range 1 .. 31; - end record; - - ----------------- - -- Peripherals -- - ----------------- - - -- Random Number Generator. - type RNG_Peripheral is record - -- Start the random number generator. - TASKS_START : aliased nrf51.UInt32; - -- Stop the random number generator. - TASKS_STOP : aliased nrf51.UInt32; - -- New random number generated and written to VALUE register. - EVENTS_VALRDY : aliased nrf51.UInt32; - -- Shortcuts for the RNG. - SHORTS : aliased SHORTS_Register; - -- Interrupt enable set register - INTENSET : aliased INTENSET_Register; - -- Interrupt enable clear register - INTENCLR : aliased INTENCLR_Register; - -- Configuration register. - CONFIG : aliased CONFIG_Register; - -- RNG random number. - VALUE : aliased VALUE_Register; - -- Peripheral power control. - POWER : aliased POWER_Register; - end record - with Volatile; - - for RNG_Peripheral use record - TASKS_START at 16#0# range 0 .. 31; - TASKS_STOP at 16#4# range 0 .. 31; - EVENTS_VALRDY at 16#100# range 0 .. 31; - SHORTS at 16#200# range 0 .. 31; - INTENSET at 16#304# range 0 .. 31; - INTENCLR at 16#308# range 0 .. 31; - CONFIG at 16#504# range 0 .. 31; - VALUE at 16#508# range 0 .. 31; - POWER at 16#FFC# range 0 .. 31; - end record; - - -- Random Number Generator. - RNG_Periph : aliased RNG_Peripheral - with Import, Address => RNG_Base; - -end nrf51.RNG; diff --git a/microbit/nrf51/nrf51-spi.ads b/microbit/nrf51/nrf51-spi.ads deleted file mode 100644 index 88be4d1..0000000 --- a/microbit/nrf51/nrf51-spi.ads +++ /dev/null @@ -1,323 +0,0 @@ -pragma Ada_2012; -pragma Style_Checks (Off); - --- Copyright (c) 2013, Nordic Semiconductor ASA --- All rights reserved. --- --- Redistribution and use in source and binary forms, with or without --- modification, are permitted provided that the following conditions are met: --- --- * Redistributions of source code must retain the above copyright notice, this --- list of conditions and the following disclaimer. --- --- * Redistributions in binary form must reproduce the above copyright notice, --- this list of conditions and the following disclaimer in the documentation --- and/or other materials provided with the distribution. --- --- * Neither the name of Nordic Semiconductor ASA nor the names of its --- contributors may be used to endorse or promote products derived from --- this software without specific prior written permission. --- --- THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" --- AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE --- IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE --- DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE --- FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL --- DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR --- SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER --- CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, --- OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE --- OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. --- - --- This spec has been automatically generated from nrf51.svd - -pragma Restrictions (No_Elaboration_Code); - -with System; - -package nrf51.SPI is - pragma Preelaborate; - - --------------- - -- Registers -- - --------------- - - -- Enable interrupt on READY event. - type INTENSET_READY_Field is - (-- Interrupt disabled. - Disabled, - -- Interrupt enabled. - Enabled) - with Size => 1; - for INTENSET_READY_Field use - (Disabled => 0, - Enabled => 1); - - -- Enable interrupt on READY event. - type INTENSET_READY_Field_1 is - (-- Reset value for the field - Intenset_Ready_Field_Reset, - -- Enable interrupt on write. - Set) - with Size => 1; - for INTENSET_READY_Field_1 use - (Intenset_Ready_Field_Reset => 0, - Set => 1); - - -- Interrupt enable set register. - type INTENSET_Register is record - -- unspecified - Reserved_0_1 : nrf51.UInt2 := 16#0#; - -- Enable interrupt on READY event. - READY : INTENSET_READY_Field_1 := Intenset_Ready_Field_Reset; - -- unspecified - Reserved_3_31 : nrf51.UInt29 := 16#0#; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for INTENSET_Register use record - Reserved_0_1 at 0 range 0 .. 1; - READY at 0 range 2 .. 2; - Reserved_3_31 at 0 range 3 .. 31; - end record; - - -- Disable interrupt on READY event. - type INTENCLR_READY_Field is - (-- Interrupt disabled. - Disabled, - -- Interrupt enabled. - Enabled) - with Size => 1; - for INTENCLR_READY_Field use - (Disabled => 0, - Enabled => 1); - - -- Disable interrupt on READY event. - type INTENCLR_READY_Field_1 is - (-- Reset value for the field - Intenclr_Ready_Field_Reset, - -- Disable interrupt on write. - Clear) - with Size => 1; - for INTENCLR_READY_Field_1 use - (Intenclr_Ready_Field_Reset => 0, - Clear => 1); - - -- Interrupt enable clear register. - type INTENCLR_Register is record - -- unspecified - Reserved_0_1 : nrf51.UInt2 := 16#0#; - -- Disable interrupt on READY event. - READY : INTENCLR_READY_Field_1 := Intenclr_Ready_Field_Reset; - -- unspecified - Reserved_3_31 : nrf51.UInt29 := 16#0#; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for INTENCLR_Register use record - Reserved_0_1 at 0 range 0 .. 1; - READY at 0 range 2 .. 2; - Reserved_3_31 at 0 range 3 .. 31; - end record; - - -- Enable or disable SPI. - type ENABLE_ENABLE_Field is - (-- Disabled SPI. - Disabled, - -- Enable SPI. - Enabled) - with Size => 3; - for ENABLE_ENABLE_Field use - (Disabled => 0, - Enabled => 1); - - -- Enable SPI. - type ENABLE_Register is record - -- Enable or disable SPI. - ENABLE : ENABLE_ENABLE_Field := nrf51.SPI.Disabled; - -- unspecified - Reserved_3_31 : nrf51.UInt29 := 16#0#; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for ENABLE_Register use record - ENABLE at 0 range 0 .. 2; - Reserved_3_31 at 0 range 3 .. 31; - end record; - - subtype RXD_RXD_Field is nrf51.Byte; - - -- RX data. - type RXD_Register is record - -- Read-only. *** Reading this field has side effects on other resources - -- ***. RX data from last transfer. - RXD : RXD_RXD_Field; - -- unspecified - Reserved_8_31 : nrf51.UInt24; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for RXD_Register use record - RXD at 0 range 0 .. 7; - Reserved_8_31 at 0 range 8 .. 31; - end record; - - subtype TXD_TXD_Field is nrf51.Byte; - - -- TX data. - type TXD_Register is record - -- TX data for next transfer. - TXD : TXD_TXD_Field := 16#0#; - -- unspecified - Reserved_8_31 : nrf51.UInt24 := 16#0#; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for TXD_Register use record - TXD at 0 range 0 .. 7; - Reserved_8_31 at 0 range 8 .. 31; - end record; - - -- Bit order. - type CONFIG_ORDER_Field is - (-- Most significant bit transmitted out first. - Msbfirst, - -- Least significant bit transmitted out first. - Lsbfirst) - with Size => 1; - for CONFIG_ORDER_Field use - (Msbfirst => 0, - Lsbfirst => 1); - - -- Serial clock (SCK) phase. - type CONFIG_CPHA_Field is - (-- Sample on leading edge of the clock. Shift serial data on trailing edge. - Leading, - -- Sample on trailing edge of the clock. Shift serial data on leading edge. - Trailing) - with Size => 1; - for CONFIG_CPHA_Field use - (Leading => 0, - Trailing => 1); - - -- Serial clock (SCK) polarity. - type CONFIG_CPOL_Field is - (-- Active high. - Activehigh, - -- Active low. - Activelow) - with Size => 1; - for CONFIG_CPOL_Field use - (Activehigh => 0, - Activelow => 1); - - -- Configuration register. - type CONFIG_Register is record - -- Bit order. - ORDER : CONFIG_ORDER_Field := nrf51.SPI.Msbfirst; - -- Serial clock (SCK) phase. - CPHA : CONFIG_CPHA_Field := nrf51.SPI.Leading; - -- Serial clock (SCK) polarity. - CPOL : CONFIG_CPOL_Field := nrf51.SPI.Activehigh; - -- unspecified - Reserved_3_31 : nrf51.UInt29 := 16#0#; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for CONFIG_Register use record - ORDER at 0 range 0 .. 0; - CPHA at 0 range 1 .. 1; - CPOL at 0 range 2 .. 2; - Reserved_3_31 at 0 range 3 .. 31; - end record; - - -- Peripheral power control. - type POWER_POWER_Field is - (-- Module power disabled. - Disabled, - -- Module power enabled. - Enabled) - with Size => 1; - for POWER_POWER_Field use - (Disabled => 0, - Enabled => 1); - - -- Peripheral power control. - type POWER_Register is record - -- Peripheral power control. - POWER : POWER_POWER_Field := nrf51.SPI.Disabled; - -- unspecified - Reserved_1_31 : nrf51.UInt31 := 16#0#; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for POWER_Register use record - POWER at 0 range 0 .. 0; - Reserved_1_31 at 0 range 1 .. 31; - end record; - - ----------------- - -- Peripherals -- - ----------------- - - -- SPI master 0. - type SPI_Peripheral is record - -- TXD byte sent and RXD byte received. - EVENTS_READY : aliased nrf51.UInt32; - -- Interrupt enable set register. - INTENSET : aliased INTENSET_Register; - -- Interrupt enable clear register. - INTENCLR : aliased INTENCLR_Register; - -- Enable SPI. - ENABLE : aliased ENABLE_Register; - -- Pin select for SCK. - PSELSCK : aliased nrf51.UInt32; - -- Pin select for MOSI. - PSELMOSI : aliased nrf51.UInt32; - -- Pin select for MISO. - PSELMISO : aliased nrf51.UInt32; - -- RX data. - RXD : aliased RXD_Register; - -- TX data. - TXD : aliased TXD_Register; - -- SPI frequency - FREQUENCY : aliased nrf51.UInt32; - -- Configuration register. - CONFIG : aliased CONFIG_Register; - -- Peripheral power control. - POWER : aliased POWER_Register; - end record - with Volatile; - - for SPI_Peripheral use record - EVENTS_READY at 16#108# range 0 .. 31; - INTENSET at 16#304# range 0 .. 31; - INTENCLR at 16#308# range 0 .. 31; - ENABLE at 16#500# range 0 .. 31; - PSELSCK at 16#508# range 0 .. 31; - PSELMOSI at 16#50C# range 0 .. 31; - PSELMISO at 16#510# range 0 .. 31; - RXD at 16#518# range 0 .. 31; - TXD at 16#51C# range 0 .. 31; - FREQUENCY at 16#524# range 0 .. 31; - CONFIG at 16#554# range 0 .. 31; - POWER at 16#FFC# range 0 .. 31; - end record; - - -- SPI master 0. - SPI0_Periph : aliased SPI_Peripheral - with Import, Address => SPI0_Base; - - -- SPI master 1. - SPI1_Periph : aliased SPI_Peripheral - with Import, Address => SPI1_Base; - -end nrf51.SPI; diff --git a/microbit/nrf51/nrf51-spim.ads b/microbit/nrf51/nrf51-spim.ads deleted file mode 100644 index e964e75..0000000 --- a/microbit/nrf51/nrf51-spim.ads +++ /dev/null @@ -1,622 +0,0 @@ -pragma Ada_2012; -pragma Style_Checks (Off); - --- Copyright (c) 2013, Nordic Semiconductor ASA --- All rights reserved. --- --- Redistribution and use in source and binary forms, with or without --- modification, are permitted provided that the following conditions are met: --- --- * Redistributions of source code must retain the above copyright notice, this --- list of conditions and the following disclaimer. --- --- * Redistributions in binary form must reproduce the above copyright notice, --- this list of conditions and the following disclaimer in the documentation --- and/or other materials provided with the distribution. --- --- * Neither the name of Nordic Semiconductor ASA nor the names of its --- contributors may be used to endorse or promote products derived from --- this software without specific prior written permission. --- --- THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" --- AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE --- IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE --- DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE --- FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL --- DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR --- SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER --- CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, --- OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE --- OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. --- - --- This spec has been automatically generated from nrf51.svd - -pragma Restrictions (No_Elaboration_Code); - -with System; - -package nrf51.SPIM is - pragma Preelaborate; - - --------------- - -- Registers -- - --------------- - - -- Enable interrupt on STOPPED event. - type INTENSET_STOPPED_Field is - (-- Interrupt disabled. - Disabled, - -- Interrupt enabled. - Enabled) - with Size => 1; - for INTENSET_STOPPED_Field use - (Disabled => 0, - Enabled => 1); - - -- Enable interrupt on STOPPED event. - type INTENSET_STOPPED_Field_1 is - (-- Reset value for the field - Intenset_Stopped_Field_Reset, - -- Enable interrupt on write. - Set) - with Size => 1; - for INTENSET_STOPPED_Field_1 use - (Intenset_Stopped_Field_Reset => 0, - Set => 1); - - -- Enable interrupt on ENDRX event. - type INTENSET_ENDRX_Field is - (-- Interrupt disabled. - Disabled, - -- Interrupt enabled. - Enabled) - with Size => 1; - for INTENSET_ENDRX_Field use - (Disabled => 0, - Enabled => 1); - - -- Enable interrupt on ENDRX event. - type INTENSET_ENDRX_Field_1 is - (-- Reset value for the field - Intenset_Endrx_Field_Reset, - -- Enable interrupt on write. - Set) - with Size => 1; - for INTENSET_ENDRX_Field_1 use - (Intenset_Endrx_Field_Reset => 0, - Set => 1); - - -- Enable interrupt on ENDTX event. - type INTENSET_ENDTX_Field is - (-- Interrupt disabled. - Disabled, - -- Interrupt enabled. - Enabled) - with Size => 1; - for INTENSET_ENDTX_Field use - (Disabled => 0, - Enabled => 1); - - -- Enable interrupt on ENDTX event. - type INTENSET_ENDTX_Field_1 is - (-- Reset value for the field - Intenset_Endtx_Field_Reset, - -- Enable interrupt on write. - Set) - with Size => 1; - for INTENSET_ENDTX_Field_1 use - (Intenset_Endtx_Field_Reset => 0, - Set => 1); - - -- Enable interrupt on STARTED event. - type INTENSET_STARTED_Field is - (-- Interrupt disabled. - Disabled, - -- Interrupt enabled. - Enabled) - with Size => 1; - for INTENSET_STARTED_Field use - (Disabled => 0, - Enabled => 1); - - -- Enable interrupt on STARTED event. - type INTENSET_STARTED_Field_1 is - (-- Reset value for the field - Intenset_Started_Field_Reset, - -- Enable interrupt on write. - Set) - with Size => 1; - for INTENSET_STARTED_Field_1 use - (Intenset_Started_Field_Reset => 0, - Set => 1); - - -- Interrupt enable set register. - type INTENSET_Register is record - -- unspecified - Reserved_0_0 : nrf51.Bit := 16#0#; - -- Enable interrupt on STOPPED event. - STOPPED : INTENSET_STOPPED_Field_1 := - Intenset_Stopped_Field_Reset; - -- unspecified - Reserved_2_3 : nrf51.UInt2 := 16#0#; - -- Enable interrupt on ENDRX event. - ENDRX : INTENSET_ENDRX_Field_1 := Intenset_Endrx_Field_Reset; - -- unspecified - Reserved_5_7 : nrf51.UInt3 := 16#0#; - -- Enable interrupt on ENDTX event. - ENDTX : INTENSET_ENDTX_Field_1 := Intenset_Endtx_Field_Reset; - -- unspecified - Reserved_9_18 : nrf51.UInt10 := 16#0#; - -- Enable interrupt on STARTED event. - STARTED : INTENSET_STARTED_Field_1 := - Intenset_Started_Field_Reset; - -- unspecified - Reserved_20_31 : nrf51.UInt12 := 16#0#; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for INTENSET_Register use record - Reserved_0_0 at 0 range 0 .. 0; - STOPPED at 0 range 1 .. 1; - Reserved_2_3 at 0 range 2 .. 3; - ENDRX at 0 range 4 .. 4; - Reserved_5_7 at 0 range 5 .. 7; - ENDTX at 0 range 8 .. 8; - Reserved_9_18 at 0 range 9 .. 18; - STARTED at 0 range 19 .. 19; - Reserved_20_31 at 0 range 20 .. 31; - end record; - - -- Disable interrupt on STOPPED event. - type INTENCLR_STOPPED_Field is - (-- Interrupt disabled. - Disabled, - -- Interrupt enabled. - Enabled) - with Size => 1; - for INTENCLR_STOPPED_Field use - (Disabled => 0, - Enabled => 1); - - -- Disable interrupt on STOPPED event. - type INTENCLR_STOPPED_Field_1 is - (-- Reset value for the field - Intenclr_Stopped_Field_Reset, - -- Disable interrupt on write. - Clear) - with Size => 1; - for INTENCLR_STOPPED_Field_1 use - (Intenclr_Stopped_Field_Reset => 0, - Clear => 1); - - -- Disable interrupt on ENDRX event. - type INTENCLR_ENDRX_Field is - (-- Interrupt disabled. - Disabled, - -- Interrupt enabled. - Enabled) - with Size => 1; - for INTENCLR_ENDRX_Field use - (Disabled => 0, - Enabled => 1); - - -- Disable interrupt on ENDRX event. - type INTENCLR_ENDRX_Field_1 is - (-- Reset value for the field - Intenclr_Endrx_Field_Reset, - -- Disable interrupt on write. - Clear) - with Size => 1; - for INTENCLR_ENDRX_Field_1 use - (Intenclr_Endrx_Field_Reset => 0, - Clear => 1); - - -- Disable interrupt on ENDTX event. - type INTENCLR_ENDTX_Field is - (-- Interrupt disabled. - Disabled, - -- Interrupt enabled. - Enabled) - with Size => 1; - for INTENCLR_ENDTX_Field use - (Disabled => 0, - Enabled => 1); - - -- Disable interrupt on ENDTX event. - type INTENCLR_ENDTX_Field_1 is - (-- Reset value for the field - Intenclr_Endtx_Field_Reset, - -- Disable interrupt on write. - Clear) - with Size => 1; - for INTENCLR_ENDTX_Field_1 use - (Intenclr_Endtx_Field_Reset => 0, - Clear => 1); - - -- Disable interrupt on STARTED event. - type INTENCLR_STARTED_Field is - (-- Interrupt disabled. - Disabled, - -- Interrupt enabled. - Enabled) - with Size => 1; - for INTENCLR_STARTED_Field use - (Disabled => 0, - Enabled => 1); - - -- Disable interrupt on STARTED event. - type INTENCLR_STARTED_Field_1 is - (-- Reset value for the field - Intenclr_Started_Field_Reset, - -- Disable interrupt on write. - Clear) - with Size => 1; - for INTENCLR_STARTED_Field_1 use - (Intenclr_Started_Field_Reset => 0, - Clear => 1); - - -- Interrupt enable clear register. - type INTENCLR_Register is record - -- unspecified - Reserved_0_0 : nrf51.Bit := 16#0#; - -- Disable interrupt on STOPPED event. - STOPPED : INTENCLR_STOPPED_Field_1 := - Intenclr_Stopped_Field_Reset; - -- unspecified - Reserved_2_3 : nrf51.UInt2 := 16#0#; - -- Disable interrupt on ENDRX event. - ENDRX : INTENCLR_ENDRX_Field_1 := Intenclr_Endrx_Field_Reset; - -- unspecified - Reserved_5_7 : nrf51.UInt3 := 16#0#; - -- Disable interrupt on ENDTX event. - ENDTX : INTENCLR_ENDTX_Field_1 := Intenclr_Endtx_Field_Reset; - -- unspecified - Reserved_9_18 : nrf51.UInt10 := 16#0#; - -- Disable interrupt on STARTED event. - STARTED : INTENCLR_STARTED_Field_1 := - Intenclr_Started_Field_Reset; - -- unspecified - Reserved_20_31 : nrf51.UInt12 := 16#0#; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for INTENCLR_Register use record - Reserved_0_0 at 0 range 0 .. 0; - STOPPED at 0 range 1 .. 1; - Reserved_2_3 at 0 range 2 .. 3; - ENDRX at 0 range 4 .. 4; - Reserved_5_7 at 0 range 5 .. 7; - ENDTX at 0 range 8 .. 8; - Reserved_9_18 at 0 range 9 .. 18; - STARTED at 0 range 19 .. 19; - Reserved_20_31 at 0 range 20 .. 31; - end record; - - -- Enable or disable SPIM. - type ENABLE_ENABLE_Field is - (-- Disabled SPIM. - Disabled, - -- Enable SPIM. - Enabled) - with Size => 4; - for ENABLE_ENABLE_Field use - (Disabled => 0, - Enabled => 7); - - -- Enable SPIM. - type ENABLE_Register is record - -- Enable or disable SPIM. - ENABLE : ENABLE_ENABLE_Field := nrf51.SPIM.Disabled; - -- unspecified - Reserved_4_31 : nrf51.UInt28 := 16#0#; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for ENABLE_Register use record - ENABLE at 0 range 0 .. 3; - Reserved_4_31 at 0 range 4 .. 31; - end record; - - ----------------------------------- - -- SPIM_PSEL cluster's Registers -- - ----------------------------------- - - -- Pin select configuration. - type SPIM_PSEL_Cluster is record - -- Pin select for SCK. - SCK : aliased nrf51.UInt32; - -- Pin select for MOSI. - MOSI : aliased nrf51.UInt32; - -- Pin select for MISO. - MISO : aliased nrf51.UInt32; - end record - with Size => 96; - - for SPIM_PSEL_Cluster use record - SCK at 16#0# range 0 .. 31; - MOSI at 16#4# range 0 .. 31; - MISO at 16#8# range 0 .. 31; - end record; - - ---------------------------------- - -- SPIM_RXD cluster's Registers -- - ---------------------------------- - - subtype MAXCNT_RXD_MAXCNT_Field is nrf51.Byte; - - -- Maximum number of buffer bytes to receive. - type MAXCNT_RXD_Register is record - -- Maximum number of buffer bytes to receive. - MAXCNT : MAXCNT_RXD_MAXCNT_Field := 16#0#; - -- unspecified - Reserved_8_31 : nrf51.UInt24 := 16#0#; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for MAXCNT_RXD_Register use record - MAXCNT at 0 range 0 .. 7; - Reserved_8_31 at 0 range 8 .. 31; - end record; - - subtype AMOUNT_RXD_AMOUNT_Field is nrf51.Byte; - - -- Number of bytes received in the last transaction. - type AMOUNT_RXD_Register is record - -- Read-only. Number of bytes received in the last transaction. - AMOUNT : AMOUNT_RXD_AMOUNT_Field; - -- unspecified - Reserved_8_31 : nrf51.UInt24; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for AMOUNT_RXD_Register use record - AMOUNT at 0 range 0 .. 7; - Reserved_8_31 at 0 range 8 .. 31; - end record; - - -- RXD EasyDMA configuration and status. - type SPIM_RXD_Cluster is record - -- Data pointer. - PTR : aliased nrf51.UInt32; - -- Maximum number of buffer bytes to receive. - MAXCNT : aliased MAXCNT_RXD_Register; - -- Number of bytes received in the last transaction. - AMOUNT : aliased AMOUNT_RXD_Register; - end record - with Size => 96; - - for SPIM_RXD_Cluster use record - PTR at 16#0# range 0 .. 31; - MAXCNT at 16#4# range 0 .. 31; - AMOUNT at 16#8# range 0 .. 31; - end record; - - ---------------------------------- - -- SPIM_TXD cluster's Registers -- - ---------------------------------- - - subtype MAXCNT_TXD_MAXCNT_Field is nrf51.Byte; - - -- Maximum number of buffer bytes to send. - type MAXCNT_TXD_Register is record - -- Maximum number of buffer bytes to send. - MAXCNT : MAXCNT_TXD_MAXCNT_Field := 16#0#; - -- unspecified - Reserved_8_31 : nrf51.UInt24 := 16#0#; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for MAXCNT_TXD_Register use record - MAXCNT at 0 range 0 .. 7; - Reserved_8_31 at 0 range 8 .. 31; - end record; - - subtype AMOUNT_TXD_AMOUNT_Field is nrf51.Byte; - - -- Number of bytes sent in the last transaction. - type AMOUNT_TXD_Register is record - -- Read-only. Number of bytes sent in the last transaction. - AMOUNT : AMOUNT_TXD_AMOUNT_Field; - -- unspecified - Reserved_8_31 : nrf51.UInt24; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for AMOUNT_TXD_Register use record - AMOUNT at 0 range 0 .. 7; - Reserved_8_31 at 0 range 8 .. 31; - end record; - - -- TXD EasyDMA configuration and status. - type SPIM_TXD_Cluster is record - -- Data pointer. - PTR : aliased nrf51.UInt32; - -- Maximum number of buffer bytes to send. - MAXCNT : aliased MAXCNT_TXD_Register; - -- Number of bytes sent in the last transaction. - AMOUNT : aliased AMOUNT_TXD_Register; - end record - with Size => 96; - - for SPIM_TXD_Cluster use record - PTR at 16#0# range 0 .. 31; - MAXCNT at 16#4# range 0 .. 31; - AMOUNT at 16#8# range 0 .. 31; - end record; - - -- Bit order. - type CONFIG_ORDER_Field is - (-- Most significant bit transmitted out first. - Msbfirst, - -- Least significant bit transmitted out first. - Lsbfirst) - with Size => 1; - for CONFIG_ORDER_Field use - (Msbfirst => 0, - Lsbfirst => 1); - - -- Serial clock (SCK) phase. - type CONFIG_CPHA_Field is - (-- Sample on leading edge of the clock. Shift serial data on trailing edge. - Leading, - -- Sample on trailing edge of the clock. Shift serial data on leading edge. - Trailing) - with Size => 1; - for CONFIG_CPHA_Field use - (Leading => 0, - Trailing => 1); - - -- Serial clock (SCK) polarity. - type CONFIG_CPOL_Field is - (-- Active high. - Activehigh, - -- Active low. - Activelow) - with Size => 1; - for CONFIG_CPOL_Field use - (Activehigh => 0, - Activelow => 1); - - -- Configuration register. - type CONFIG_Register is record - -- Bit order. - ORDER : CONFIG_ORDER_Field := nrf51.SPIM.Msbfirst; - -- Serial clock (SCK) phase. - CPHA : CONFIG_CPHA_Field := nrf51.SPIM.Leading; - -- Serial clock (SCK) polarity. - CPOL : CONFIG_CPOL_Field := nrf51.SPIM.Activehigh; - -- unspecified - Reserved_3_31 : nrf51.UInt29 := 16#0#; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for CONFIG_Register use record - ORDER at 0 range 0 .. 0; - CPHA at 0 range 1 .. 1; - CPOL at 0 range 2 .. 2; - Reserved_3_31 at 0 range 3 .. 31; - end record; - - subtype ORC_ORC_Field is nrf51.Byte; - - -- Over-read character. - type ORC_Register is record - -- Over-read character. - ORC : ORC_ORC_Field := 16#0#; - -- unspecified - Reserved_8_31 : nrf51.UInt24 := 16#0#; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for ORC_Register use record - ORC at 0 range 0 .. 7; - Reserved_8_31 at 0 range 8 .. 31; - end record; - - -- Peripheral power control. - type POWER_POWER_Field is - (-- Module power disabled. - Disabled, - -- Module power enabled. - Enabled) - with Size => 1; - for POWER_POWER_Field use - (Disabled => 0, - Enabled => 1); - - -- Peripheral power control. - type POWER_Register is record - -- Peripheral power control. - POWER : POWER_POWER_Field := nrf51.SPIM.Disabled; - -- unspecified - Reserved_1_31 : nrf51.UInt31 := 16#0#; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for POWER_Register use record - POWER at 0 range 0 .. 0; - Reserved_1_31 at 0 range 1 .. 31; - end record; - - ----------------- - -- Peripherals -- - ----------------- - - -- SPI master with easyDMA 1. - type SPIM_Peripheral is record - -- Start SPI transaction. - TASKS_START : aliased nrf51.UInt32; - -- Stop SPI transaction. - TASKS_STOP : aliased nrf51.UInt32; - -- Suspend SPI transaction. - TASKS_SUSPEND : aliased nrf51.UInt32; - -- Resume SPI transaction. - TASKS_RESUME : aliased nrf51.UInt32; - -- SPI transaction has stopped. - EVENTS_STOPPED : aliased nrf51.UInt32; - -- End of RXD buffer reached. - EVENTS_ENDRX : aliased nrf51.UInt32; - -- End of TXD buffer reached. - EVENTS_ENDTX : aliased nrf51.UInt32; - -- Transaction started. - EVENTS_STARTED : aliased nrf51.UInt32; - -- Interrupt enable set register. - INTENSET : aliased INTENSET_Register; - -- Interrupt enable clear register. - INTENCLR : aliased INTENCLR_Register; - -- Enable SPIM. - ENABLE : aliased ENABLE_Register; - -- Pin select configuration. - PSEL : aliased SPIM_PSEL_Cluster; - -- SPI frequency. - FREQUENCY : aliased nrf51.UInt32; - -- RXD EasyDMA configuration and status. - RXD : aliased SPIM_RXD_Cluster; - -- TXD EasyDMA configuration and status. - TXD : aliased SPIM_TXD_Cluster; - -- Configuration register. - CONFIG : aliased CONFIG_Register; - -- Over-read character. - ORC : aliased ORC_Register; - -- Peripheral power control. - POWER : aliased POWER_Register; - end record - with Volatile; - - for SPIM_Peripheral use record - TASKS_START at 16#10# range 0 .. 31; - TASKS_STOP at 16#14# range 0 .. 31; - TASKS_SUSPEND at 16#1C# range 0 .. 31; - TASKS_RESUME at 16#20# range 0 .. 31; - EVENTS_STOPPED at 16#104# range 0 .. 31; - EVENTS_ENDRX at 16#110# range 0 .. 31; - EVENTS_ENDTX at 16#120# range 0 .. 31; - EVENTS_STARTED at 16#14C# range 0 .. 31; - INTENSET at 16#304# range 0 .. 31; - INTENCLR at 16#308# range 0 .. 31; - ENABLE at 16#500# range 0 .. 31; - PSEL at 16#508# range 0 .. 95; - FREQUENCY at 16#524# range 0 .. 31; - RXD at 16#534# range 0 .. 95; - TXD at 16#544# range 0 .. 95; - CONFIG at 16#554# range 0 .. 31; - ORC at 16#5C0# range 0 .. 31; - POWER at 16#FFC# range 0 .. 31; - end record; - - -- SPI master with easyDMA 1. - SPIM1_Periph : aliased SPIM_Peripheral - with Import, Address => SPIM1_Base; - -end nrf51.SPIM; diff --git a/microbit/nrf51/nrf51-spis.ads b/microbit/nrf51/nrf51-spis.ads deleted file mode 100644 index a5459fb..0000000 --- a/microbit/nrf51/nrf51-spis.ads +++ /dev/null @@ -1,603 +0,0 @@ -pragma Ada_2012; -pragma Style_Checks (Off); - --- Copyright (c) 2013, Nordic Semiconductor ASA --- All rights reserved. --- --- Redistribution and use in source and binary forms, with or without --- modification, are permitted provided that the following conditions are met: --- --- * Redistributions of source code must retain the above copyright notice, this --- list of conditions and the following disclaimer. --- --- * Redistributions in binary form must reproduce the above copyright notice, --- this list of conditions and the following disclaimer in the documentation --- and/or other materials provided with the distribution. --- --- * Neither the name of Nordic Semiconductor ASA nor the names of its --- contributors may be used to endorse or promote products derived from --- this software without specific prior written permission. --- --- THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" --- AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE --- IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE --- DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE --- FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL --- DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR --- SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER --- CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, --- OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE --- OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. --- - --- This spec has been automatically generated from nrf51.svd - -pragma Restrictions (No_Elaboration_Code); - -with System; - -package nrf51.SPIS is - pragma Preelaborate; - - --------------- - -- Registers -- - --------------- - - -- Shortcut between END event and the ACQUIRE task. - type SHORTS_END_ACQUIRE_Field is - (-- Shortcut disabled. - Disabled, - -- Shortcut enabled. - Enabled) - with Size => 1; - for SHORTS_END_ACQUIRE_Field use - (Disabled => 0, - Enabled => 1); - - -- Shortcuts for SPIS. - type SHORTS_Register is record - -- unspecified - Reserved_0_1 : nrf51.UInt2 := 16#0#; - -- Shortcut between END event and the ACQUIRE task. - END_ACQUIRE : SHORTS_END_ACQUIRE_Field := nrf51.SPIS.Disabled; - -- unspecified - Reserved_3_31 : nrf51.UInt29 := 16#0#; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for SHORTS_Register use record - Reserved_0_1 at 0 range 0 .. 1; - END_ACQUIRE at 0 range 2 .. 2; - Reserved_3_31 at 0 range 3 .. 31; - end record; - - -- Enable interrupt on END event. - type INTENSET_END_Field is - (-- Interrupt disabled. - Disabled, - -- Interrupt enabled. - Enabled) - with Size => 1; - for INTENSET_END_Field use - (Disabled => 0, - Enabled => 1); - - -- Enable interrupt on END event. - type INTENSET_END_Field_1 is - (-- Reset value for the field - Intenset_End_Field_Reset, - -- Enable interrupt on write. - Set) - with Size => 1; - for INTENSET_END_Field_1 use - (Intenset_End_Field_Reset => 0, - Set => 1); - - -- Enable interrupt on ACQUIRED event. - type INTENSET_ACQUIRED_Field is - (-- Interrupt disabled. - Disabled, - -- Interrupt enabled. - Enabled) - with Size => 1; - for INTENSET_ACQUIRED_Field use - (Disabled => 0, - Enabled => 1); - - -- Enable interrupt on ACQUIRED event. - type INTENSET_ACQUIRED_Field_1 is - (-- Reset value for the field - Intenset_Acquired_Field_Reset, - -- Enable interrupt on write. - Set) - with Size => 1; - for INTENSET_ACQUIRED_Field_1 use - (Intenset_Acquired_Field_Reset => 0, - Set => 1); - - -- Interrupt enable set register. - type INTENSET_Register is record - -- unspecified - Reserved_0_0 : nrf51.Bit := 16#0#; - -- Enable interrupt on END event. - END_k : INTENSET_END_Field_1 := Intenset_End_Field_Reset; - -- unspecified - Reserved_2_9 : nrf51.Byte := 16#0#; - -- Enable interrupt on ACQUIRED event. - ACQUIRED : INTENSET_ACQUIRED_Field_1 := - Intenset_Acquired_Field_Reset; - -- unspecified - Reserved_11_31 : nrf51.UInt21 := 16#0#; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for INTENSET_Register use record - Reserved_0_0 at 0 range 0 .. 0; - END_k at 0 range 1 .. 1; - Reserved_2_9 at 0 range 2 .. 9; - ACQUIRED at 0 range 10 .. 10; - Reserved_11_31 at 0 range 11 .. 31; - end record; - - -- Disable interrupt on END event. - type INTENCLR_END_Field is - (-- Interrupt disabled. - Disabled, - -- Interrupt enabled. - Enabled) - with Size => 1; - for INTENCLR_END_Field use - (Disabled => 0, - Enabled => 1); - - -- Disable interrupt on END event. - type INTENCLR_END_Field_1 is - (-- Reset value for the field - Intenclr_End_Field_Reset, - -- Disable interrupt on write. - Clear) - with Size => 1; - for INTENCLR_END_Field_1 use - (Intenclr_End_Field_Reset => 0, - Clear => 1); - - -- Disable interrupt on ACQUIRED event. - type INTENCLR_ACQUIRED_Field is - (-- Interrupt disabled. - Disabled, - -- Interrupt enabled. - Enabled) - with Size => 1; - for INTENCLR_ACQUIRED_Field use - (Disabled => 0, - Enabled => 1); - - -- Disable interrupt on ACQUIRED event. - type INTENCLR_ACQUIRED_Field_1 is - (-- Reset value for the field - Intenclr_Acquired_Field_Reset, - -- Disable interrupt on write. - Clear) - with Size => 1; - for INTENCLR_ACQUIRED_Field_1 use - (Intenclr_Acquired_Field_Reset => 0, - Clear => 1); - - -- Interrupt enable clear register. - type INTENCLR_Register is record - -- unspecified - Reserved_0_0 : nrf51.Bit := 16#0#; - -- Disable interrupt on END event. - END_k : INTENCLR_END_Field_1 := Intenclr_End_Field_Reset; - -- unspecified - Reserved_2_9 : nrf51.Byte := 16#0#; - -- Disable interrupt on ACQUIRED event. - ACQUIRED : INTENCLR_ACQUIRED_Field_1 := - Intenclr_Acquired_Field_Reset; - -- unspecified - Reserved_11_31 : nrf51.UInt21 := 16#0#; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for INTENCLR_Register use record - Reserved_0_0 at 0 range 0 .. 0; - END_k at 0 range 1 .. 1; - Reserved_2_9 at 0 range 2 .. 9; - ACQUIRED at 0 range 10 .. 10; - Reserved_11_31 at 0 range 11 .. 31; - end record; - - -- Semaphore status. - type SEMSTAT_SEMSTAT_Field is - (-- Semaphore is free. - Free, - -- Semaphore is assigned to the CPU. - Cpu, - -- Semaphore is assigned to the SPIS. - Spis, - -- Semaphore is assigned to the SPIS, but a handover to the CPU is pending. - Cpupending) - with Size => 2; - for SEMSTAT_SEMSTAT_Field use - (Free => 0, - Cpu => 1, - Spis => 2, - Cpupending => 3); - - -- Semaphore status. - type SEMSTAT_Register is record - -- Read-only. Semaphore status. - SEMSTAT : SEMSTAT_SEMSTAT_Field; - -- unspecified - Reserved_2_31 : nrf51.UInt30; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for SEMSTAT_Register use record - SEMSTAT at 0 range 0 .. 1; - Reserved_2_31 at 0 range 2 .. 31; - end record; - - -- TX buffer overread detected, and prevented. - type STATUS_OVERREAD_Field is - (-- Error not present. - Notpresent, - -- Error present. - Present) - with Size => 1; - for STATUS_OVERREAD_Field use - (Notpresent => 0, - Present => 1); - - -- TX buffer overread detected, and prevented. - type STATUS_OVERREAD_Field_1 is - (-- Reset value for the field - Status_Overread_Field_Reset, - -- Clear on write. - Clear) - with Size => 1; - for STATUS_OVERREAD_Field_1 use - (Status_Overread_Field_Reset => 0, - Clear => 1); - - -- RX buffer overflow detected, and prevented. - type STATUS_OVERFLOW_Field is - (-- Error not present. - Notpresent, - -- Error present. - Present) - with Size => 1; - for STATUS_OVERFLOW_Field use - (Notpresent => 0, - Present => 1); - - -- RX buffer overflow detected, and prevented. - type STATUS_OVERFLOW_Field_1 is - (-- Reset value for the field - Status_Overflow_Field_Reset, - -- Clear on write. - Clear) - with Size => 1; - for STATUS_OVERFLOW_Field_1 use - (Status_Overflow_Field_Reset => 0, - Clear => 1); - - -- Status from last transaction. - type STATUS_Register is record - -- TX buffer overread detected, and prevented. - OVERREAD : STATUS_OVERREAD_Field_1 := Status_Overread_Field_Reset; - -- RX buffer overflow detected, and prevented. - OVERFLOW : STATUS_OVERFLOW_Field_1 := Status_Overflow_Field_Reset; - -- unspecified - Reserved_2_31 : nrf51.UInt30 := 16#0#; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for STATUS_Register use record - OVERREAD at 0 range 0 .. 0; - OVERFLOW at 0 range 1 .. 1; - Reserved_2_31 at 0 range 2 .. 31; - end record; - - -- Enable or disable SPIS. - type ENABLE_ENABLE_Field is - (-- Disabled SPIS. - Disabled, - -- Enable SPIS. - Enabled) - with Size => 3; - for ENABLE_ENABLE_Field use - (Disabled => 0, - Enabled => 2); - - -- Enable SPIS. - type ENABLE_Register is record - -- Enable or disable SPIS. - ENABLE : ENABLE_ENABLE_Field := nrf51.SPIS.Disabled; - -- unspecified - Reserved_3_31 : nrf51.UInt29 := 16#0#; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for ENABLE_Register use record - ENABLE at 0 range 0 .. 2; - Reserved_3_31 at 0 range 3 .. 31; - end record; - - subtype MAXRX_MAXRX_Field is nrf51.Byte; - - -- Maximum number of bytes in the receive buffer. - type MAXRX_Register is record - -- Maximum number of bytes in the receive buffer. - MAXRX : MAXRX_MAXRX_Field := 16#0#; - -- unspecified - Reserved_8_31 : nrf51.UInt24 := 16#0#; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for MAXRX_Register use record - MAXRX at 0 range 0 .. 7; - Reserved_8_31 at 0 range 8 .. 31; - end record; - - subtype AMOUNTRX_AMOUNTRX_Field is nrf51.Byte; - - -- Number of bytes received in last granted transaction. - type AMOUNTRX_Register is record - -- Read-only. Number of bytes received in last granted transaction. - AMOUNTRX : AMOUNTRX_AMOUNTRX_Field; - -- unspecified - Reserved_8_31 : nrf51.UInt24; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for AMOUNTRX_Register use record - AMOUNTRX at 0 range 0 .. 7; - Reserved_8_31 at 0 range 8 .. 31; - end record; - - subtype MAXTX_MAXTX_Field is nrf51.Byte; - - -- Maximum number of bytes in the transmit buffer. - type MAXTX_Register is record - -- Maximum number of bytes in the transmit buffer. - MAXTX : MAXTX_MAXTX_Field := 16#0#; - -- unspecified - Reserved_8_31 : nrf51.UInt24 := 16#0#; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for MAXTX_Register use record - MAXTX at 0 range 0 .. 7; - Reserved_8_31 at 0 range 8 .. 31; - end record; - - subtype AMOUNTTX_AMOUNTTX_Field is nrf51.Byte; - - -- Number of bytes transmitted in last granted transaction. - type AMOUNTTX_Register is record - -- Read-only. Number of bytes transmitted in last granted transaction. - AMOUNTTX : AMOUNTTX_AMOUNTTX_Field; - -- unspecified - Reserved_8_31 : nrf51.UInt24; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for AMOUNTTX_Register use record - AMOUNTTX at 0 range 0 .. 7; - Reserved_8_31 at 0 range 8 .. 31; - end record; - - -- Bit order. - type CONFIG_ORDER_Field is - (-- Most significant bit transmitted out first. - Msbfirst, - -- Least significant bit transmitted out first. - Lsbfirst) - with Size => 1; - for CONFIG_ORDER_Field use - (Msbfirst => 0, - Lsbfirst => 1); - - -- Serial clock (SCK) phase. - type CONFIG_CPHA_Field is - (-- Sample on leading edge of the clock. Shift serial data on trailing edge. - Leading, - -- Sample on trailing edge of the clock. Shift serial data on leading edge. - Trailing) - with Size => 1; - for CONFIG_CPHA_Field use - (Leading => 0, - Trailing => 1); - - -- Serial clock (SCK) polarity. - type CONFIG_CPOL_Field is - (-- Active high. - Activehigh, - -- Active low. - Activelow) - with Size => 1; - for CONFIG_CPOL_Field use - (Activehigh => 0, - Activelow => 1); - - -- Configuration register. - type CONFIG_Register is record - -- Bit order. - ORDER : CONFIG_ORDER_Field := nrf51.SPIS.Msbfirst; - -- Serial clock (SCK) phase. - CPHA : CONFIG_CPHA_Field := nrf51.SPIS.Leading; - -- Serial clock (SCK) polarity. - CPOL : CONFIG_CPOL_Field := nrf51.SPIS.Activehigh; - -- unspecified - Reserved_3_31 : nrf51.UInt29 := 16#0#; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for CONFIG_Register use record - ORDER at 0 range 0 .. 0; - CPHA at 0 range 1 .. 1; - CPOL at 0 range 2 .. 2; - Reserved_3_31 at 0 range 3 .. 31; - end record; - - subtype DEF_DEF_Field is nrf51.Byte; - - -- Default character. - type DEF_Register is record - -- Default character. - DEF : DEF_DEF_Field := 16#0#; - -- unspecified - Reserved_8_31 : nrf51.UInt24 := 16#0#; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for DEF_Register use record - DEF at 0 range 0 .. 7; - Reserved_8_31 at 0 range 8 .. 31; - end record; - - subtype ORC_ORC_Field is nrf51.Byte; - - -- Over-read character. - type ORC_Register is record - -- Over-read character. - ORC : ORC_ORC_Field := 16#0#; - -- unspecified - Reserved_8_31 : nrf51.UInt24 := 16#0#; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for ORC_Register use record - ORC at 0 range 0 .. 7; - Reserved_8_31 at 0 range 8 .. 31; - end record; - - -- Peripheral power control. - type POWER_POWER_Field is - (-- Module power disabled. - Disabled, - -- Module power enabled. - Enabled) - with Size => 1; - for POWER_POWER_Field use - (Disabled => 0, - Enabled => 1); - - -- Peripheral power control. - type POWER_Register is record - -- Peripheral power control. - POWER : POWER_POWER_Field := nrf51.SPIS.Disabled; - -- unspecified - Reserved_1_31 : nrf51.UInt31 := 16#0#; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for POWER_Register use record - POWER at 0 range 0 .. 0; - Reserved_1_31 at 0 range 1 .. 31; - end record; - - ----------------- - -- Peripherals -- - ----------------- - - -- SPI slave 1. - type SPIS_Peripheral is record - -- Acquire SPI semaphore. - TASKS_ACQUIRE : aliased nrf51.UInt32; - -- Release SPI semaphore. - TASKS_RELEASE : aliased nrf51.UInt32; - -- Granted transaction completed. - EVENTS_END : aliased nrf51.UInt32; - -- Semaphore acquired. - EVENTS_ACQUIRED : aliased nrf51.UInt32; - -- Shortcuts for SPIS. - SHORTS : aliased SHORTS_Register; - -- Interrupt enable set register. - INTENSET : aliased INTENSET_Register; - -- Interrupt enable clear register. - INTENCLR : aliased INTENCLR_Register; - -- Semaphore status. - SEMSTAT : aliased SEMSTAT_Register; - -- Status from last transaction. - STATUS : aliased STATUS_Register; - -- Enable SPIS. - ENABLE : aliased ENABLE_Register; - -- Pin select for SCK. - PSELSCK : aliased nrf51.UInt32; - -- Pin select for MISO. - PSELMISO : aliased nrf51.UInt32; - -- Pin select for MOSI. - PSELMOSI : aliased nrf51.UInt32; - -- Pin select for CSN. - PSELCSN : aliased nrf51.UInt32; - -- RX data pointer. - RXDPTR : aliased nrf51.UInt32; - -- Maximum number of bytes in the receive buffer. - MAXRX : aliased MAXRX_Register; - -- Number of bytes received in last granted transaction. - AMOUNTRX : aliased AMOUNTRX_Register; - -- TX data pointer. - TXDPTR : aliased nrf51.UInt32; - -- Maximum number of bytes in the transmit buffer. - MAXTX : aliased MAXTX_Register; - -- Number of bytes transmitted in last granted transaction. - AMOUNTTX : aliased AMOUNTTX_Register; - -- Configuration register. - CONFIG : aliased CONFIG_Register; - -- Default character. - DEF : aliased DEF_Register; - -- Over-read character. - ORC : aliased ORC_Register; - -- Peripheral power control. - POWER : aliased POWER_Register; - end record - with Volatile; - - for SPIS_Peripheral use record - TASKS_ACQUIRE at 16#24# range 0 .. 31; - TASKS_RELEASE at 16#28# range 0 .. 31; - EVENTS_END at 16#104# range 0 .. 31; - EVENTS_ACQUIRED at 16#128# range 0 .. 31; - SHORTS at 16#200# range 0 .. 31; - INTENSET at 16#304# range 0 .. 31; - INTENCLR at 16#308# range 0 .. 31; - SEMSTAT at 16#400# range 0 .. 31; - STATUS at 16#440# range 0 .. 31; - ENABLE at 16#500# range 0 .. 31; - PSELSCK at 16#508# range 0 .. 31; - PSELMISO at 16#50C# range 0 .. 31; - PSELMOSI at 16#510# range 0 .. 31; - PSELCSN at 16#514# range 0 .. 31; - RXDPTR at 16#534# range 0 .. 31; - MAXRX at 16#538# range 0 .. 31; - AMOUNTRX at 16#53C# range 0 .. 31; - TXDPTR at 16#544# range 0 .. 31; - MAXTX at 16#548# range 0 .. 31; - AMOUNTTX at 16#54C# range 0 .. 31; - CONFIG at 16#554# range 0 .. 31; - DEF at 16#55C# range 0 .. 31; - ORC at 16#5C0# range 0 .. 31; - POWER at 16#FFC# range 0 .. 31; - end record; - - -- SPI slave 1. - SPIS1_Periph : aliased SPIS_Peripheral - with Import, Address => SPIS1_Base; - -end nrf51.SPIS; diff --git a/microbit/nrf51/nrf51-swi.ads b/microbit/nrf51/nrf51-swi.ads deleted file mode 100644 index 4a0b733..0000000 --- a/microbit/nrf51/nrf51-swi.ads +++ /dev/null @@ -1,65 +0,0 @@ -pragma Ada_2012; -pragma Style_Checks (Off); - --- Copyright (c) 2013, Nordic Semiconductor ASA --- All rights reserved. --- --- Redistribution and use in source and binary forms, with or without --- modification, are permitted provided that the following conditions are met: --- --- * Redistributions of source code must retain the above copyright notice, this --- list of conditions and the following disclaimer. --- --- * Redistributions in binary form must reproduce the above copyright notice, --- this list of conditions and the following disclaimer in the documentation --- and/or other materials provided with the distribution. --- --- * Neither the name of Nordic Semiconductor ASA nor the names of its --- contributors may be used to endorse or promote products derived from --- this software without specific prior written permission. --- --- THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" --- AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE --- IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE --- DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE --- FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL --- DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR --- SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER --- CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, --- OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE --- OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. --- - --- This spec has been automatically generated from nrf51.svd - -pragma Restrictions (No_Elaboration_Code); - -with System; - -package nrf51.SWI is - pragma Preelaborate; - - --------------- - -- Registers -- - --------------- - - ----------------- - -- Peripherals -- - ----------------- - - -- SW Interrupts. - type SWI_Peripheral is record - -- Unused. - UNUSED : aliased nrf51.UInt32; - end record - with Volatile; - - for SWI_Peripheral use record - UNUSED at 0 range 0 .. 31; - end record; - - -- SW Interrupts. - SWI_Periph : aliased SWI_Peripheral - with Import, Address => SWI_Base; - -end nrf51.SWI; diff --git a/microbit/nrf51/nrf51-temp.ads b/microbit/nrf51/nrf51-temp.ads deleted file mode 100644 index 59e178c..0000000 --- a/microbit/nrf51/nrf51-temp.ads +++ /dev/null @@ -1,185 +0,0 @@ -pragma Ada_2012; -pragma Style_Checks (Off); - --- Copyright (c) 2013, Nordic Semiconductor ASA --- All rights reserved. --- --- Redistribution and use in source and binary forms, with or without --- modification, are permitted provided that the following conditions are met: --- --- * Redistributions of source code must retain the above copyright notice, this --- list of conditions and the following disclaimer. --- --- * Redistributions in binary form must reproduce the above copyright notice, --- this list of conditions and the following disclaimer in the documentation --- and/or other materials provided with the distribution. --- --- * Neither the name of Nordic Semiconductor ASA nor the names of its --- contributors may be used to endorse or promote products derived from --- this software without specific prior written permission. --- --- THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" --- AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE --- IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE --- DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE --- FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL --- DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR --- SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER --- CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, --- OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE --- OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. --- - --- This spec has been automatically generated from nrf51.svd - -pragma Restrictions (No_Elaboration_Code); - -with System; - -package nrf51.TEMP is - pragma Preelaborate; - - --------------- - -- Registers -- - --------------- - - -- Enable interrupt on DATARDY event. - type INTENSET_DATARDY_Field is - (-- Interrupt disabled. - Disabled, - -- Interrupt enabled. - Enabled) - with Size => 1; - for INTENSET_DATARDY_Field use - (Disabled => 0, - Enabled => 1); - - -- Enable interrupt on DATARDY event. - type INTENSET_DATARDY_Field_1 is - (-- Reset value for the field - Intenset_Datardy_Field_Reset, - -- Enable interrupt on write. - Set) - with Size => 1; - for INTENSET_DATARDY_Field_1 use - (Intenset_Datardy_Field_Reset => 0, - Set => 1); - - -- Interrupt enable set register. - type INTENSET_Register is record - -- Enable interrupt on DATARDY event. - DATARDY : INTENSET_DATARDY_Field_1 := - Intenset_Datardy_Field_Reset; - -- unspecified - Reserved_1_31 : nrf51.UInt31 := 16#0#; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for INTENSET_Register use record - DATARDY at 0 range 0 .. 0; - Reserved_1_31 at 0 range 1 .. 31; - end record; - - -- Disable interrupt on DATARDY event. - type INTENCLR_DATARDY_Field is - (-- Interrupt disabled. - Disabled, - -- Interrupt enabled. - Enabled) - with Size => 1; - for INTENCLR_DATARDY_Field use - (Disabled => 0, - Enabled => 1); - - -- Disable interrupt on DATARDY event. - type INTENCLR_DATARDY_Field_1 is - (-- Reset value for the field - Intenclr_Datardy_Field_Reset, - -- Disable interrupt on write. - Clear) - with Size => 1; - for INTENCLR_DATARDY_Field_1 use - (Intenclr_Datardy_Field_Reset => 0, - Clear => 1); - - -- Interrupt enable clear register. - type INTENCLR_Register is record - -- Disable interrupt on DATARDY event. - DATARDY : INTENCLR_DATARDY_Field_1 := - Intenclr_Datardy_Field_Reset; - -- unspecified - Reserved_1_31 : nrf51.UInt31 := 16#0#; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for INTENCLR_Register use record - DATARDY at 0 range 0 .. 0; - Reserved_1_31 at 0 range 1 .. 31; - end record; - - -- Peripheral power control. - type POWER_POWER_Field is - (-- Module power disabled. - Disabled, - -- Module power enabled. - Enabled) - with Size => 1; - for POWER_POWER_Field use - (Disabled => 0, - Enabled => 1); - - -- Peripheral power control. - type POWER_Register is record - -- Peripheral power control. - POWER : POWER_POWER_Field := nrf51.TEMP.Disabled; - -- unspecified - Reserved_1_31 : nrf51.UInt31 := 16#0#; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for POWER_Register use record - POWER at 0 range 0 .. 0; - Reserved_1_31 at 0 range 1 .. 31; - end record; - - ----------------- - -- Peripherals -- - ----------------- - - -- Temperature Sensor. - type TEMP_Peripheral is record - -- Start temperature measurement. - TASKS_START : aliased nrf51.UInt32; - -- Stop temperature measurement. - TASKS_STOP : aliased nrf51.UInt32; - -- Temperature measurement complete, data ready event. - EVENTS_DATARDY : aliased nrf51.UInt32; - -- Interrupt enable set register. - INTENSET : aliased INTENSET_Register; - -- Interrupt enable clear register. - INTENCLR : aliased INTENCLR_Register; - -- Die temperature in degC, 2's complement format, 0.25 degC pecision. - TEMP : aliased nrf51.UInt32; - -- Peripheral power control. - POWER : aliased POWER_Register; - end record - with Volatile; - - for TEMP_Peripheral use record - TASKS_START at 16#0# range 0 .. 31; - TASKS_STOP at 16#4# range 0 .. 31; - EVENTS_DATARDY at 16#100# range 0 .. 31; - INTENSET at 16#304# range 0 .. 31; - INTENCLR at 16#308# range 0 .. 31; - TEMP at 16#508# range 0 .. 31; - POWER at 16#FFC# range 0 .. 31; - end record; - - -- Temperature Sensor. - TEMP_Periph : aliased TEMP_Peripheral - with Import, Address => TEMP_Base; - -end nrf51.TEMP; diff --git a/microbit/nrf51/nrf51-timer.ads b/microbit/nrf51/nrf51-timer.ads deleted file mode 100644 index a95ae69..0000000 --- a/microbit/nrf51/nrf51-timer.ads +++ /dev/null @@ -1,494 +0,0 @@ -pragma Ada_2012; -pragma Style_Checks (Off); - --- Copyright (c) 2013, Nordic Semiconductor ASA --- All rights reserved. --- --- Redistribution and use in source and binary forms, with or without --- modification, are permitted provided that the following conditions are met: --- --- * Redistributions of source code must retain the above copyright notice, this --- list of conditions and the following disclaimer. --- --- * Redistributions in binary form must reproduce the above copyright notice, --- this list of conditions and the following disclaimer in the documentation --- and/or other materials provided with the distribution. --- --- * Neither the name of Nordic Semiconductor ASA nor the names of its --- contributors may be used to endorse or promote products derived from --- this software without specific prior written permission. --- --- THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" --- AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE --- IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE --- DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE --- FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL --- DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR --- SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER --- CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, --- OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE --- OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. --- - --- This spec has been automatically generated from nrf51.svd - -pragma Restrictions (No_Elaboration_Code); - -with System; - -package nrf51.TIMER is - pragma Preelaborate; - - --------------- - -- Registers -- - --------------- - - -- Capture Timer value to CC[n] registers. - - -- Capture Timer value to CC[n] registers. - type TASKS_CAPTURE_Registers is array (0 .. 3) of nrf51.UInt32; - - -- Compare event on CC[n] match. - - -- Compare event on CC[n] match. - type EVENTS_COMPARE_Registers is array (0 .. 3) of nrf51.UInt32; - - -- Shortcut between CC[0] event and the CLEAR task. - type SHORTS_COMPARE0_CLEAR_Field is - (-- Shortcut disabled. - Disabled, - -- Shortcut enabled. - Enabled) - with Size => 1; - for SHORTS_COMPARE0_CLEAR_Field use - (Disabled => 0, - Enabled => 1); - - -- Shortcut between CC[1] event and the CLEAR task. - type SHORTS_COMPARE1_CLEAR_Field is - (-- Shortcut disabled. - Disabled, - -- Shortcut enabled. - Enabled) - with Size => 1; - for SHORTS_COMPARE1_CLEAR_Field use - (Disabled => 0, - Enabled => 1); - - -- Shortcut between CC[2] event and the CLEAR task. - type SHORTS_COMPARE2_CLEAR_Field is - (-- Shortcut disabled. - Disabled, - -- Shortcut enabled. - Enabled) - with Size => 1; - for SHORTS_COMPARE2_CLEAR_Field use - (Disabled => 0, - Enabled => 1); - - -- Shortcut between CC[3] event and the CLEAR task. - type SHORTS_COMPARE3_CLEAR_Field is - (-- Shortcut disabled. - Disabled, - -- Shortcut enabled. - Enabled) - with Size => 1; - for SHORTS_COMPARE3_CLEAR_Field use - (Disabled => 0, - Enabled => 1); - - -- Shortcut between CC[0] event and the STOP task. - type SHORTS_COMPARE0_STOP_Field is - (-- Shortcut disabled. - Disabled, - -- Shortcut enabled. - Enabled) - with Size => 1; - for SHORTS_COMPARE0_STOP_Field use - (Disabled => 0, - Enabled => 1); - - -- Shortcut between CC[1] event and the STOP task. - type SHORTS_COMPARE1_STOP_Field is - (-- Shortcut disabled. - Disabled, - -- Shortcut enabled. - Enabled) - with Size => 1; - for SHORTS_COMPARE1_STOP_Field use - (Disabled => 0, - Enabled => 1); - - -- Shortcut between CC[2] event and the STOP task. - type SHORTS_COMPARE2_STOP_Field is - (-- Shortcut disabled. - Disabled, - -- Shortcut enabled. - Enabled) - with Size => 1; - for SHORTS_COMPARE2_STOP_Field use - (Disabled => 0, - Enabled => 1); - - -- Shortcut between CC[3] event and the STOP task. - type SHORTS_COMPARE3_STOP_Field is - (-- Shortcut disabled. - Disabled, - -- Shortcut enabled. - Enabled) - with Size => 1; - for SHORTS_COMPARE3_STOP_Field use - (Disabled => 0, - Enabled => 1); - - -- Shortcuts for Timer. - type SHORTS_Register is record - -- Shortcut between CC[0] event and the CLEAR task. - COMPARE0_CLEAR : SHORTS_COMPARE0_CLEAR_Field := nrf51.TIMER.Disabled; - -- Shortcut between CC[1] event and the CLEAR task. - COMPARE1_CLEAR : SHORTS_COMPARE1_CLEAR_Field := nrf51.TIMER.Disabled; - -- Shortcut between CC[2] event and the CLEAR task. - COMPARE2_CLEAR : SHORTS_COMPARE2_CLEAR_Field := nrf51.TIMER.Disabled; - -- Shortcut between CC[3] event and the CLEAR task. - COMPARE3_CLEAR : SHORTS_COMPARE3_CLEAR_Field := nrf51.TIMER.Disabled; - -- unspecified - Reserved_4_7 : nrf51.UInt4 := 16#0#; - -- Shortcut between CC[0] event and the STOP task. - COMPARE0_STOP : SHORTS_COMPARE0_STOP_Field := nrf51.TIMER.Disabled; - -- Shortcut between CC[1] event and the STOP task. - COMPARE1_STOP : SHORTS_COMPARE1_STOP_Field := nrf51.TIMER.Disabled; - -- Shortcut between CC[2] event and the STOP task. - COMPARE2_STOP : SHORTS_COMPARE2_STOP_Field := nrf51.TIMER.Disabled; - -- Shortcut between CC[3] event and the STOP task. - COMPARE3_STOP : SHORTS_COMPARE3_STOP_Field := nrf51.TIMER.Disabled; - -- unspecified - Reserved_12_31 : nrf51.UInt20 := 16#0#; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for SHORTS_Register use record - COMPARE0_CLEAR at 0 range 0 .. 0; - COMPARE1_CLEAR at 0 range 1 .. 1; - COMPARE2_CLEAR at 0 range 2 .. 2; - COMPARE3_CLEAR at 0 range 3 .. 3; - Reserved_4_7 at 0 range 4 .. 7; - COMPARE0_STOP at 0 range 8 .. 8; - COMPARE1_STOP at 0 range 9 .. 9; - COMPARE2_STOP at 0 range 10 .. 10; - COMPARE3_STOP at 0 range 11 .. 11; - Reserved_12_31 at 0 range 12 .. 31; - end record; - - -- Enable interrupt on COMPARE[0] - type INTENSET_COMPARE0_Field is - (-- Interrupt disabled. - Disabled, - -- Interrupt enabled. - Enabled) - with Size => 1; - for INTENSET_COMPARE0_Field use - (Disabled => 0, - Enabled => 1); - - -- Enable interrupt on COMPARE[0] - type INTENSET_COMPARE0_Field_1 is - (-- Reset value for the field - Intenset_Compare0_Field_Reset, - -- Enable interrupt on write. - Set) - with Size => 1; - for INTENSET_COMPARE0_Field_1 use - (Intenset_Compare0_Field_Reset => 0, - Set => 1); - - -- INTENSET_COMPARE array - type INTENSET_COMPARE_Field_Array is array (0 .. 3) - of INTENSET_COMPARE0_Field_1 - with Component_Size => 1, Size => 4; - - -- Type definition for INTENSET_COMPARE - type INTENSET_COMPARE_Field - (As_Array : Boolean := False) - is record - case As_Array is - when False => - -- COMPARE as a value - Val : nrf51.UInt4; - when True => - -- COMPARE as an array - Arr : INTENSET_COMPARE_Field_Array; - end case; - end record - with Unchecked_Union, Size => 4; - - for INTENSET_COMPARE_Field use record - Val at 0 range 0 .. 3; - Arr at 0 range 0 .. 3; - end record; - - -- Interrupt enable set register. - type INTENSET_Register is record - -- unspecified - Reserved_0_15 : nrf51.UInt16 := 16#0#; - -- Enable interrupt on COMPARE[0] - COMPARE : INTENSET_COMPARE_Field := - (As_Array => False, Val => 16#0#); - -- unspecified - Reserved_20_31 : nrf51.UInt12 := 16#0#; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for INTENSET_Register use record - Reserved_0_15 at 0 range 0 .. 15; - COMPARE at 0 range 16 .. 19; - Reserved_20_31 at 0 range 20 .. 31; - end record; - - -- Disable interrupt on COMPARE[0] - type INTENCLR_COMPARE0_Field is - (-- Interrupt disabled. - Disabled, - -- Interrupt enabled. - Enabled) - with Size => 1; - for INTENCLR_COMPARE0_Field use - (Disabled => 0, - Enabled => 1); - - -- Disable interrupt on COMPARE[0] - type INTENCLR_COMPARE0_Field_1 is - (-- Reset value for the field - Intenclr_Compare0_Field_Reset, - -- Disable interrupt on write. - Clear) - with Size => 1; - for INTENCLR_COMPARE0_Field_1 use - (Intenclr_Compare0_Field_Reset => 0, - Clear => 1); - - -- INTENCLR_COMPARE array - type INTENCLR_COMPARE_Field_Array is array (0 .. 3) - of INTENCLR_COMPARE0_Field_1 - with Component_Size => 1, Size => 4; - - -- Type definition for INTENCLR_COMPARE - type INTENCLR_COMPARE_Field - (As_Array : Boolean := False) - is record - case As_Array is - when False => - -- COMPARE as a value - Val : nrf51.UInt4; - when True => - -- COMPARE as an array - Arr : INTENCLR_COMPARE_Field_Array; - end case; - end record - with Unchecked_Union, Size => 4; - - for INTENCLR_COMPARE_Field use record - Val at 0 range 0 .. 3; - Arr at 0 range 0 .. 3; - end record; - - -- Interrupt enable clear register. - type INTENCLR_Register is record - -- unspecified - Reserved_0_15 : nrf51.UInt16 := 16#0#; - -- Disable interrupt on COMPARE[0] - COMPARE : INTENCLR_COMPARE_Field := - (As_Array => False, Val => 16#0#); - -- unspecified - Reserved_20_31 : nrf51.UInt12 := 16#0#; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for INTENCLR_Register use record - Reserved_0_15 at 0 range 0 .. 15; - COMPARE at 0 range 16 .. 19; - Reserved_20_31 at 0 range 20 .. 31; - end record; - - -- Select Normal or Counter mode. - type MODE_MODE_Field is - (-- Timer in Normal mode. - Timer, - -- Timer in Counter mode. - Counter) - with Size => 1; - for MODE_MODE_Field use - (Timer => 0, - Counter => 1); - - -- Timer Mode selection. - type MODE_Register is record - -- Select Normal or Counter mode. - MODE : MODE_MODE_Field := nrf51.TIMER.Timer; - -- unspecified - Reserved_1_31 : nrf51.UInt31 := 16#0#; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for MODE_Register use record - MODE at 0 range 0 .. 0; - Reserved_1_31 at 0 range 1 .. 31; - end record; - - -- Sets timer behaviour ro be like the implementation of a timer with width - -- as indicated. - type BITMODE_BITMODE_Field is - (-- 16-bit timer behaviour. - Val_16Bit, - -- 8-bit timer behaviour. - Val_08Bit, - -- 24-bit timer behaviour. - Val_24Bit, - -- 32-bit timer behaviour. - Val_32Bit) - with Size => 2; - for BITMODE_BITMODE_Field use - (Val_16Bit => 0, - Val_08Bit => 1, - Val_24Bit => 2, - Val_32Bit => 3); - - -- Sets timer behaviour. - type BITMODE_Register is record - -- Sets timer behaviour ro be like the implementation of a timer with - -- width as indicated. - BITMODE : BITMODE_BITMODE_Field := nrf51.TIMER.Val_16Bit; - -- unspecified - Reserved_2_31 : nrf51.UInt30 := 16#0#; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for BITMODE_Register use record - BITMODE at 0 range 0 .. 1; - Reserved_2_31 at 0 range 2 .. 31; - end record; - - subtype PRESCALER_PRESCALER_Field is nrf51.UInt4; - - -- 4-bit prescaler to source clock frequency (max value 9). Source clock - -- frequency is divided by 2^SCALE. - type PRESCALER_Register is record - -- Timer PRESCALER value. Max value is 9. - PRESCALER : PRESCALER_PRESCALER_Field := 16#4#; - -- unspecified - Reserved_4_31 : nrf51.UInt28 := 16#0#; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for PRESCALER_Register use record - PRESCALER at 0 range 0 .. 3; - Reserved_4_31 at 0 range 4 .. 31; - end record; - - -- Capture/compare registers. - - -- Capture/compare registers. - type CC_Registers is array (0 .. 3) of nrf51.UInt32; - - -- Peripheral power control. - type POWER_POWER_Field is - (-- Module power disabled. - Disabled, - -- Module power enabled. - Enabled) - with Size => 1; - for POWER_POWER_Field use - (Disabled => 0, - Enabled => 1); - - -- Peripheral power control. - type POWER_Register is record - -- Peripheral power control. - POWER : POWER_POWER_Field := nrf51.TIMER.Disabled; - -- unspecified - Reserved_1_31 : nrf51.UInt31 := 16#0#; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for POWER_Register use record - POWER at 0 range 0 .. 0; - Reserved_1_31 at 0 range 1 .. 31; - end record; - - ----------------- - -- Peripherals -- - ----------------- - - -- Timer 0. - type TIMER_Peripheral is record - -- Start Timer. - TASKS_START : aliased nrf51.UInt32; - -- Stop Timer. - TASKS_STOP : aliased nrf51.UInt32; - -- Increment Timer (In counter mode). - TASKS_COUNT : aliased nrf51.UInt32; - -- Clear timer. - TASKS_CLEAR : aliased nrf51.UInt32; - -- Shutdown timer. - TASKS_SHUTDOWN : aliased nrf51.UInt32; - -- Capture Timer value to CC[n] registers. - TASKS_CAPTURE : aliased TASKS_CAPTURE_Registers; - -- Compare event on CC[n] match. - EVENTS_COMPARE : aliased EVENTS_COMPARE_Registers; - -- Shortcuts for Timer. - SHORTS : aliased SHORTS_Register; - -- Interrupt enable set register. - INTENSET : aliased INTENSET_Register; - -- Interrupt enable clear register. - INTENCLR : aliased INTENCLR_Register; - -- Timer Mode selection. - MODE : aliased MODE_Register; - -- Sets timer behaviour. - BITMODE : aliased BITMODE_Register; - -- 4-bit prescaler to source clock frequency (max value 9). Source clock - -- frequency is divided by 2^SCALE. - PRESCALER : aliased PRESCALER_Register; - -- Capture/compare registers. - CC : aliased CC_Registers; - -- Peripheral power control. - POWER : aliased POWER_Register; - end record - with Volatile; - - for TIMER_Peripheral use record - TASKS_START at 16#0# range 0 .. 31; - TASKS_STOP at 16#4# range 0 .. 31; - TASKS_COUNT at 16#8# range 0 .. 31; - TASKS_CLEAR at 16#C# range 0 .. 31; - TASKS_SHUTDOWN at 16#10# range 0 .. 31; - TASKS_CAPTURE at 16#40# range 0 .. 127; - EVENTS_COMPARE at 16#140# range 0 .. 127; - SHORTS at 16#200# range 0 .. 31; - INTENSET at 16#304# range 0 .. 31; - INTENCLR at 16#308# range 0 .. 31; - MODE at 16#504# range 0 .. 31; - BITMODE at 16#508# range 0 .. 31; - PRESCALER at 16#510# range 0 .. 31; - CC at 16#540# range 0 .. 127; - POWER at 16#FFC# range 0 .. 31; - end record; - - -- Timer 0. - TIMER0_Periph : aliased TIMER_Peripheral - with Import, Address => TIMER0_Base; - - -- Timer 1. - TIMER1_Periph : aliased TIMER_Peripheral - with Import, Address => TIMER1_Base; - - -- Timer 2. - TIMER2_Periph : aliased TIMER_Peripheral - with Import, Address => TIMER2_Base; - -end nrf51.TIMER; diff --git a/microbit/nrf51/nrf51-twi.ads b/microbit/nrf51/nrf51-twi.ads deleted file mode 100644 index 3701afb..0000000 --- a/microbit/nrf51/nrf51-twi.ads +++ /dev/null @@ -1,732 +0,0 @@ -pragma Ada_2012; -pragma Style_Checks (Off); - --- Copyright (c) 2013, Nordic Semiconductor ASA --- All rights reserved. --- --- Redistribution and use in source and binary forms, with or without --- modification, are permitted provided that the following conditions are met: --- --- * Redistributions of source code must retain the above copyright notice, this --- list of conditions and the following disclaimer. --- --- * Redistributions in binary form must reproduce the above copyright notice, --- this list of conditions and the following disclaimer in the documentation --- and/or other materials provided with the distribution. --- --- * Neither the name of Nordic Semiconductor ASA nor the names of its --- contributors may be used to endorse or promote products derived from --- this software without specific prior written permission. --- --- THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" --- AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE --- IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE --- DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE --- FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL --- DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR --- SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER --- CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, --- OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE --- OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. --- - --- This spec has been automatically generated from nrf51.svd - -pragma Restrictions (No_Elaboration_Code); - -with System; - -package nrf51.TWI is - pragma Preelaborate; - - --------------- - -- Registers -- - --------------- - - -- Shortcut between BB event and the SUSPEND task. - type SHORTS_BB_SUSPEND_Field is - (-- Shortcut disabled. - Disabled, - -- Shortcut enabled. - Enabled) - with Size => 1; - for SHORTS_BB_SUSPEND_Field use - (Disabled => 0, - Enabled => 1); - - -- Shortcut between BB event and the STOP task. - type SHORTS_BB_STOP_Field is - (-- Shortcut disabled. - Disabled, - -- Shortcut enabled. - Enabled) - with Size => 1; - for SHORTS_BB_STOP_Field use - (Disabled => 0, - Enabled => 1); - - -- Shortcuts for TWI. - type SHORTS_Register is record - -- Shortcut between BB event and the SUSPEND task. - BB_SUSPEND : SHORTS_BB_SUSPEND_Field := nrf51.TWI.Disabled; - -- Shortcut between BB event and the STOP task. - BB_STOP : SHORTS_BB_STOP_Field := nrf51.TWI.Disabled; - -- unspecified - Reserved_2_31 : nrf51.UInt30 := 16#0#; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for SHORTS_Register use record - BB_SUSPEND at 0 range 0 .. 0; - BB_STOP at 0 range 1 .. 1; - Reserved_2_31 at 0 range 2 .. 31; - end record; - - -- Enable interrupt on STOPPED event. - type INTENSET_STOPPED_Field is - (-- Interrupt disabled. - Disabled, - -- Interrupt enabled. - Enabled) - with Size => 1; - for INTENSET_STOPPED_Field use - (Disabled => 0, - Enabled => 1); - - -- Enable interrupt on STOPPED event. - type INTENSET_STOPPED_Field_1 is - (-- Reset value for the field - Intenset_Stopped_Field_Reset, - -- Enable interrupt on write. - Set) - with Size => 1; - for INTENSET_STOPPED_Field_1 use - (Intenset_Stopped_Field_Reset => 0, - Set => 1); - - -- Enable interrupt on READY event. - type INTENSET_RXDREADY_Field is - (-- Interrupt disabled. - Disabled, - -- Interrupt enabled. - Enabled) - with Size => 1; - for INTENSET_RXDREADY_Field use - (Disabled => 0, - Enabled => 1); - - -- Enable interrupt on READY event. - type INTENSET_RXDREADY_Field_1 is - (-- Reset value for the field - Intenset_Rxdready_Field_Reset, - -- Enable interrupt on write. - Set) - with Size => 1; - for INTENSET_RXDREADY_Field_1 use - (Intenset_Rxdready_Field_Reset => 0, - Set => 1); - - -- Enable interrupt on TXDSENT event. - type INTENSET_TXDSENT_Field is - (-- Interrupt disabled. - Disabled, - -- Interrupt enabled. - Enabled) - with Size => 1; - for INTENSET_TXDSENT_Field use - (Disabled => 0, - Enabled => 1); - - -- Enable interrupt on TXDSENT event. - type INTENSET_TXDSENT_Field_1 is - (-- Reset value for the field - Intenset_Txdsent_Field_Reset, - -- Enable interrupt on write. - Set) - with Size => 1; - for INTENSET_TXDSENT_Field_1 use - (Intenset_Txdsent_Field_Reset => 0, - Set => 1); - - -- Enable interrupt on ERROR event. - type INTENSET_ERROR_Field is - (-- Interrupt disabled. - Disabled, - -- Interrupt enabled. - Enabled) - with Size => 1; - for INTENSET_ERROR_Field use - (Disabled => 0, - Enabled => 1); - - -- Enable interrupt on ERROR event. - type INTENSET_ERROR_Field_1 is - (-- Reset value for the field - Intenset_Error_Field_Reset, - -- Enable interrupt on write. - Set) - with Size => 1; - for INTENSET_ERROR_Field_1 use - (Intenset_Error_Field_Reset => 0, - Set => 1); - - -- Enable interrupt on BB event. - type INTENSET_BB_Field is - (-- Interrupt disabled. - Disabled, - -- Interrupt enabled. - Enabled) - with Size => 1; - for INTENSET_BB_Field use - (Disabled => 0, - Enabled => 1); - - -- Enable interrupt on BB event. - type INTENSET_BB_Field_1 is - (-- Reset value for the field - Intenset_Bb_Field_Reset, - -- Enable interrupt on write. - Set) - with Size => 1; - for INTENSET_BB_Field_1 use - (Intenset_Bb_Field_Reset => 0, - Set => 1); - - -- Enable interrupt on SUSPENDED event. - type INTENSET_SUSPENDED_Field is - (-- Interrupt disabled. - Disabled, - -- Interrupt enabled. - Enabled) - with Size => 1; - for INTENSET_SUSPENDED_Field use - (Disabled => 0, - Enabled => 1); - - -- Enable interrupt on SUSPENDED event. - type INTENSET_SUSPENDED_Field_1 is - (-- Reset value for the field - Intenset_Suspended_Field_Reset, - -- Enable interrupt on write. - Set) - with Size => 1; - for INTENSET_SUSPENDED_Field_1 use - (Intenset_Suspended_Field_Reset => 0, - Set => 1); - - -- Interrupt enable set register. - type INTENSET_Register is record - -- unspecified - Reserved_0_0 : nrf51.Bit := 16#0#; - -- Enable interrupt on STOPPED event. - STOPPED : INTENSET_STOPPED_Field_1 := - Intenset_Stopped_Field_Reset; - -- Enable interrupt on READY event. - RXDREADY : INTENSET_RXDREADY_Field_1 := - Intenset_Rxdready_Field_Reset; - -- unspecified - Reserved_3_6 : nrf51.UInt4 := 16#0#; - -- Enable interrupt on TXDSENT event. - TXDSENT : INTENSET_TXDSENT_Field_1 := - Intenset_Txdsent_Field_Reset; - -- unspecified - Reserved_8_8 : nrf51.Bit := 16#0#; - -- Enable interrupt on ERROR event. - ERROR : INTENSET_ERROR_Field_1 := Intenset_Error_Field_Reset; - -- unspecified - Reserved_10_13 : nrf51.UInt4 := 16#0#; - -- Enable interrupt on BB event. - BB : INTENSET_BB_Field_1 := Intenset_Bb_Field_Reset; - -- unspecified - Reserved_15_17 : nrf51.UInt3 := 16#0#; - -- Enable interrupt on SUSPENDED event. - SUSPENDED : INTENSET_SUSPENDED_Field_1 := - Intenset_Suspended_Field_Reset; - -- unspecified - Reserved_19_31 : nrf51.UInt13 := 16#0#; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for INTENSET_Register use record - Reserved_0_0 at 0 range 0 .. 0; - STOPPED at 0 range 1 .. 1; - RXDREADY at 0 range 2 .. 2; - Reserved_3_6 at 0 range 3 .. 6; - TXDSENT at 0 range 7 .. 7; - Reserved_8_8 at 0 range 8 .. 8; - ERROR at 0 range 9 .. 9; - Reserved_10_13 at 0 range 10 .. 13; - BB at 0 range 14 .. 14; - Reserved_15_17 at 0 range 15 .. 17; - SUSPENDED at 0 range 18 .. 18; - Reserved_19_31 at 0 range 19 .. 31; - end record; - - -- Disable interrupt on STOPPED event. - type INTENCLR_STOPPED_Field is - (-- Interrupt disabled. - Disabled, - -- Interrupt enabled. - Enabled) - with Size => 1; - for INTENCLR_STOPPED_Field use - (Disabled => 0, - Enabled => 1); - - -- Disable interrupt on STOPPED event. - type INTENCLR_STOPPED_Field_1 is - (-- Reset value for the field - Intenclr_Stopped_Field_Reset, - -- Disable interrupt on write. - Clear) - with Size => 1; - for INTENCLR_STOPPED_Field_1 use - (Intenclr_Stopped_Field_Reset => 0, - Clear => 1); - - -- Disable interrupt on RXDREADY event. - type INTENCLR_RXDREADY_Field is - (-- Interrupt disabled. - Disabled, - -- Interrupt enabled. - Enabled) - with Size => 1; - for INTENCLR_RXDREADY_Field use - (Disabled => 0, - Enabled => 1); - - -- Disable interrupt on RXDREADY event. - type INTENCLR_RXDREADY_Field_1 is - (-- Reset value for the field - Intenclr_Rxdready_Field_Reset, - -- Disable interrupt on write. - Clear) - with Size => 1; - for INTENCLR_RXDREADY_Field_1 use - (Intenclr_Rxdready_Field_Reset => 0, - Clear => 1); - - -- Disable interrupt on TXDSENT event. - type INTENCLR_TXDSENT_Field is - (-- Interrupt disabled. - Disabled, - -- Interrupt enabled. - Enabled) - with Size => 1; - for INTENCLR_TXDSENT_Field use - (Disabled => 0, - Enabled => 1); - - -- Disable interrupt on TXDSENT event. - type INTENCLR_TXDSENT_Field_1 is - (-- Reset value for the field - Intenclr_Txdsent_Field_Reset, - -- Disable interrupt on write. - Clear) - with Size => 1; - for INTENCLR_TXDSENT_Field_1 use - (Intenclr_Txdsent_Field_Reset => 0, - Clear => 1); - - -- Disable interrupt on ERROR event. - type INTENCLR_ERROR_Field is - (-- Interrupt disabled. - Disabled, - -- Interrupt enabled. - Enabled) - with Size => 1; - for INTENCLR_ERROR_Field use - (Disabled => 0, - Enabled => 1); - - -- Disable interrupt on ERROR event. - type INTENCLR_ERROR_Field_1 is - (-- Reset value for the field - Intenclr_Error_Field_Reset, - -- Disable interrupt on write. - Clear) - with Size => 1; - for INTENCLR_ERROR_Field_1 use - (Intenclr_Error_Field_Reset => 0, - Clear => 1); - - -- Disable interrupt on BB event. - type INTENCLR_BB_Field is - (-- Interrupt disabled. - Disabled, - -- Interrupt enabled. - Enabled) - with Size => 1; - for INTENCLR_BB_Field use - (Disabled => 0, - Enabled => 1); - - -- Disable interrupt on BB event. - type INTENCLR_BB_Field_1 is - (-- Reset value for the field - Intenclr_Bb_Field_Reset, - -- Disable interrupt on write. - Clear) - with Size => 1; - for INTENCLR_BB_Field_1 use - (Intenclr_Bb_Field_Reset => 0, - Clear => 1); - - -- Disable interrupt on SUSPENDED event. - type INTENCLR_SUSPENDED_Field is - (-- Interrupt disabled. - Disabled, - -- Interrupt enabled. - Enabled) - with Size => 1; - for INTENCLR_SUSPENDED_Field use - (Disabled => 0, - Enabled => 1); - - -- Disable interrupt on SUSPENDED event. - type INTENCLR_SUSPENDED_Field_1 is - (-- Reset value for the field - Intenclr_Suspended_Field_Reset, - -- Disable interrupt on write. - Clear) - with Size => 1; - for INTENCLR_SUSPENDED_Field_1 use - (Intenclr_Suspended_Field_Reset => 0, - Clear => 1); - - -- Interrupt enable clear register. - type INTENCLR_Register is record - -- unspecified - Reserved_0_0 : nrf51.Bit := 16#0#; - -- Disable interrupt on STOPPED event. - STOPPED : INTENCLR_STOPPED_Field_1 := - Intenclr_Stopped_Field_Reset; - -- Disable interrupt on RXDREADY event. - RXDREADY : INTENCLR_RXDREADY_Field_1 := - Intenclr_Rxdready_Field_Reset; - -- unspecified - Reserved_3_6 : nrf51.UInt4 := 16#0#; - -- Disable interrupt on TXDSENT event. - TXDSENT : INTENCLR_TXDSENT_Field_1 := - Intenclr_Txdsent_Field_Reset; - -- unspecified - Reserved_8_8 : nrf51.Bit := 16#0#; - -- Disable interrupt on ERROR event. - ERROR : INTENCLR_ERROR_Field_1 := Intenclr_Error_Field_Reset; - -- unspecified - Reserved_10_13 : nrf51.UInt4 := 16#0#; - -- Disable interrupt on BB event. - BB : INTENCLR_BB_Field_1 := Intenclr_Bb_Field_Reset; - -- unspecified - Reserved_15_17 : nrf51.UInt3 := 16#0#; - -- Disable interrupt on SUSPENDED event. - SUSPENDED : INTENCLR_SUSPENDED_Field_1 := - Intenclr_Suspended_Field_Reset; - -- unspecified - Reserved_19_31 : nrf51.UInt13 := 16#0#; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for INTENCLR_Register use record - Reserved_0_0 at 0 range 0 .. 0; - STOPPED at 0 range 1 .. 1; - RXDREADY at 0 range 2 .. 2; - Reserved_3_6 at 0 range 3 .. 6; - TXDSENT at 0 range 7 .. 7; - Reserved_8_8 at 0 range 8 .. 8; - ERROR at 0 range 9 .. 9; - Reserved_10_13 at 0 range 10 .. 13; - BB at 0 range 14 .. 14; - Reserved_15_17 at 0 range 15 .. 17; - SUSPENDED at 0 range 18 .. 18; - Reserved_19_31 at 0 range 19 .. 31; - end record; - - -- Byte received in RXD register before read of the last received byte - -- (data loss). - type ERRORSRC_OVERRUN_Field is - (-- Error not present. - Notpresent, - -- Error present. - Present) - with Size => 1; - for ERRORSRC_OVERRUN_Field use - (Notpresent => 0, - Present => 1); - - -- Byte received in RXD register before read of the last received byte - -- (data loss). - type ERRORSRC_OVERRUN_Field_1 is - (-- Reset value for the field - Errorsrc_Overrun_Field_Reset, - -- Clear error on write. - Clear) - with Size => 1; - for ERRORSRC_OVERRUN_Field_1 use - (Errorsrc_Overrun_Field_Reset => 0, - Clear => 1); - - -- NACK received after sending the address. - type ERRORSRC_ANACK_Field is - (-- Error not present. - Notpresent, - -- Error present. - Present) - with Size => 1; - for ERRORSRC_ANACK_Field use - (Notpresent => 0, - Present => 1); - - -- NACK received after sending the address. - type ERRORSRC_ANACK_Field_1 is - (-- Reset value for the field - Errorsrc_Anack_Field_Reset, - -- Clear error on write. - Clear) - with Size => 1; - for ERRORSRC_ANACK_Field_1 use - (Errorsrc_Anack_Field_Reset => 0, - Clear => 1); - - -- NACK received after sending a data byte. - type ERRORSRC_DNACK_Field is - (-- Error not present. - Notpresent, - -- Error present. - Present) - with Size => 1; - for ERRORSRC_DNACK_Field use - (Notpresent => 0, - Present => 1); - - -- NACK received after sending a data byte. - type ERRORSRC_DNACK_Field_1 is - (-- Reset value for the field - Errorsrc_Dnack_Field_Reset, - -- Clear error on write. - Clear) - with Size => 1; - for ERRORSRC_DNACK_Field_1 use - (Errorsrc_Dnack_Field_Reset => 0, - Clear => 1); - - -- Two-wire error source. Write error field to 1 to clear error. - type ERRORSRC_Register is record - -- Byte received in RXD register before read of the last received byte - -- (data loss). - OVERRUN : ERRORSRC_OVERRUN_Field_1 := - Errorsrc_Overrun_Field_Reset; - -- NACK received after sending the address. - ANACK : ERRORSRC_ANACK_Field_1 := Errorsrc_Anack_Field_Reset; - -- NACK received after sending a data byte. - DNACK : ERRORSRC_DNACK_Field_1 := Errorsrc_Dnack_Field_Reset; - -- unspecified - Reserved_3_31 : nrf51.UInt29 := 16#0#; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for ERRORSRC_Register use record - OVERRUN at 0 range 0 .. 0; - ANACK at 0 range 1 .. 1; - DNACK at 0 range 2 .. 2; - Reserved_3_31 at 0 range 3 .. 31; - end record; - - -- Enable or disable W2M - type ENABLE_ENABLE_Field is - (-- Disabled. - Disabled, - -- Enabled. - Enabled) - with Size => 3; - for ENABLE_ENABLE_Field use - (Disabled => 0, - Enabled => 5); - - -- Enable two-wire master. - type ENABLE_Register is record - -- Enable or disable W2M - ENABLE : ENABLE_ENABLE_Field := nrf51.TWI.Disabled; - -- unspecified - Reserved_3_31 : nrf51.UInt29 := 16#0#; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for ENABLE_Register use record - ENABLE at 0 range 0 .. 2; - Reserved_3_31 at 0 range 3 .. 31; - end record; - - subtype RXD_RXD_Field is nrf51.Byte; - - -- RX data register. - type RXD_Register is record - -- Read-only. *** Reading this field has side effects on other resources - -- ***. RX data from last transfer. - RXD : RXD_RXD_Field; - -- unspecified - Reserved_8_31 : nrf51.UInt24; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for RXD_Register use record - RXD at 0 range 0 .. 7; - Reserved_8_31 at 0 range 8 .. 31; - end record; - - subtype TXD_TXD_Field is nrf51.Byte; - - -- TX data register. - type TXD_Register is record - -- TX data for next transfer. - TXD : TXD_TXD_Field := 16#0#; - -- unspecified - Reserved_8_31 : nrf51.UInt24 := 16#0#; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for TXD_Register use record - TXD at 0 range 0 .. 7; - Reserved_8_31 at 0 range 8 .. 31; - end record; - - subtype ADDRESS_ADDRESS_Field is nrf51.UInt7; - - -- Address used in the two-wire transfer. - type ADDRESS_Register is record - -- Two-wire address. - ADDRESS : ADDRESS_ADDRESS_Field := 16#0#; - -- unspecified - Reserved_7_31 : nrf51.UInt25 := 16#0#; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for ADDRESS_Register use record - ADDRESS at 0 range 0 .. 6; - Reserved_7_31 at 0 range 7 .. 31; - end record; - - -- Peripheral power control. - type POWER_POWER_Field is - (-- Module power disabled. - Disabled, - -- Module power enabled. - Enabled) - with Size => 1; - for POWER_POWER_Field use - (Disabled => 0, - Enabled => 1); - - -- Peripheral power control. - type POWER_Register is record - -- Peripheral power control. - POWER : POWER_POWER_Field := nrf51.TWI.Disabled; - -- unspecified - Reserved_1_31 : nrf51.UInt31 := 16#0#; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for POWER_Register use record - POWER at 0 range 0 .. 0; - Reserved_1_31 at 0 range 1 .. 31; - end record; - - ----------------- - -- Peripherals -- - ----------------- - - -- Two-wire interface master 0. - type TWI_Peripheral is record - -- Start 2-Wire master receive sequence. - TASKS_STARTRX : aliased nrf51.UInt32; - -- Start 2-Wire master transmit sequence. - TASKS_STARTTX : aliased nrf51.UInt32; - -- Stop 2-Wire transaction. - TASKS_STOP : aliased nrf51.UInt32; - -- Suspend 2-Wire transaction. - TASKS_SUSPEND : aliased nrf51.UInt32; - -- Resume 2-Wire transaction. - TASKS_RESUME : aliased nrf51.UInt32; - -- Two-wire stopped. - EVENTS_STOPPED : aliased nrf51.UInt32; - -- Two-wire ready to deliver new RXD byte received. - EVENTS_RXDREADY : aliased nrf51.UInt32; - -- Two-wire finished sending last TXD byte. - EVENTS_TXDSENT : aliased nrf51.UInt32; - -- Two-wire error detected. - EVENTS_ERROR : aliased nrf51.UInt32; - -- Two-wire byte boundary. - EVENTS_BB : aliased nrf51.UInt32; - -- Two-wire suspended. - EVENTS_SUSPENDED : aliased nrf51.UInt32; - -- Shortcuts for TWI. - SHORTS : aliased SHORTS_Register; - -- Interrupt enable set register. - INTENSET : aliased INTENSET_Register; - -- Interrupt enable clear register. - INTENCLR : aliased INTENCLR_Register; - -- Two-wire error source. Write error field to 1 to clear error. - ERRORSRC : aliased ERRORSRC_Register; - -- Enable two-wire master. - ENABLE : aliased ENABLE_Register; - -- Pin select for SCL. - PSELSCL : aliased nrf51.UInt32; - -- Pin select for SDA. - PSELSDA : aliased nrf51.UInt32; - -- RX data register. - RXD : aliased RXD_Register; - -- TX data register. - TXD : aliased TXD_Register; - -- Two-wire frequency. - FREQUENCY : aliased nrf51.UInt32; - -- Address used in the two-wire transfer. - ADDRESS : aliased ADDRESS_Register; - -- Peripheral power control. - POWER : aliased POWER_Register; - end record - with Volatile; - - for TWI_Peripheral use record - TASKS_STARTRX at 16#0# range 0 .. 31; - TASKS_STARTTX at 16#8# range 0 .. 31; - TASKS_STOP at 16#14# range 0 .. 31; - TASKS_SUSPEND at 16#1C# range 0 .. 31; - TASKS_RESUME at 16#20# range 0 .. 31; - EVENTS_STOPPED at 16#104# range 0 .. 31; - EVENTS_RXDREADY at 16#108# range 0 .. 31; - EVENTS_TXDSENT at 16#11C# range 0 .. 31; - EVENTS_ERROR at 16#124# range 0 .. 31; - EVENTS_BB at 16#138# range 0 .. 31; - EVENTS_SUSPENDED at 16#148# range 0 .. 31; - SHORTS at 16#200# range 0 .. 31; - INTENSET at 16#304# range 0 .. 31; - INTENCLR at 16#308# range 0 .. 31; - ERRORSRC at 16#4C4# range 0 .. 31; - ENABLE at 16#500# range 0 .. 31; - PSELSCL at 16#508# range 0 .. 31; - PSELSDA at 16#50C# range 0 .. 31; - RXD at 16#518# range 0 .. 31; - TXD at 16#51C# range 0 .. 31; - FREQUENCY at 16#524# range 0 .. 31; - ADDRESS at 16#588# range 0 .. 31; - POWER at 16#FFC# range 0 .. 31; - end record; - - -- Two-wire interface master 0. - TWI0_Periph : aliased TWI_Peripheral - with Import, Address => TWI0_Base; - - -- Two-wire interface master 1. - TWI1_Periph : aliased TWI_Peripheral - with Import, Address => TWI1_Base; - -end nrf51.TWI; diff --git a/microbit/nrf51/nrf51-uart.ads b/microbit/nrf51/nrf51-uart.ads deleted file mode 100644 index f91f3c1..0000000 --- a/microbit/nrf51/nrf51-uart.ads +++ /dev/null @@ -1,777 +0,0 @@ -pragma Ada_2012; -pragma Style_Checks (Off); - --- Copyright (c) 2013, Nordic Semiconductor ASA --- All rights reserved. --- --- Redistribution and use in source and binary forms, with or without --- modification, are permitted provided that the following conditions are met: --- --- * Redistributions of source code must retain the above copyright notice, this --- list of conditions and the following disclaimer. --- --- * Redistributions in binary form must reproduce the above copyright notice, --- this list of conditions and the following disclaimer in the documentation --- and/or other materials provided with the distribution. --- --- * Neither the name of Nordic Semiconductor ASA nor the names of its --- contributors may be used to endorse or promote products derived from --- this software without specific prior written permission. --- --- THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" --- AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE --- IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE --- DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE --- FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL --- DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR --- SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER --- CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, --- OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE --- OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. --- - --- This spec has been automatically generated from nrf51.svd - -pragma Restrictions (No_Elaboration_Code); - -with System; - -package nrf51.UART is - pragma Preelaborate; - - --------------- - -- Registers -- - --------------- - - -- Shortcut between CTS event and STARTRX task. - type SHORTS_CTS_STARTRX_Field is - (-- Shortcut disabled. - Disabled, - -- Shortcut enabled. - Enabled) - with Size => 1; - for SHORTS_CTS_STARTRX_Field use - (Disabled => 0, - Enabled => 1); - - -- Shortcut between NCTS event and STOPRX task. - type SHORTS_NCTS_STOPRX_Field is - (-- Shortcut disabled. - Disabled, - -- Shortcut enabled. - Enabled) - with Size => 1; - for SHORTS_NCTS_STOPRX_Field use - (Disabled => 0, - Enabled => 1); - - -- Shortcuts for UART. - type SHORTS_Register is record - -- unspecified - Reserved_0_2 : nrf51.UInt3 := 16#0#; - -- Shortcut between CTS event and STARTRX task. - CTS_STARTRX : SHORTS_CTS_STARTRX_Field := nrf51.UART.Disabled; - -- Shortcut between NCTS event and STOPRX task. - NCTS_STOPRX : SHORTS_NCTS_STOPRX_Field := nrf51.UART.Disabled; - -- unspecified - Reserved_5_31 : nrf51.UInt27 := 16#0#; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for SHORTS_Register use record - Reserved_0_2 at 0 range 0 .. 2; - CTS_STARTRX at 0 range 3 .. 3; - NCTS_STOPRX at 0 range 4 .. 4; - Reserved_5_31 at 0 range 5 .. 31; - end record; - - -- Enable interrupt on CTS event. - type INTENSET_CTS_Field is - (-- Interrupt disabled. - Disabled, - -- Interrupt enabled. - Enabled) - with Size => 1; - for INTENSET_CTS_Field use - (Disabled => 0, - Enabled => 1); - - -- Enable interrupt on CTS event. - type INTENSET_CTS_Field_1 is - (-- Reset value for the field - Intenset_Cts_Field_Reset, - -- Enable interrupt on write. - Set) - with Size => 1; - for INTENSET_CTS_Field_1 use - (Intenset_Cts_Field_Reset => 0, - Set => 1); - - -- Enable interrupt on NCTS event. - type INTENSET_NCTS_Field is - (-- Interrupt disabled. - Disabled, - -- Interrupt enabled. - Enabled) - with Size => 1; - for INTENSET_NCTS_Field use - (Disabled => 0, - Enabled => 1); - - -- Enable interrupt on NCTS event. - type INTENSET_NCTS_Field_1 is - (-- Reset value for the field - Intenset_Ncts_Field_Reset, - -- Enable interrupt on write. - Set) - with Size => 1; - for INTENSET_NCTS_Field_1 use - (Intenset_Ncts_Field_Reset => 0, - Set => 1); - - -- Enable interrupt on RXRDY event. - type INTENSET_RXDRDY_Field is - (-- Interrupt disabled. - Disabled, - -- Interrupt enabled. - Enabled) - with Size => 1; - for INTENSET_RXDRDY_Field use - (Disabled => 0, - Enabled => 1); - - -- Enable interrupt on RXRDY event. - type INTENSET_RXDRDY_Field_1 is - (-- Reset value for the field - Intenset_Rxdrdy_Field_Reset, - -- Enable interrupt on write. - Set) - with Size => 1; - for INTENSET_RXDRDY_Field_1 use - (Intenset_Rxdrdy_Field_Reset => 0, - Set => 1); - - -- Enable interrupt on TXRDY event. - type INTENSET_TXDRDY_Field is - (-- Interrupt disabled. - Disabled, - -- Interrupt enabled. - Enabled) - with Size => 1; - for INTENSET_TXDRDY_Field use - (Disabled => 0, - Enabled => 1); - - -- Enable interrupt on TXRDY event. - type INTENSET_TXDRDY_Field_1 is - (-- Reset value for the field - Intenset_Txdrdy_Field_Reset, - -- Enable interrupt on write. - Set) - with Size => 1; - for INTENSET_TXDRDY_Field_1 use - (Intenset_Txdrdy_Field_Reset => 0, - Set => 1); - - -- Enable interrupt on ERROR event. - type INTENSET_ERROR_Field is - (-- Interrupt disabled. - Disabled, - -- Interrupt enabled. - Enabled) - with Size => 1; - for INTENSET_ERROR_Field use - (Disabled => 0, - Enabled => 1); - - -- Enable interrupt on ERROR event. - type INTENSET_ERROR_Field_1 is - (-- Reset value for the field - Intenset_Error_Field_Reset, - -- Enable interrupt on write. - Set) - with Size => 1; - for INTENSET_ERROR_Field_1 use - (Intenset_Error_Field_Reset => 0, - Set => 1); - - -- Enable interrupt on RXTO event. - type INTENSET_RXTO_Field is - (-- Interrupt disabled. - Disabled, - -- Interrupt enabled. - Enabled) - with Size => 1; - for INTENSET_RXTO_Field use - (Disabled => 0, - Enabled => 1); - - -- Enable interrupt on RXTO event. - type INTENSET_RXTO_Field_1 is - (-- Reset value for the field - Intenset_Rxto_Field_Reset, - -- Enable interrupt on write. - Set) - with Size => 1; - for INTENSET_RXTO_Field_1 use - (Intenset_Rxto_Field_Reset => 0, - Set => 1); - - -- Interrupt enable set register. - type INTENSET_Register is record - -- Enable interrupt on CTS event. - CTS : INTENSET_CTS_Field_1 := Intenset_Cts_Field_Reset; - -- Enable interrupt on NCTS event. - NCTS : INTENSET_NCTS_Field_1 := Intenset_Ncts_Field_Reset; - -- Enable interrupt on RXRDY event. - RXDRDY : INTENSET_RXDRDY_Field_1 := Intenset_Rxdrdy_Field_Reset; - -- unspecified - Reserved_3_6 : nrf51.UInt4 := 16#0#; - -- Enable interrupt on TXRDY event. - TXDRDY : INTENSET_TXDRDY_Field_1 := Intenset_Txdrdy_Field_Reset; - -- unspecified - Reserved_8_8 : nrf51.Bit := 16#0#; - -- Enable interrupt on ERROR event. - ERROR : INTENSET_ERROR_Field_1 := Intenset_Error_Field_Reset; - -- unspecified - Reserved_10_16 : nrf51.UInt7 := 16#0#; - -- Enable interrupt on RXTO event. - RXTO : INTENSET_RXTO_Field_1 := Intenset_Rxto_Field_Reset; - -- unspecified - Reserved_18_31 : nrf51.UInt14 := 16#0#; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for INTENSET_Register use record - CTS at 0 range 0 .. 0; - NCTS at 0 range 1 .. 1; - RXDRDY at 0 range 2 .. 2; - Reserved_3_6 at 0 range 3 .. 6; - TXDRDY at 0 range 7 .. 7; - Reserved_8_8 at 0 range 8 .. 8; - ERROR at 0 range 9 .. 9; - Reserved_10_16 at 0 range 10 .. 16; - RXTO at 0 range 17 .. 17; - Reserved_18_31 at 0 range 18 .. 31; - end record; - - -- Disable interrupt on CTS event. - type INTENCLR_CTS_Field is - (-- Interrupt disabled. - Disabled, - -- Interrupt enabled. - Enabled) - with Size => 1; - for INTENCLR_CTS_Field use - (Disabled => 0, - Enabled => 1); - - -- Disable interrupt on CTS event. - type INTENCLR_CTS_Field_1 is - (-- Reset value for the field - Intenclr_Cts_Field_Reset, - -- Disable interrupt on write. - Clear) - with Size => 1; - for INTENCLR_CTS_Field_1 use - (Intenclr_Cts_Field_Reset => 0, - Clear => 1); - - -- Disable interrupt on NCTS event. - type INTENCLR_NCTS_Field is - (-- Interrupt disabled. - Disabled, - -- Interrupt enabled. - Enabled) - with Size => 1; - for INTENCLR_NCTS_Field use - (Disabled => 0, - Enabled => 1); - - -- Disable interrupt on NCTS event. - type INTENCLR_NCTS_Field_1 is - (-- Reset value for the field - Intenclr_Ncts_Field_Reset, - -- Disable interrupt on write. - Clear) - with Size => 1; - for INTENCLR_NCTS_Field_1 use - (Intenclr_Ncts_Field_Reset => 0, - Clear => 1); - - -- Disable interrupt on RXRDY event. - type INTENCLR_RXDRDY_Field is - (-- Interrupt disabled. - Disabled, - -- Interrupt enabled. - Enabled) - with Size => 1; - for INTENCLR_RXDRDY_Field use - (Disabled => 0, - Enabled => 1); - - -- Disable interrupt on RXRDY event. - type INTENCLR_RXDRDY_Field_1 is - (-- Reset value for the field - Intenclr_Rxdrdy_Field_Reset, - -- Disable interrupt on write. - Clear) - with Size => 1; - for INTENCLR_RXDRDY_Field_1 use - (Intenclr_Rxdrdy_Field_Reset => 0, - Clear => 1); - - -- Disable interrupt on TXRDY event. - type INTENCLR_TXDRDY_Field is - (-- Interrupt disabled. - Disabled, - -- Interrupt enabled. - Enabled) - with Size => 1; - for INTENCLR_TXDRDY_Field use - (Disabled => 0, - Enabled => 1); - - -- Disable interrupt on TXRDY event. - type INTENCLR_TXDRDY_Field_1 is - (-- Reset value for the field - Intenclr_Txdrdy_Field_Reset, - -- Disable interrupt on write. - Clear) - with Size => 1; - for INTENCLR_TXDRDY_Field_1 use - (Intenclr_Txdrdy_Field_Reset => 0, - Clear => 1); - - -- Disable interrupt on ERROR event. - type INTENCLR_ERROR_Field is - (-- Interrupt disabled. - Disabled, - -- Interrupt enabled. - Enabled) - with Size => 1; - for INTENCLR_ERROR_Field use - (Disabled => 0, - Enabled => 1); - - -- Disable interrupt on ERROR event. - type INTENCLR_ERROR_Field_1 is - (-- Reset value for the field - Intenclr_Error_Field_Reset, - -- Disable interrupt on write. - Clear) - with Size => 1; - for INTENCLR_ERROR_Field_1 use - (Intenclr_Error_Field_Reset => 0, - Clear => 1); - - -- Disable interrupt on RXTO event. - type INTENCLR_RXTO_Field is - (-- Interrupt disabled. - Disabled, - -- Interrupt enabled. - Enabled) - with Size => 1; - for INTENCLR_RXTO_Field use - (Disabled => 0, - Enabled => 1); - - -- Disable interrupt on RXTO event. - type INTENCLR_RXTO_Field_1 is - (-- Reset value for the field - Intenclr_Rxto_Field_Reset, - -- Disable interrupt on write. - Clear) - with Size => 1; - for INTENCLR_RXTO_Field_1 use - (Intenclr_Rxto_Field_Reset => 0, - Clear => 1); - - -- Interrupt enable clear register. - type INTENCLR_Register is record - -- Disable interrupt on CTS event. - CTS : INTENCLR_CTS_Field_1 := Intenclr_Cts_Field_Reset; - -- Disable interrupt on NCTS event. - NCTS : INTENCLR_NCTS_Field_1 := Intenclr_Ncts_Field_Reset; - -- Disable interrupt on RXRDY event. - RXDRDY : INTENCLR_RXDRDY_Field_1 := Intenclr_Rxdrdy_Field_Reset; - -- unspecified - Reserved_3_6 : nrf51.UInt4 := 16#0#; - -- Disable interrupt on TXRDY event. - TXDRDY : INTENCLR_TXDRDY_Field_1 := Intenclr_Txdrdy_Field_Reset; - -- unspecified - Reserved_8_8 : nrf51.Bit := 16#0#; - -- Disable interrupt on ERROR event. - ERROR : INTENCLR_ERROR_Field_1 := Intenclr_Error_Field_Reset; - -- unspecified - Reserved_10_16 : nrf51.UInt7 := 16#0#; - -- Disable interrupt on RXTO event. - RXTO : INTENCLR_RXTO_Field_1 := Intenclr_Rxto_Field_Reset; - -- unspecified - Reserved_18_31 : nrf51.UInt14 := 16#0#; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for INTENCLR_Register use record - CTS at 0 range 0 .. 0; - NCTS at 0 range 1 .. 1; - RXDRDY at 0 range 2 .. 2; - Reserved_3_6 at 0 range 3 .. 6; - TXDRDY at 0 range 7 .. 7; - Reserved_8_8 at 0 range 8 .. 8; - ERROR at 0 range 9 .. 9; - Reserved_10_16 at 0 range 10 .. 16; - RXTO at 0 range 17 .. 17; - Reserved_18_31 at 0 range 18 .. 31; - end record; - - -- A start bit is received while the previous data still lies in RXD. (Data - -- loss). - type ERRORSRC_OVERRUN_Field is - (-- Error not present. - Notpresent, - -- Error present. - Present) - with Size => 1; - for ERRORSRC_OVERRUN_Field use - (Notpresent => 0, - Present => 1); - - -- A start bit is received while the previous data still lies in RXD. (Data - -- loss). - type ERRORSRC_OVERRUN_Field_1 is - (-- Reset value for the field - Errorsrc_Overrun_Field_Reset, - -- Clear error on write. - Clear) - with Size => 1; - for ERRORSRC_OVERRUN_Field_1 use - (Errorsrc_Overrun_Field_Reset => 0, - Clear => 1); - - -- A character with bad parity is received. Only checked if HW parity - -- control is enabled. - type ERRORSRC_PARITY_Field is - (-- Error not present. - Notpresent, - -- Error present. - Present) - with Size => 1; - for ERRORSRC_PARITY_Field use - (Notpresent => 0, - Present => 1); - - -- A character with bad parity is received. Only checked if HW parity - -- control is enabled. - type ERRORSRC_PARITY_Field_1 is - (-- Reset value for the field - Errorsrc_Parity_Field_Reset, - -- Clear error on write. - Clear) - with Size => 1; - for ERRORSRC_PARITY_Field_1 use - (Errorsrc_Parity_Field_Reset => 0, - Clear => 1); - - -- A valid stop bit is not detected on the serial data input after all bits - -- in a character have been received. - type ERRORSRC_FRAMING_Field is - (-- Error not present. - Notpresent, - -- Error present. - Present) - with Size => 1; - for ERRORSRC_FRAMING_Field use - (Notpresent => 0, - Present => 1); - - -- A valid stop bit is not detected on the serial data input after all bits - -- in a character have been received. - type ERRORSRC_FRAMING_Field_1 is - (-- Reset value for the field - Errorsrc_Framing_Field_Reset, - -- Clear error on write. - Clear) - with Size => 1; - for ERRORSRC_FRAMING_Field_1 use - (Errorsrc_Framing_Field_Reset => 0, - Clear => 1); - - -- The serial data input is '0' for longer than the length of a data frame. - type ERRORSRC_BREAK_Field is - (-- Error not present. - Notpresent, - -- Error present. - Present) - with Size => 1; - for ERRORSRC_BREAK_Field use - (Notpresent => 0, - Present => 1); - - -- The serial data input is '0' for longer than the length of a data frame. - type ERRORSRC_BREAK_Field_1 is - (-- Reset value for the field - Errorsrc_Break_Field_Reset, - -- Clear error on write. - Clear) - with Size => 1; - for ERRORSRC_BREAK_Field_1 use - (Errorsrc_Break_Field_Reset => 0, - Clear => 1); - - -- Error source. Write error field to 1 to clear error. - type ERRORSRC_Register is record - -- A start bit is received while the previous data still lies in RXD. - -- (Data loss). - OVERRUN : ERRORSRC_OVERRUN_Field_1 := - Errorsrc_Overrun_Field_Reset; - -- A character with bad parity is received. Only checked if HW parity - -- control is enabled. - PARITY : ERRORSRC_PARITY_Field_1 := Errorsrc_Parity_Field_Reset; - -- A valid stop bit is not detected on the serial data input after all - -- bits in a character have been received. - FRAMING : ERRORSRC_FRAMING_Field_1 := - Errorsrc_Framing_Field_Reset; - -- The serial data input is '0' for longer than the length of a data - -- frame. - BREAK : ERRORSRC_BREAK_Field_1 := Errorsrc_Break_Field_Reset; - -- unspecified - Reserved_4_31 : nrf51.UInt28 := 16#0#; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for ERRORSRC_Register use record - OVERRUN at 0 range 0 .. 0; - PARITY at 0 range 1 .. 1; - FRAMING at 0 range 2 .. 2; - BREAK at 0 range 3 .. 3; - Reserved_4_31 at 0 range 4 .. 31; - end record; - - -- Enable or disable UART and acquire IOs. - type ENABLE_ENABLE_Field is - (-- UART disabled. - Disabled, - -- UART enabled. - Enabled) - with Size => 3; - for ENABLE_ENABLE_Field use - (Disabled => 0, - Enabled => 4); - - -- Enable UART and acquire IOs. - type ENABLE_Register is record - -- Enable or disable UART and acquire IOs. - ENABLE : ENABLE_ENABLE_Field := nrf51.UART.Disabled; - -- unspecified - Reserved_3_31 : nrf51.UInt29 := 16#0#; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for ENABLE_Register use record - ENABLE at 0 range 0 .. 2; - Reserved_3_31 at 0 range 3 .. 31; - end record; - - subtype RXD_RXD_Field is nrf51.Byte; - - -- RXD register. On read action the buffer pointer is displaced. Once read - -- the character is consumed. If read when no character available, the UART - -- will stop working. - type RXD_Register is record - -- Read-only. *** Reading this field has side effects on other resources - -- ***. RX data from previous transfer. Double buffered. - RXD : RXD_RXD_Field; - -- unspecified - Reserved_8_31 : nrf51.UInt24; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for RXD_Register use record - RXD at 0 range 0 .. 7; - Reserved_8_31 at 0 range 8 .. 31; - end record; - - subtype TXD_TXD_Field is nrf51.Byte; - - -- TXD register. - type TXD_Register is record - -- Write-only. TX data for transfer. - TXD : TXD_TXD_Field := 16#0#; - -- unspecified - Reserved_8_31 : nrf51.UInt24 := 16#0#; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for TXD_Register use record - TXD at 0 range 0 .. 7; - Reserved_8_31 at 0 range 8 .. 31; - end record; - - -- Hardware flow control. - type CONFIG_HWFC_Field is - (-- Hardware flow control disabled. - Disabled, - -- Hardware flow control enabled. - Enabled) - with Size => 1; - for CONFIG_HWFC_Field use - (Disabled => 0, - Enabled => 1); - - -- Include parity bit. - type CONFIG_PARITY_Field is - (-- Parity bit excluded. - Excluded, - -- Parity bit included. - Included) - with Size => 3; - for CONFIG_PARITY_Field use - (Excluded => 0, - Included => 7); - - -- Configuration of parity and hardware flow control register. - type CONFIG_Register is record - -- Hardware flow control. - HWFC : CONFIG_HWFC_Field := nrf51.UART.Disabled; - -- Include parity bit. - PARITY : CONFIG_PARITY_Field := nrf51.UART.Excluded; - -- unspecified - Reserved_4_31 : nrf51.UInt28 := 16#0#; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for CONFIG_Register use record - HWFC at 0 range 0 .. 0; - PARITY at 0 range 1 .. 3; - Reserved_4_31 at 0 range 4 .. 31; - end record; - - -- Peripheral power control. - type POWER_POWER_Field is - (-- Module power disabled. - Disabled, - -- Module power enabled. - Enabled) - with Size => 1; - for POWER_POWER_Field use - (Disabled => 0, - Enabled => 1); - - -- Peripheral power control. - type POWER_Register is record - -- Peripheral power control. - POWER : POWER_POWER_Field := nrf51.UART.Disabled; - -- unspecified - Reserved_1_31 : nrf51.UInt31 := 16#0#; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for POWER_Register use record - POWER at 0 range 0 .. 0; - Reserved_1_31 at 0 range 1 .. 31; - end record; - - ----------------- - -- Peripherals -- - ----------------- - - -- Universal Asynchronous Receiver/Transmitter. - type UART_Peripheral is record - -- Start UART receiver. - TASKS_STARTRX : aliased nrf51.UInt32; - -- Stop UART receiver. - TASKS_STOPRX : aliased nrf51.UInt32; - -- Start UART transmitter. - TASKS_STARTTX : aliased nrf51.UInt32; - -- Stop UART transmitter. - TASKS_STOPTX : aliased nrf51.UInt32; - -- Suspend UART. - TASKS_SUSPEND : aliased nrf51.UInt32; - -- CTS activated. - EVENTS_CTS : aliased nrf51.UInt32; - -- CTS deactivated. - EVENTS_NCTS : aliased nrf51.UInt32; - -- Data received in RXD. - EVENTS_RXDRDY : aliased nrf51.UInt32; - -- Data sent from TXD. - EVENTS_TXDRDY : aliased nrf51.UInt32; - -- Error detected. - EVENTS_ERROR : aliased nrf51.UInt32; - -- Receiver timeout. - EVENTS_RXTO : aliased nrf51.UInt32; - -- Shortcuts for UART. - SHORTS : aliased SHORTS_Register; - -- Interrupt enable set register. - INTENSET : aliased INTENSET_Register; - -- Interrupt enable clear register. - INTENCLR : aliased INTENCLR_Register; - -- Error source. Write error field to 1 to clear error. - ERRORSRC : aliased ERRORSRC_Register; - -- Enable UART and acquire IOs. - ENABLE : aliased ENABLE_Register; - -- Pin select for RTS. - PSELRTS : aliased nrf51.UInt32; - -- Pin select for TXD. - PSELTXD : aliased nrf51.UInt32; - -- Pin select for CTS. - PSELCTS : aliased nrf51.UInt32; - -- Pin select for RXD. - PSELRXD : aliased nrf51.UInt32; - -- RXD register. On read action the buffer pointer is displaced. Once - -- read the character is consumed. If read when no character available, - -- the UART will stop working. - RXD : aliased RXD_Register; - -- TXD register. - TXD : aliased TXD_Register; - -- UART Baudrate. - BAUDRATE : aliased nrf51.UInt32; - -- Configuration of parity and hardware flow control register. - CONFIG : aliased CONFIG_Register; - -- Peripheral power control. - POWER : aliased POWER_Register; - end record - with Volatile; - - for UART_Peripheral use record - TASKS_STARTRX at 16#0# range 0 .. 31; - TASKS_STOPRX at 16#4# range 0 .. 31; - TASKS_STARTTX at 16#8# range 0 .. 31; - TASKS_STOPTX at 16#C# range 0 .. 31; - TASKS_SUSPEND at 16#1C# range 0 .. 31; - EVENTS_CTS at 16#100# range 0 .. 31; - EVENTS_NCTS at 16#104# range 0 .. 31; - EVENTS_RXDRDY at 16#108# range 0 .. 31; - EVENTS_TXDRDY at 16#11C# range 0 .. 31; - EVENTS_ERROR at 16#124# range 0 .. 31; - EVENTS_RXTO at 16#144# range 0 .. 31; - SHORTS at 16#200# range 0 .. 31; - INTENSET at 16#304# range 0 .. 31; - INTENCLR at 16#308# range 0 .. 31; - ERRORSRC at 16#480# range 0 .. 31; - ENABLE at 16#500# range 0 .. 31; - PSELRTS at 16#508# range 0 .. 31; - PSELTXD at 16#50C# range 0 .. 31; - PSELCTS at 16#510# range 0 .. 31; - PSELRXD at 16#514# range 0 .. 31; - RXD at 16#518# range 0 .. 31; - TXD at 16#51C# range 0 .. 31; - BAUDRATE at 16#524# range 0 .. 31; - CONFIG at 16#56C# range 0 .. 31; - POWER at 16#FFC# range 0 .. 31; - end record; - - -- Universal Asynchronous Receiver/Transmitter. - UART0_Periph : aliased UART_Peripheral - with Import, Address => UART0_Base; - -end nrf51.UART; diff --git a/microbit/nrf51/nrf51-uicr.ads b/microbit/nrf51/nrf51-uicr.ads deleted file mode 100644 index 590203a..0000000 --- a/microbit/nrf51/nrf51-uicr.ads +++ /dev/null @@ -1,197 +0,0 @@ -pragma Ada_2012; -pragma Style_Checks (Off); - --- Copyright (c) 2013, Nordic Semiconductor ASA --- All rights reserved. --- --- Redistribution and use in source and binary forms, with or without --- modification, are permitted provided that the following conditions are met: --- --- * Redistributions of source code must retain the above copyright notice, this --- list of conditions and the following disclaimer. --- --- * Redistributions in binary form must reproduce the above copyright notice, --- this list of conditions and the following disclaimer in the documentation --- and/or other materials provided with the distribution. --- --- * Neither the name of Nordic Semiconductor ASA nor the names of its --- contributors may be used to endorse or promote products derived from --- this software without specific prior written permission. --- --- THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" --- AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE --- IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE --- DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE --- FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL --- DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR --- SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER --- CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, --- OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE --- OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. --- - --- This spec has been automatically generated from nrf51.svd - -pragma Restrictions (No_Elaboration_Code); - -with System; - -package nrf51.UICR is - pragma Preelaborate; - - --------------- - -- Registers -- - --------------- - - -- Readback protect region 0. Will be ignored if pre-programmed factory - -- code is present on the chip. - type RBPCONF_PR0_Field is - (-- Enabled. - Enabled, - -- Disabled. - Disabled) - with Size => 8; - for RBPCONF_PR0_Field use - (Enabled => 0, - Disabled => 255); - - -- Readback protect all code in the device. - type RBPCONF_PALL_Field is - (-- Enabled. - Enabled, - -- Disabled. - Disabled) - with Size => 8; - for RBPCONF_PALL_Field use - (Enabled => 0, - Disabled => 255); - - -- Readback protection configuration. - type RBPCONF_Register is record - -- Readback protect region 0. Will be ignored if pre-programmed factory - -- code is present on the chip. - PR0 : RBPCONF_PR0_Field := nrf51.UICR.Disabled; - -- Readback protect all code in the device. - PALL : RBPCONF_PALL_Field := nrf51.UICR.Disabled; - -- unspecified - Reserved_16_31 : nrf51.UInt16 := 16#FFFF#; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for RBPCONF_Register use record - PR0 at 0 range 0 .. 7; - PALL at 0 range 8 .. 15; - Reserved_16_31 at 0 range 16 .. 31; - end record; - - -- Reset value for CLOCK XTALFREQ register. - type XTALFREQ_XTALFREQ_Field is - (-- 32MHz Xtal is used. - Val_32Mhz, - -- 16MHz Xtal is used. - Val_16Mhz) - with Size => 8; - for XTALFREQ_XTALFREQ_Field use - (Val_32Mhz => 0, - Val_16Mhz => 255); - - -- Reset value for CLOCK XTALFREQ register. - type XTALFREQ_Register is record - -- Reset value for CLOCK XTALFREQ register. - XTALFREQ : XTALFREQ_XTALFREQ_Field := nrf51.UICR.Val_16Mhz; - -- unspecified - Reserved_8_31 : nrf51.UInt24 := 16#FFFFFF#; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for XTALFREQ_Register use record - XTALFREQ at 0 range 0 .. 7; - Reserved_8_31 at 0 range 8 .. 31; - end record; - - subtype FWID_FWID_Field is nrf51.UInt16; - - -- Firmware ID. - type FWID_Register is record - -- Read-only. Identification number for the firmware loaded into the - -- chip. - FWID : FWID_FWID_Field; - -- unspecified - Reserved_16_31 : nrf51.UInt16; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for FWID_Register use record - FWID at 0 range 0 .. 15; - Reserved_16_31 at 0 range 16 .. 31; - end record; - - -- Reserved for Nordic firmware design. - - -- Reserved for Nordic firmware design. - type NRFFW_Registers is array (0 .. 14) of nrf51.UInt32; - - -- Reserved for Nordic hardware design. - - -- Reserved for Nordic hardware design. - type NRFHW_Registers is array (0 .. 11) of nrf51.UInt32; - - -- Reserved for customer. - - -- Reserved for customer. - type CUSTOMER_Registers is array (0 .. 31) of nrf51.UInt32; - - ----------------- - -- Peripherals -- - ----------------- - - type UICR_Disc is - (Mode_1, - Mode_2); - - -- User Information Configuration. - type UICR_Peripheral - (Discriminent : UICR_Disc := Mode_1) - is record - -- Length of code region 0. - CLENR0 : aliased nrf51.UInt32; - -- Readback protection configuration. - RBPCONF : aliased RBPCONF_Register; - -- Reset value for CLOCK XTALFREQ register. - XTALFREQ : aliased XTALFREQ_Register; - -- Firmware ID. - FWID : aliased FWID_Register; - -- Reserved for Nordic hardware design. - NRFHW : aliased NRFHW_Registers; - -- Reserved for customer. - CUSTOMER : aliased CUSTOMER_Registers; - case Discriminent is - when Mode_1 => - -- Bootloader start address. - BOOTLOADERADDR : aliased nrf51.UInt32; - when Mode_2 => - -- Reserved for Nordic firmware design. - NRFFW : aliased NRFFW_Registers; - end case; - end record - with Unchecked_Union, Volatile; - - for UICR_Peripheral use record - CLENR0 at 16#0# range 0 .. 31; - RBPCONF at 16#4# range 0 .. 31; - XTALFREQ at 16#8# range 0 .. 31; - FWID at 16#10# range 0 .. 31; - NRFHW at 16#50# range 0 .. 383; - CUSTOMER at 16#80# range 0 .. 1023; - BOOTLOADERADDR at 16#14# range 0 .. 31; - NRFFW at 16#14# range 0 .. 479; - end record; - - -- User Information Configuration. - UICR_Periph : aliased UICR_Peripheral - with Import, Address => UICR_Base; - -end nrf51.UICR; diff --git a/microbit/nrf51/nrf51-wdt.ads b/microbit/nrf51/nrf51-wdt.ads deleted file mode 100644 index 73f461d..0000000 --- a/microbit/nrf51/nrf51-wdt.ads +++ /dev/null @@ -1,521 +0,0 @@ -pragma Ada_2012; -pragma Style_Checks (Off); - --- Copyright (c) 2013, Nordic Semiconductor ASA --- All rights reserved. --- --- Redistribution and use in source and binary forms, with or without --- modification, are permitted provided that the following conditions are met: --- --- * Redistributions of source code must retain the above copyright notice, this --- list of conditions and the following disclaimer. --- --- * Redistributions in binary form must reproduce the above copyright notice, --- this list of conditions and the following disclaimer in the documentation --- and/or other materials provided with the distribution. --- --- * Neither the name of Nordic Semiconductor ASA nor the names of its --- contributors may be used to endorse or promote products derived from --- this software without specific prior written permission. --- --- THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" --- AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE --- IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE --- DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE --- FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL --- DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR --- SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER --- CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, --- OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE --- OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. --- - --- This spec has been automatically generated from nrf51.svd - -pragma Restrictions (No_Elaboration_Code); - -with System; - -package nrf51.WDT is - pragma Preelaborate; - - --------------- - -- Registers -- - --------------- - - -- Enable interrupt on TIMEOUT event. - type INTENSET_TIMEOUT_Field is - (-- Interrupt disabled. - Disabled, - -- Interrupt enabled. - Enabled) - with Size => 1; - for INTENSET_TIMEOUT_Field use - (Disabled => 0, - Enabled => 1); - - -- Enable interrupt on TIMEOUT event. - type INTENSET_TIMEOUT_Field_1 is - (-- Reset value for the field - Intenset_Timeout_Field_Reset, - -- Enable interrupt on write. - Set) - with Size => 1; - for INTENSET_TIMEOUT_Field_1 use - (Intenset_Timeout_Field_Reset => 0, - Set => 1); - - -- Interrupt enable set register. - type INTENSET_Register is record - -- Enable interrupt on TIMEOUT event. - TIMEOUT : INTENSET_TIMEOUT_Field_1 := - Intenset_Timeout_Field_Reset; - -- unspecified - Reserved_1_31 : nrf51.UInt31 := 16#0#; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for INTENSET_Register use record - TIMEOUT at 0 range 0 .. 0; - Reserved_1_31 at 0 range 1 .. 31; - end record; - - -- Disable interrupt on TIMEOUT event. - type INTENCLR_TIMEOUT_Field is - (-- Interrupt disabled. - Disabled, - -- Interrupt enabled. - Enabled) - with Size => 1; - for INTENCLR_TIMEOUT_Field use - (Disabled => 0, - Enabled => 1); - - -- Disable interrupt on TIMEOUT event. - type INTENCLR_TIMEOUT_Field_1 is - (-- Reset value for the field - Intenclr_Timeout_Field_Reset, - -- Disable interrupt on write. - Clear) - with Size => 1; - for INTENCLR_TIMEOUT_Field_1 use - (Intenclr_Timeout_Field_Reset => 0, - Clear => 1); - - -- Interrupt enable clear register. - type INTENCLR_Register is record - -- Disable interrupt on TIMEOUT event. - TIMEOUT : INTENCLR_TIMEOUT_Field_1 := - Intenclr_Timeout_Field_Reset; - -- unspecified - Reserved_1_31 : nrf51.UInt31 := 16#0#; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for INTENCLR_Register use record - TIMEOUT at 0 range 0 .. 0; - Reserved_1_31 at 0 range 1 .. 31; - end record; - - -- Watchdog running status. - type RUNSTATUS_RUNSTATUS_Field is - (-- Watchdog timer is not running. - Notrunning, - -- Watchdog timer is running. - Running) - with Size => 1; - for RUNSTATUS_RUNSTATUS_Field use - (Notrunning => 0, - Running => 1); - - -- Watchdog running status. - type RUNSTATUS_Register is record - -- Read-only. Watchdog running status. - RUNSTATUS : RUNSTATUS_RUNSTATUS_Field; - -- unspecified - Reserved_1_31 : nrf51.UInt31; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for RUNSTATUS_Register use record - RUNSTATUS at 0 range 0 .. 0; - Reserved_1_31 at 0 range 1 .. 31; - end record; - - -- Request status for RR[0]. - type REQSTATUS_RR0_Field is - (-- RR[0] register is not enabled or has already requested reload. - Disabledorrequested, - -- RR[0] register is enabled and has not jet requested. - Enabledandunrequested) - with Size => 1; - for REQSTATUS_RR0_Field use - (Disabledorrequested => 0, - Enabledandunrequested => 1); - - -- Request status for RR[1]. - type REQSTATUS_RR1_Field is - (-- RR[1] register is not enabled or has already requested reload. - Disabledorrequested, - -- RR[1] register is enabled and has not jet requested. - Enabledandunrequested) - with Size => 1; - for REQSTATUS_RR1_Field use - (Disabledorrequested => 0, - Enabledandunrequested => 1); - - -- Request status for RR[2]. - type REQSTATUS_RR2_Field is - (-- RR[2] register is not enabled or has already requested reload. - Disabledorrequested, - -- RR[2] register is enabled and has not jet requested. - Enabledandunrequested) - with Size => 1; - for REQSTATUS_RR2_Field use - (Disabledorrequested => 0, - Enabledandunrequested => 1); - - -- Request status for RR[3]. - type REQSTATUS_RR3_Field is - (-- RR[3] register is not enabled or has already requested reload. - Disabledorrequested, - -- RR[3] register is enabled and has not jet requested. - Enabledandunrequested) - with Size => 1; - for REQSTATUS_RR3_Field use - (Disabledorrequested => 0, - Enabledandunrequested => 1); - - -- Request status for RR[4]. - type REQSTATUS_RR4_Field is - (-- RR[4] register is not enabled or has already requested reload. - Disabledorrequested, - -- RR[4] register is enabled and has not jet requested. - Enabledandunrequested) - with Size => 1; - for REQSTATUS_RR4_Field use - (Disabledorrequested => 0, - Enabledandunrequested => 1); - - -- Request status for RR[5]. - type REQSTATUS_RR5_Field is - (-- RR[5] register is not enabled or has already requested reload. - Disabledorrequested, - -- RR[5] register is enabled and has not jet requested. - Enabledandunrequested) - with Size => 1; - for REQSTATUS_RR5_Field use - (Disabledorrequested => 0, - Enabledandunrequested => 1); - - -- Request status for RR[6]. - type REQSTATUS_RR6_Field is - (-- RR[6] register is not enabled or has already requested reload. - Disabledorrequested, - -- RR[6] register is enabled and has not jet requested. - Enabledandunrequested) - with Size => 1; - for REQSTATUS_RR6_Field use - (Disabledorrequested => 0, - Enabledandunrequested => 1); - - -- Request status for RR[7]. - type REQSTATUS_RR7_Field is - (-- RR[7] register is not enabled or has already requested reload. - Disabledorrequested, - -- RR[7] register is enabled and has not jet requested. - Enabledandunrequested) - with Size => 1; - for REQSTATUS_RR7_Field use - (Disabledorrequested => 0, - Enabledandunrequested => 1); - - -- Request status. - type REQSTATUS_Register is record - -- Read-only. Request status for RR[0]. - RR0 : REQSTATUS_RR0_Field; - -- Read-only. Request status for RR[1]. - RR1 : REQSTATUS_RR1_Field; - -- Read-only. Request status for RR[2]. - RR2 : REQSTATUS_RR2_Field; - -- Read-only. Request status for RR[3]. - RR3 : REQSTATUS_RR3_Field; - -- Read-only. Request status for RR[4]. - RR4 : REQSTATUS_RR4_Field; - -- Read-only. Request status for RR[5]. - RR5 : REQSTATUS_RR5_Field; - -- Read-only. Request status for RR[6]. - RR6 : REQSTATUS_RR6_Field; - -- Read-only. Request status for RR[7]. - RR7 : REQSTATUS_RR7_Field; - -- unspecified - Reserved_8_31 : nrf51.UInt24; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for REQSTATUS_Register use record - RR0 at 0 range 0 .. 0; - RR1 at 0 range 1 .. 1; - RR2 at 0 range 2 .. 2; - RR3 at 0 range 3 .. 3; - RR4 at 0 range 4 .. 4; - RR5 at 0 range 5 .. 5; - RR6 at 0 range 6 .. 6; - RR7 at 0 range 7 .. 7; - Reserved_8_31 at 0 range 8 .. 31; - end record; - - -- Enable or disable RR[0] register. - type RREN_RR0_Field is - (-- RR[0] register is disabled. - Disabled, - -- RR[0] register is enabled. - Enabled) - with Size => 1; - for RREN_RR0_Field use - (Disabled => 0, - Enabled => 1); - - -- Enable or disable RR[1] register. - type RREN_RR1_Field is - (-- RR[1] register is disabled. - Disabled, - -- RR[1] register is enabled. - Enabled) - with Size => 1; - for RREN_RR1_Field use - (Disabled => 0, - Enabled => 1); - - -- Enable or disable RR[2] register. - type RREN_RR2_Field is - (-- RR[2] register is disabled. - Disabled, - -- RR[2] register is enabled. - Enabled) - with Size => 1; - for RREN_RR2_Field use - (Disabled => 0, - Enabled => 1); - - -- Enable or disable RR[3] register. - type RREN_RR3_Field is - (-- RR[3] register is disabled. - Disabled, - -- RR[3] register is enabled. - Enabled) - with Size => 1; - for RREN_RR3_Field use - (Disabled => 0, - Enabled => 1); - - -- Enable or disable RR[4] register. - type RREN_RR4_Field is - (-- RR[4] register is disabled. - Disabled, - -- RR[4] register is enabled. - Enabled) - with Size => 1; - for RREN_RR4_Field use - (Disabled => 0, - Enabled => 1); - - -- Enable or disable RR[5] register. - type RREN_RR5_Field is - (-- RR[5] register is disabled. - Disabled, - -- RR[5] register is enabled. - Enabled) - with Size => 1; - for RREN_RR5_Field use - (Disabled => 0, - Enabled => 1); - - -- Enable or disable RR[6] register. - type RREN_RR6_Field is - (-- RR[6] register is disabled. - Disabled, - -- RR[6] register is enabled. - Enabled) - with Size => 1; - for RREN_RR6_Field use - (Disabled => 0, - Enabled => 1); - - -- Enable or disable RR[7] register. - type RREN_RR7_Field is - (-- RR[7] register is disabled. - Disabled, - -- RR[7] register is enabled. - Enabled) - with Size => 1; - for RREN_RR7_Field use - (Disabled => 0, - Enabled => 1); - - -- Reload request enable. - type RREN_Register is record - -- Enable or disable RR[0] register. - RR0 : RREN_RR0_Field := nrf51.WDT.Enabled; - -- Enable or disable RR[1] register. - RR1 : RREN_RR1_Field := nrf51.WDT.Disabled; - -- Enable or disable RR[2] register. - RR2 : RREN_RR2_Field := nrf51.WDT.Disabled; - -- Enable or disable RR[3] register. - RR3 : RREN_RR3_Field := nrf51.WDT.Disabled; - -- Enable or disable RR[4] register. - RR4 : RREN_RR4_Field := nrf51.WDT.Disabled; - -- Enable or disable RR[5] register. - RR5 : RREN_RR5_Field := nrf51.WDT.Disabled; - -- Enable or disable RR[6] register. - RR6 : RREN_RR6_Field := nrf51.WDT.Disabled; - -- Enable or disable RR[7] register. - RR7 : RREN_RR7_Field := nrf51.WDT.Disabled; - -- unspecified - Reserved_8_31 : nrf51.UInt24 := 16#0#; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for RREN_Register use record - RR0 at 0 range 0 .. 0; - RR1 at 0 range 1 .. 1; - RR2 at 0 range 2 .. 2; - RR3 at 0 range 3 .. 3; - RR4 at 0 range 4 .. 4; - RR5 at 0 range 5 .. 5; - RR6 at 0 range 6 .. 6; - RR7 at 0 range 7 .. 7; - Reserved_8_31 at 0 range 8 .. 31; - end record; - - -- Configure the watchdog to pause or not while the CPU is sleeping. - type CONFIG_SLEEP_Field is - (-- Pause watchdog while the CPU is asleep. - Pause, - -- Do not pause watchdog while the CPU is asleep. - Run) - with Size => 1; - for CONFIG_SLEEP_Field use - (Pause => 0, - Run => 1); - - -- Configure the watchdog to pause or not while the CPU is halted by the - -- debugger. - type CONFIG_HALT_Field is - (-- Pause watchdog while the CPU is halted by the debugger. - Pause, - -- Do not pause watchdog while the CPU is halted by the debugger. - Run) - with Size => 1; - for CONFIG_HALT_Field use - (Pause => 0, - Run => 1); - - -- Configuration register. - type CONFIG_Register is record - -- Configure the watchdog to pause or not while the CPU is sleeping. - SLEEP : CONFIG_SLEEP_Field := nrf51.WDT.Run; - -- unspecified - Reserved_1_2 : nrf51.UInt2 := 16#0#; - -- Configure the watchdog to pause or not while the CPU is halted by the - -- debugger. - HALT : CONFIG_HALT_Field := nrf51.WDT.Pause; - -- unspecified - Reserved_4_31 : nrf51.UInt28 := 16#0#; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for CONFIG_Register use record - SLEEP at 0 range 0 .. 0; - Reserved_1_2 at 0 range 1 .. 2; - HALT at 0 range 3 .. 3; - Reserved_4_31 at 0 range 4 .. 31; - end record; - - -- Reload requests registers. - - -- Reload requests registers. - type RR_Registers is array (0 .. 7) of nrf51.UInt32; - - -- Peripheral power control. - type POWER_POWER_Field is - (-- Module power disabled. - Disabled, - -- Module power enabled. - Enabled) - with Size => 1; - for POWER_POWER_Field use - (Disabled => 0, - Enabled => 1); - - -- Peripheral power control. - type POWER_Register is record - -- Peripheral power control. - POWER : POWER_POWER_Field := nrf51.WDT.Disabled; - -- unspecified - Reserved_1_31 : nrf51.UInt31 := 16#0#; - end record - with Volatile_Full_Access, Object_Size => 32, - Bit_Order => System.Low_Order_First; - - for POWER_Register use record - POWER at 0 range 0 .. 0; - Reserved_1_31 at 0 range 1 .. 31; - end record; - - ----------------- - -- Peripherals -- - ----------------- - - -- Watchdog Timer. - type WDT_Peripheral is record - -- Start the watchdog. - TASKS_START : aliased nrf51.UInt32; - -- Watchdog timeout. - EVENTS_TIMEOUT : aliased nrf51.UInt32; - -- Interrupt enable set register. - INTENSET : aliased INTENSET_Register; - -- Interrupt enable clear register. - INTENCLR : aliased INTENCLR_Register; - -- Watchdog running status. - RUNSTATUS : aliased RUNSTATUS_Register; - -- Request status. - REQSTATUS : aliased REQSTATUS_Register; - -- Counter reload value in number of 32kiHz clock cycles. - CRV : aliased nrf51.UInt32; - -- Reload request enable. - RREN : aliased RREN_Register; - -- Configuration register. - CONFIG : aliased CONFIG_Register; - -- Reload requests registers. - RR : aliased RR_Registers; - -- Peripheral power control. - POWER : aliased POWER_Register; - end record - with Volatile; - - for WDT_Peripheral use record - TASKS_START at 16#0# range 0 .. 31; - EVENTS_TIMEOUT at 16#100# range 0 .. 31; - INTENSET at 16#304# range 0 .. 31; - INTENCLR at 16#308# range 0 .. 31; - RUNSTATUS at 16#400# range 0 .. 31; - REQSTATUS at 16#404# range 0 .. 31; - CRV at 16#504# range 0 .. 31; - RREN at 16#508# range 0 .. 31; - CONFIG at 16#50C# range 0 .. 31; - RR at 16#600# range 0 .. 255; - POWER at 16#FFC# range 0 .. 31; - end record; - - -- Watchdog Timer. - WDT_Periph : aliased WDT_Peripheral - with Import, Address => WDT_Base; - -end nrf51.WDT; From 4222b6a5fd05c8bd3edcff0f26833f2056cf90ad Mon Sep 17 00:00:00 2001 From: Simon Wright Date: Sat, 27 Mar 2021 15:28:11 +0000 Subject: [PATCH 06/10] Update for GCC 11. * arduino-due/build_runtime.gpr (Languages): add ASM. (Compiler): Hard_Fault_Handling now in s-harhan.adb. * microbit/build_runtime.gpr (Languages): add ASM. (Source_Dirs): remove nrf51. (Compiler): HardFault_Handling now in s-harhan.adb. * stm32f4/build_runtime.gpr (Compiler): HardFault_Handling now in s-harhan.adb. * stm32f429i/build_runtime.gpr (Languages): add ASM. (Compiler): HardFault_Handling now in s-harhan.adb. * arduino-due/adainclude/startup.adb (Dummy_Handler): removed. (Handler): removed. (Vectors): removed. * stm32f429i/adainclude/startup.adb: likewise. * microbit/adainclude/startup.adb: likewise. Removed commented-out sections. * arduino-due/adalib/due-flash.ld: what was .isr_vector moved to start of text. * microbit/adalib/nrf51.ld: likewise. * stm32f429i/adalib/stm32f429i-flash.ld: likewise. * stm32f4/adalib/stm32f407-flash.ld (_estack): define from origin & length of sram. * arduino-due/adainclude/interrupt_vectors.s: new. * microbit/adainclude/interrupt_vectors.s: new. * stm32f429i/adainclude/interrupt_vectors.s: new. * microbit/runtime.xml (Linker): force link of _isr_vector (no reference from startup.adb). * arduino-due/atsam3x8e/atsam3x8e-adc.ads, arduino-due/atsam3x8e/atsam3x8e-can.ads, arduino-due/atsam3x8e/atsam3x8e-chipid.ads, arduino-due/atsam3x8e/atsam3x8e-dacc.ads, arduino-due/atsam3x8e/atsam3x8e-dmac.ads, arduino-due/atsam3x8e/atsam3x8e-ebi.ads, arduino-due/atsam3x8e/atsam3x8e-efc.ads, arduino-due/atsam3x8e/atsam3x8e-emac.ads, arduino-due/atsam3x8e/atsam3x8e-hsmci.ads, arduino-due/atsam3x8e/atsam3x8e-matrix.ads, arduino-due/atsam3x8e/atsam3x8e-pio.ads, arduino-due/atsam3x8e/atsam3x8e-pmc.ads, arduino-due/atsam3x8e/atsam3x8e-pwm.ads, arduino-due/atsam3x8e/atsam3x8e-spi.ads, arduino-due/atsam3x8e/atsam3x8e-ssc.ads, arduino-due/atsam3x8e/atsam3x8e-sysc.ads, arduino-due/atsam3x8e/atsam3x8e-tc.ads, arduino-due/atsam3x8e/atsam3x8e-trng.ads, arduino-due/atsam3x8e/atsam3x8e-twi.ads, arduino-due/atsam3x8e/atsam3x8e-uart.ads, arduino-due/atsam3x8e/atsam3x8e-uotghs.ads, arduino-due/atsam3x8e/atsam3x8e-usart.ads, arduino-due/atsam3x8e/atsam3x8e.ads: regenerated. * arduino-due/adainclude/_init.c: removed. * arduino-due/adainclude/syscalls.c: removed. * arduino-due/adainclude/startup-set_up_clock.adb: capitalization to match newly-regenerated SVD specs. --- arduino-due/adainclude/_init.c | 37 - arduino-due/adainclude/interrupt_vectors.s | 71 ++ .../adainclude/startup-set_up_clock.adb | 8 +- arduino-due/adainclude/startup.adb | 56 +- arduino-due/adainclude/syscalls.c | 139 --- arduino-due/adalib/due-flash.ld | 17 +- arduino-due/atsam3x8e/atsam3x8e-adc.ads | 199 ++-- arduino-due/atsam3x8e/atsam3x8e-can.ads | 55 +- arduino-due/atsam3x8e/atsam3x8e-chipid.ads | 193 ++-- arduino-due/atsam3x8e/atsam3x8e-dacc.ads | 51 +- arduino-due/atsam3x8e/atsam3x8e-dmac.ads | 243 +++-- arduino-due/atsam3x8e/atsam3x8e-ebi.ads | 95 +- arduino-due/atsam3x8e/atsam3x8e-efc.ads | 73 +- arduino-due/atsam3x8e/atsam3x8e-emac.ads | 37 +- arduino-due/atsam3x8e/atsam3x8e-hsmci.ads | 177 ++-- arduino-due/atsam3x8e/atsam3x8e-matrix.ads | 1 - arduino-due/atsam3x8e/atsam3x8e-pio.ads | 1 - arduino-due/atsam3x8e/atsam3x8e-pmc.ads | 133 ++- arduino-due/atsam3x8e/atsam3x8e-pwm.ads | 69 +- arduino-due/atsam3x8e/atsam3x8e-spi.ads | 39 +- arduino-due/atsam3x8e/atsam3x8e-ssc.ads | 233 +++-- arduino-due/atsam3x8e/atsam3x8e-sysc.ads | 313 +++--- arduino-due/atsam3x8e/atsam3x8e-tc.ads | 903 +++++++++--------- arduino-due/atsam3x8e/atsam3x8e-trng.ads | 1 - arduino-due/atsam3x8e/atsam3x8e-twi.ads | 19 +- arduino-due/atsam3x8e/atsam3x8e-uart.ads | 41 +- arduino-due/atsam3x8e/atsam3x8e-uotghs.ads | 387 ++++---- arduino-due/atsam3x8e/atsam3x8e-usart.ads | 229 +++-- arduino-due/atsam3x8e/atsam3x8e.ads | 1 - arduino-due/build_runtime.gpr | 6 +- microbit/adainclude/interrupt_vectors.s | 78 ++ microbit/adainclude/startup.adb | 95 +- microbit/adalib/nrf51.ld | 15 +- microbit/build_runtime.gpr | 7 +- microbit/runtime.xml | 3 + stm32f4/adalib/stm32f407-flash.ld | 4 +- stm32f4/build_runtime.gpr | 2 +- stm32f429i/adainclude/interrupt_vectors.s | 71 ++ stm32f429i/adainclude/startup.adb | 58 +- stm32f429i/adalib/stm32f429i-flash.ld | 17 +- stm32f429i/build_runtime.gpr | 4 +- 41 files changed, 2035 insertions(+), 2146 deletions(-) delete mode 100644 arduino-due/adainclude/_init.c create mode 100644 arduino-due/adainclude/interrupt_vectors.s delete mode 100644 arduino-due/adainclude/syscalls.c create mode 100644 microbit/adainclude/interrupt_vectors.s create mode 100644 stm32f429i/adainclude/interrupt_vectors.s diff --git a/arduino-due/adainclude/_init.c b/arduino-due/adainclude/_init.c deleted file mode 100644 index 0e991aa..0000000 --- a/arduino-due/adainclude/_init.c +++ /dev/null @@ -1,37 +0,0 @@ -/* - * Copyright Simon Wright - * - * GNAT is free software; you can redistribute it and/or modify it - * under terms of the GNU General Public License as published by the - * Free Soft- ware Foundation; either version 3, or (at your option) - * any later ver- sion. GNAT is distributed in the hope that it will - * be useful, but WITH- OUT ANY WARRANTY; without even the implied - * warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. - * - * As a special exception under Section 7 of GPL version 3, you are - * granted additional permissions described in the GCC Runtime Library - * Exception, version 3.1, as published by the Free Software - * Foundation. - * - * You should have received a copy of the GNU General Public License - * and a copy of the GCC Runtime Library Exception along with this - * program; see the files COPYING3 and COPYING.RUNTIME respectively. - * If not, see . - */ - -#ifdef __cplusplus -extern "C" { -#endif - -/* - * This is needed because it's called by newlib's __libc_init_array, in init.c. - * A strong symbol will be provided in C++ code. - */ - -__attribute__((weak)) void _init(void) -{ -} - -#ifdef __cplusplus -} -#endif diff --git a/arduino-due/adainclude/interrupt_vectors.s b/arduino-due/adainclude/interrupt_vectors.s new file mode 100644 index 0000000..f04806f --- /dev/null +++ b/arduino-due/adainclude/interrupt_vectors.s @@ -0,0 +1,71 @@ + @ Copyright (C) 2021 Free Software Foundation, Inc. + + @ This file is part of the Cortex GNAT RTS project. This file is + @ free software; you can redistribute it and/or modify it under + @ terms of the GNU General Public License as published by the Free + @ Software Foundation; either version 3, or (at your option) any + @ later version. This file is distributed in the hope that it will + @ be useful, but WITHOUT ANY WARRANTY; without even the implied + @ warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. + + @ As a special exception under Section 7 of GPL version 3, you are + @ granted additional permissions described in the GCC Runtime + @ Library Exception, version 3.1, as published by the Free Software + @ Foundation. + + @ You should have received a copy of the GNU General Public License + @ and a copy of the GCC Runtime Library Exception along with this + @ program; see the files COPYING3 and COPYING.RUNTIME respectively. + @ If not, see . + + @ This is the Vector Table, described in 11057 23-mar-15, Chapter 10.6.4 + + @ The capitalized handlers are defined in startup.adb, using + @ weak symbols (they can't be defined here, unlike _fault, or + @ the linker satisfies the requirement immediately). + + .syntax unified + .cpu cortex-m4 + .thumb + + .text + .section .isr_vector + .align 2 + .global _isr_vector + .type _isr_vector, %object + +_isr_vector: + /* Startup */ + .word _estack /* top of stack, from linker script. */ + .word program_initialization /* entry point */ + + /* Cortex-M core interrupts */ + .word _fault /* -14 NMI. */ + .word HardFault_Handler /* -13 Hard fault. */ + .word _fault /* -12 Mem manage. */ + .word _fault /* -11 Bus fault. */ + .word _fault /* -10 Usage fault. */ + .word _fault /* -9 reserved. */ + .word _fault /* -8 reserved. */ + .word _fault /* -7 reserved. */ + .word _fault /* -6 reserved. */ + .word SVC_Handler /* -5 SVCall. */ + .word _fault /* -4 Breakpoint. */ + .word _fault /* -3 reserved. */ + .word PendSV_Handler /* -2 PendSV. */ + .word SysTick_Handler /* -1 Systick. */ + + /* MCU interrupts */ + .rept 45 /* 0 .. 44, standard */ + .word IRQ_Handler + .endr + + .size _isr_vector, . - _isr_vector + + .section .text + + .thumb_func + .type _fault, %function +_fault: b _fault + .size _fault, . - _fault + diff --git a/arduino-due/adainclude/startup-set_up_clock.adb b/arduino-due/adainclude/startup-set_up_clock.adb index 4deeba6..b3681b6 100644 --- a/arduino-due/adainclude/startup-set_up_clock.adb +++ b/arduino-due/adainclude/startup-set_up_clock.adb @@ -95,7 +95,7 @@ begin PMC_MCKR : PMC_MCKR_Register; begin -- Select Main Clock, PRES 0 (no prescaling) - PMC_Periph.PMC_MCKR := (CSS => Main_Clk, + PMC_Periph.PMC_MCKR := (CSS => MAIN_CLK, others => <>); -- Loop until ready loop @@ -104,7 +104,7 @@ begin -- Set PRES 8 PMC_MCKR := PMC_Periph.PMC_MCKR; - PMC_MCKR.PRES := Clk_8; + PMC_MCKR.PRES := CLK_8; PMC_Periph.PMC_MCKR := PMC_MCKR; -- Loop until ready loop @@ -115,7 +115,7 @@ begin -- Main_Clock above, as recommended -- Set PRES PMC_MCKR := PMC_Periph.PMC_MCKR; - PMC_MCKR.PRES := Clk_2; + PMC_MCKR.PRES := CLK_2; PMC_Periph.PMC_MCKR := PMC_MCKR; -- Loop until ready loop @@ -124,7 +124,7 @@ begin -- Set CSS PMC_MCKR := PMC_Periph.PMC_MCKR; - PMC_MCKR.CSS := Plla_Clk; + PMC_MCKR.CSS := PLLA_CLK; PMC_Periph.PMC_MCKR := PMC_MCKR; -- Loop until ready loop diff --git a/arduino-due/adainclude/startup.adb b/arduino-due/adainclude/startup.adb index cce6eab..e8bb562 100644 --- a/arduino-due/adainclude/startup.adb +++ b/arduino-due/adainclude/startup.adb @@ -1,4 +1,4 @@ --- Copyright (C) 2016-2018 Free Software Foundation, Inc. +-- Copyright (C) 2016-2021 Free Software Foundation, Inc. -- -- This file is part of the Cortex GNAT RTS project. This file is -- free software; you can redistribute it and/or modify it under @@ -18,7 +18,6 @@ -- program; see the files COPYING3 and COPYING.RUNTIME respectively. -- If not, see . -with Ada.Interrupts.Names; with Interfaces; with System.Machine_Code; with System.Parameters; @@ -91,6 +90,8 @@ package body Startup is -- _edata: the first address after read/write data in SRAM -- _sbss: the start of BSS (to be initialized to zero) -- _ebss: the first address after BSS. + -- + -- _isr_vector is set up in interrupt_vectors.s. use System.Storage_Elements; @@ -154,28 +155,19 @@ package body Startup is System.FreeRTOS.Tasks.Start_Scheduler; end Program_Initialization; - ------------------------- - -- Interrupt vectors -- - ------------------------- + -------------------------- + -- Interrupt Handlers -- + -------------------------- - -- Vector Table, 11057 23-Mar-15, Chapter 10.6.4 + -- The interrupt vector is set up in interrupt_vectors.s, using + -- the handlers defined here. - procedure Dummy_Handler; - procedure Dummy_Handler is - IPSR : Interfaces.Unsigned_32 - with Volatile; -- don't want it to be optimised away - begin - System.Machine_Code.Asm - ("mrs %0, ipsr", - Outputs => Interfaces.Unsigned_32'Asm_Output ("=r", IPSR), - Volatile => True); - loop - null; - end loop; - end Dummy_Handler; + -- These handlers are all defined as Weak so that they can be + -- replaced by real handlers at link time. - -- The remaining handlers are all defined as Weak so that they can - -- be replaced by real handlers at link time. + -- If we defined the weak handlers in interrupt_vectors.s, the + -- references would be satisfied internally and so couldn't be + -- replaced by the real handler. procedure HardFault_Handler with Export, Convention => Ada, External_Name => "HardFault_Handler"; @@ -187,6 +179,7 @@ package body Startup is end loop; end HardFault_Handler; + -- Provided by FreeRTOS. procedure SVC_Handler with Export, Convention => Ada, External_Name => "SVC_Handler"; pragma Weak_External (SVC_Handler); @@ -197,6 +190,7 @@ package body Startup is end loop; end SVC_Handler; + -- Provided by FreeRTOS. procedure PendSV_Handler with Export, Convention => Ada, External_Name => "PendSV_Handler"; pragma Weak_External (PendSV_Handler); @@ -207,6 +201,7 @@ package body Startup is end loop; end PendSV_Handler; + -- Provided by FreeRTOS. procedure SysTick_Handler with Export, Convention => Ada, External_Name => "SysTick_Handler"; pragma Weak_External (SysTick_Handler); @@ -235,23 +230,4 @@ package body Startup is end loop; end IRQ_Handler; - type Handler is access procedure; - - Vectors : array (-14 .. Ada.Interrupts.Names.CAN1_IRQ) of Handler := - (-9 .. -6 | -4 .. -3 => null, -- reserved - -14 => Dummy_Handler'Access, -- NMI - -13 => HardFault_Handler'Access, -- HardFault - -12 => Dummy_Handler'Access, -- MemManagement - -11 => Dummy_Handler'Access, -- BusFault - -10 => Dummy_Handler'Access, -- UsageFault - -5 => SVC_Handler'Access, -- SVCall - -2 => PendSV_Handler'Access, -- PendSV - -1 => SysTick_Handler'Access, -- SysTick - others => IRQ_Handler'Access) - with - Export, - Convention => Ada, - External_Name => "isr_vector"; - pragma Linker_Section (Vectors, ".isr_vector"); - end Startup; diff --git a/arduino-due/adainclude/syscalls.c b/arduino-due/adainclude/syscalls.c deleted file mode 100644 index 2cd98ac..0000000 --- a/arduino-due/adainclude/syscalls.c +++ /dev/null @@ -1,139 +0,0 @@ -// Copyright Simon Wright -// -// This package is free software; you can redistribute it and/or -// modify it under terms of the GNU General Public License as -// published by the Free Software Foundation; either version 3, or (at -// your option) any later version. It is distributed in the hope that -// it will be useful, but WITHOUT ANY WARRANTY; without even the -// implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR -// PURPOSE. -// -// As a special exception under Section 7 of GPL version 3, you are -// granted additional permissions described in the GCC Runtime Library -// Exception, version 3.1, as published by the Free Software -// Foundation. -// -// You should have received a copy of the GNU General Public License -// and a copy of the GCC Runtime Library Exception along with this -// program; see the files COPYING3 and COPYING.RUNTIME respectively. -// If not, see . - -// System calls for newlib. -// -// _getpid() returns 1. -// _isatty() returns 0. -// All others return -1. -// _read() and _write() with a negative file descriptor set errno to EINVAL. -// _sbrk() sets errno to ENOMEM. -// In all other cases, errno is set to ENOTSUP (not supported). - -#include -#include -#include - -int _getpid(void) -{ - return 1; -} - -int _kill(int pid, int sig) -{ - errno = ENOTSUP; - return -1; -} - -void _exit (int status) -{ - _kill(status, -1); - while (1) {} -} - -int _read (int file, char *ptr, int len) -{ - errno = file < 0 ? EINVAL : ENOTSUP; - return -1; -} - -int _write(int file, char *ptr, int len) -{ - errno = file < 0 ? EINVAL : ENOTSUP; - return -1; -} - -caddr_t _sbrk(int incr) -{ - errno = ENOMEM; - return (caddr_t)-1; -} - -int _close(int file) -{ - errno = ENOTSUP; - return -1; -} - - -int _fstat(int file, struct stat *st) -{ - errno = ENOTSUP; - return -1; -} - -int _isatty(int file) -{ - return 0; -} - -int _lseek(int file, int ptr, int dir) -{ - errno = ENOTSUP; - return -1; -} - -int _open(char *path, int flags, ...) -{ - errno = ENOTSUP; - return -1; -} - -int _wait(int *status) -{ - errno = ENOTSUP; - return -1; -} - -int _unlink(char *name) -{ - errno = ENOTSUP; - return -1; -} - -int _times(struct tms *buf) -{ - errno = ENOTSUP; - return -1; -} - -int _stat(char *file, struct stat *st) -{ - errno = ENOTSUP; - return -1; -} - -int _link(char *old, char *new) -{ - errno = ENOTSUP; - return -1; -} - -int _fork(void) -{ - errno = ENOTSUP; - return -1; -} - -int _execve(char *name, char **argv, char **env) -{ - errno = ENOTSUP; - return -1; -} diff --git a/arduino-due/adalib/due-flash.ld b/arduino-due/adalib/due-flash.ld index ea8af20..b527a94 100644 --- a/arduino-due/adalib/due-flash.ld +++ b/arduino-due/adalib/due-flash.ld @@ -1,6 +1,7 @@ /* The MIT License * * Copyright (c) 2007, 2008, 2009, 2010 Dado Sutter and Bogdan Marinescu + * Copyright (c) 2012-2021 Simon Wright * * Permission is hereby granted, free of charge, to any person obtaining * a copy of this software and associated documentation files (the @@ -48,20 +49,12 @@ MEMORY SECTIONS { - .isr_vector : + .text : { . = ALIGN(4); - _isr_vector = .; - LONG(_estack) - LONG(program_initialization + 1) - KEEP(*(.isr_vector)) - } > flash + *(.isr_vector) + . = ALIGN(512); - .text 0x00080100: - { - . = ALIGN(4); - /* _text = .; */ - /* PROVIDE(stext = .);*/ *(.text) *(.text.*) *(.gnu.linkonce.t.*) @@ -147,7 +140,7 @@ SECTIONS } >sram end = .; - PROVIDE( _estack = 0x20088000); + PROVIDE(_estack = ORIGIN(sram) + LENGTH(sram)); /DISCARD/ : { *(.note.GNU-stack) *(.gnu_debuglink) *(.gnu.lto_*) } diff --git a/arduino-due/atsam3x8e/atsam3x8e-adc.ads b/arduino-due/atsam3x8e/atsam3x8e-adc.ads index f187671..a04b891 100644 --- a/arduino-due/atsam3x8e/atsam3x8e-adc.ads +++ b/arduino-due/atsam3x8e/atsam3x8e-adc.ads @@ -1,4 +1,3 @@ -pragma Ada_2012; pragma Style_Checks (Off); -- This spec has been automatically generated from ATSAM3X8E.svd @@ -39,168 +38,168 @@ package ATSAM3X8E.ADC is type MR_TRGEN_Field is (-- Hardware triggers are disabled. Starting a conversion is only possible by -- software. - Dis, + DIS, -- Hardware trigger selected by TRGSEL field is enabled. - En) + EN) with Size => 1; for MR_TRGEN_Field use - (Dis => 0, - En => 1); + (DIS => 0, + EN => 1); -- Trigger Selection type MR_TRGSEL_Field is (-- External : ADCTRG - Adc_Trig0, + ADC_TRIG0, -- TIOA Output of the Timer Counter Channel 0 - Adc_Trig1, + ADC_TRIG1, -- TIOA Output of the Timer Counter Channel 1 - Adc_Trig2, + ADC_TRIG2, -- TIOA Output of the Timer Counter Channel 2 - Adc_Trig3, + ADC_TRIG3, -- PWM Event Line 0 - Adc_Trig4, + ADC_TRIG4, -- PWM Event Line 0 - Adc_Trig5) + ADC_TRIG5) with Size => 3; for MR_TRGSEL_Field use - (Adc_Trig0 => 0, - Adc_Trig1 => 1, - Adc_Trig2 => 2, - Adc_Trig3 => 3, - Adc_Trig4 => 4, - Adc_Trig5 => 5); + (ADC_TRIG0 => 0, + ADC_TRIG1 => 1, + ADC_TRIG2 => 2, + ADC_TRIG3 => 3, + ADC_TRIG4 => 4, + ADC_TRIG5 => 5); -- Resolution type MR_LOWRES_Field is (-- 12-bit resolution - Bits_12, + BITS_12, -- 10-bit resolution - Bits_10) + BITS_10) with Size => 1; for MR_LOWRES_Field use - (Bits_12 => 0, - Bits_10 => 1); + (BITS_12 => 0, + BITS_10 => 1); -- Sleep Mode type MR_SLEEP_Field is (-- Normal Mode: The ADC Core and reference voltage circuitry are kept ON -- between conversions - Normal, + NORMAL, -- Sleep Mode: The ADC Core and reference voltage circuitry are OFF between -- conversions - Sleep) + SLEEP) with Size => 1; for MR_SLEEP_Field use - (Normal => 0, - Sleep => 1); + (NORMAL => 0, + SLEEP => 1); -- Fast Wake Up type MR_FWUP_Field is (-- Normal Sleep Mode: The sleep mode is defined by the SLEEP bit - Off, + OFF, -- Fast Wake Up Sleep Mode: The Voltage reference is ON between conversions -- and ADC Core is OFF - On) + ON) with Size => 1; for MR_FWUP_Field use - (Off => 0, - On => 1); + (OFF => 0, + ON => 1); -- Free Run Mode type MR_FREERUN_Field is (-- Normal Mode - Off, + OFF, -- Free Run Mode: Never wait for any trigger. - On) + ON) with Size => 1; for MR_FREERUN_Field use - (Off => 0, - On => 1); + (OFF => 0, + ON => 1); subtype ADC_MR_PRESCAL_Field is ATSAM3X8E.Byte; -- Start Up Time type MR_STARTUP_Field is (-- 0 periods of ADCClock - Sut0, + SUT0, -- 8 periods of ADCClock - Sut8, + SUT8, -- 16 periods of ADCClock - Sut16, + SUT16, -- 24 periods of ADCClock - Sut24, + SUT24, -- 64 periods of ADCClock - Sut64, + SUT64, -- 80 periods of ADCClock - Sut80, + SUT80, -- 96 periods of ADCClock - Sut96, + SUT96, -- 112 periods of ADCClock - Sut112, + SUT112, -- 512 periods of ADCClock - Sut512, + SUT512, -- 576 periods of ADCClock - Sut576, + SUT576, -- 640 periods of ADCClock - Sut640, + SUT640, -- 704 periods of ADCClock - Sut704, + SUT704, -- 768 periods of ADCClock - Sut768, + SUT768, -- 832 periods of ADCClock - Sut832, + SUT832, -- 896 periods of ADCClock - Sut896, + SUT896, -- 960 periods of ADCClock - Sut960) + SUT960) with Size => 4; for MR_STARTUP_Field use - (Sut0 => 0, - Sut8 => 1, - Sut16 => 2, - Sut24 => 3, - Sut64 => 4, - Sut80 => 5, - Sut96 => 6, - Sut112 => 7, - Sut512 => 8, - Sut576 => 9, - Sut640 => 10, - Sut704 => 11, - Sut768 => 12, - Sut832 => 13, - Sut896 => 14, - Sut960 => 15); + (SUT0 => 0, + SUT8 => 1, + SUT16 => 2, + SUT24 => 3, + SUT64 => 4, + SUT80 => 5, + SUT96 => 6, + SUT112 => 7, + SUT512 => 8, + SUT576 => 9, + SUT640 => 10, + SUT704 => 11, + SUT768 => 12, + SUT832 => 13, + SUT896 => 14, + SUT960 => 15); -- Analog Settling Time type MR_SETTLING_Field is (-- 3 periods of ADCClock - Ast3, + AST3, -- 5 periods of ADCClock - Ast5, + AST5, -- 9 periods of ADCClock - Ast9, + AST9, -- 17 periods of ADCClock - Ast17) + AST17) with Size => 2; for MR_SETTLING_Field use - (Ast3 => 0, - Ast5 => 1, - Ast9 => 2, - Ast17 => 3); + (AST3 => 0, + AST5 => 1, + AST9 => 2, + AST17 => 3); -- Analog Change type MR_ANACH_Field is (-- No analog change on channel switching: DIFF0, GAIN0 and OFF0 are used for -- all channels - None, + NONE, -- Allows different analog settings for each channel. See ADC_CGR and ADC_COR -- Registers - Allowed) + ALLOWED) with Size => 1; for MR_ANACH_Field use - (None => 0, - Allowed => 1); + (NONE => 0, + ALLOWED => 1); subtype ADC_MR_TRACKTIM_Field is ATSAM3X8E.UInt4; subtype ADC_MR_TRANSFER_Field is ATSAM3X8E.UInt2; @@ -208,39 +207,39 @@ package ATSAM3X8E.ADC is -- Use Sequence Enable type MR_USEQ_Field is (-- Normal Mode: The controller converts channels in a simple numeric order. - Num_Order, + NUM_ORDER, -- User Sequence Mode: The sequence respects what is defined in ADC_SEQR1 and -- ADC_SEQR2 registers. - Reg_Order) + REG_ORDER) with Size => 1; for MR_USEQ_Field use - (Num_Order => 0, - Reg_Order => 1); + (NUM_ORDER => 0, + REG_ORDER => 1); -- Mode Register type ADC_MR_Register is record -- Trigger Enable - TRGEN : MR_TRGEN_Field := ATSAM3X8E.ADC.Dis; + TRGEN : MR_TRGEN_Field := ATSAM3X8E.ADC.DIS; -- Trigger Selection - TRGSEL : MR_TRGSEL_Field := ATSAM3X8E.ADC.Adc_Trig0; + TRGSEL : MR_TRGSEL_Field := ATSAM3X8E.ADC.ADC_TRIG0; -- Resolution - LOWRES : MR_LOWRES_Field := ATSAM3X8E.ADC.Bits_12; + LOWRES : MR_LOWRES_Field := ATSAM3X8E.ADC.BITS_12; -- Sleep Mode - SLEEP : MR_SLEEP_Field := ATSAM3X8E.ADC.Normal; + SLEEP : MR_SLEEP_Field := ATSAM3X8E.ADC.NORMAL; -- Fast Wake Up - FWUP : MR_FWUP_Field := ATSAM3X8E.ADC.Off; + FWUP : MR_FWUP_Field := ATSAM3X8E.ADC.OFF; -- Free Run Mode - FREERUN : MR_FREERUN_Field := ATSAM3X8E.ADC.Off; + FREERUN : MR_FREERUN_Field := ATSAM3X8E.ADC.OFF; -- Prescaler Rate Selection PRESCAL : ADC_MR_PRESCAL_Field := 16#0#; -- Start Up Time - STARTUP : MR_STARTUP_Field := ATSAM3X8E.ADC.Sut0; + STARTUP : MR_STARTUP_Field := ATSAM3X8E.ADC.SUT0; -- Analog Settling Time - SETTLING : MR_SETTLING_Field := ATSAM3X8E.ADC.Ast3; + SETTLING : MR_SETTLING_Field := ATSAM3X8E.ADC.AST3; -- unspecified Reserved_22_22 : ATSAM3X8E.Bit := 16#0#; -- Analog Change - ANACH : MR_ANACH_Field := ATSAM3X8E.ADC.None; + ANACH : MR_ANACH_Field := ATSAM3X8E.ADC.NONE; -- Tracking Time TRACKTIM : ADC_MR_TRACKTIM_Field := 16#0#; -- Transfer Period @@ -248,7 +247,7 @@ package ATSAM3X8E.ADC is -- unspecified Reserved_30_30 : ATSAM3X8E.Bit := 16#0#; -- Use Sequence Enable - USEQ : MR_USEQ_Field := ATSAM3X8E.ADC.Num_Order; + USEQ : MR_USEQ_Field := ATSAM3X8E.ADC.NUM_ORDER; end record with Object_Size => 32, Bit_Order => System.Low_Order_First; @@ -776,20 +775,20 @@ package ATSAM3X8E.ADC is type EMR_CMPMODE_Field is (-- Generates an event when the converted data is lower than the low threshold -- of the window. - Low, + LOW, -- Generates an event when the converted data is higher than the high -- threshold of the window. - High, + HIGH, -- Generates an event when the converted data is in the comparison window. - In_k, + IN_k, -- Generates an event when the converted data is out of the comparison window. - Out_k) + OUT_k) with Size => 2; for EMR_CMPMODE_Field use - (Low => 0, - High => 1, - In_k => 2, - Out_k => 3); + (LOW => 0, + HIGH => 1, + IN_k => 2, + OUT_k => 3); subtype ADC_EMR_CMPSEL_Field is ATSAM3X8E.UInt4; subtype ADC_EMR_CMPALL_Field is ATSAM3X8E.Bit; @@ -799,7 +798,7 @@ package ATSAM3X8E.ADC is -- Extended Mode Register type ADC_EMR_Register is record -- Comparison Mode - CMPMODE : EMR_CMPMODE_Field := ATSAM3X8E.ADC.Low; + CMPMODE : EMR_CMPMODE_Field := ATSAM3X8E.ADC.LOW; -- unspecified Reserved_2_3 : ATSAM3X8E.UInt2 := 16#0#; -- Comparison Selected Channel diff --git a/arduino-due/atsam3x8e/atsam3x8e-can.ads b/arduino-due/atsam3x8e/atsam3x8e-can.ads index 88bd233..0ec1460 100644 --- a/arduino-due/atsam3x8e/atsam3x8e-can.ads +++ b/arduino-due/atsam3x8e/atsam3x8e-can.ads @@ -1,4 +1,3 @@ -pragma Ada_2012; pragma Style_Checks (Off); -- This spec has been automatically generated from ATSAM3X8E.svd @@ -26,20 +25,20 @@ package ATSAM3X8E.CAN is -- Reception Synchronization Stage (not readable) type MR_RXSYNC_Field is (-- Rx Signal with Double Synchro Stages (2 Positive Edges) - Double_Pp, + DOUBLE_PP, -- Rx Signal with Double Synchro Stages (One Positive Edge and One Negative -- Edge) - Double_Pn, + DOUBLE_PN, -- Rx Signal with Single Synchro Stage (Positive Edge) - Single_P, + SINGLE_P, -- Rx Signal with No Synchro Stage - None) + NONE) with Size => 3; for MR_RXSYNC_Field use - (Double_Pp => 0, - Double_Pn => 1, - Single_P => 2, - None => 3); + (DOUBLE_PP => 0, + DOUBLE_PN => 1, + SINGLE_P => 2, + NONE => 3); -- Mode Register type CAN0_MR_Register is record @@ -62,7 +61,7 @@ package ATSAM3X8E.CAN is -- unspecified Reserved_8_23 : ATSAM3X8E.UInt16 := 16#0#; -- Reception Synchronization Stage (not readable) - RXSYNC : MR_RXSYNC_Field := ATSAM3X8E.CAN.Double_Pp; + RXSYNC : MR_RXSYNC_Field := ATSAM3X8E.CAN.DOUBLE_PP; -- unspecified Reserved_27_31 : ATSAM3X8E.UInt5 := 16#0#; end record @@ -488,14 +487,14 @@ package ATSAM3X8E.CAN is -- Sampling Mode type BR_SMP_Field is (-- The incoming bit stream is sampled once at sample point. - Once, + ONCE, -- The incoming bit stream is sampled three times with a period of a MCK clock -- period, centered on sample point. - Three) + THREE) with Size => 1; for BR_SMP_Field use - (Once => 0, - Three => 1); + (ONCE => 0, + THREE => 1); -- Baudrate Register type CAN0_BR_Register is record @@ -520,7 +519,7 @@ package ATSAM3X8E.CAN is -- unspecified Reserved_23_23 : ATSAM3X8E.Bit := 16#0#; -- Sampling Mode - SMP : BR_SMP_Field := ATSAM3X8E.CAN.Once; + SMP : BR_SMP_Field := ATSAM3X8E.CAN.ONCE; -- unspecified Reserved_25_31 : ATSAM3X8E.UInt7 := 16#0#; end record @@ -733,31 +732,31 @@ package ATSAM3X8E.CAN is type MMR0_MOT_Field is (-- Mailbox is disabled. This prevents receiving or transmitting any messages -- with this mailbox. - Mb_Disabled, + MB_DISABLED, -- Reception Mailbox. Mailbox is configured for reception. If a message is -- received while the mailbox data register is full, it is discarded. - Mb_Rx, + MB_RX, -- Reception mailbox with overwrite. Mailbox is configured for reception. If a -- message is received while the mailbox is full, it overwrites the previous -- message. - Mb_Rx_Overwrite, + MB_RX_OVERWRITE, -- Transmit mailbox. Mailbox is configured for transmission. - Mb_Tx, + MB_TX, -- Consumer Mailbox. Mailbox is configured in reception but behaves as a -- Transmit Mailbox, i.e., it sends a remote frame and waits for an answer. - Mb_Consumer, + MB_CONSUMER, -- Producer Mailbox. Mailbox is configured in transmission but also behaves -- like a reception mailbox, i.e., it waits to receive a Remote Frame before -- sending its contents. - Mb_Producer) + MB_PRODUCER) with Size => 3; for MMR0_MOT_Field use - (Mb_Disabled => 0, - Mb_Rx => 1, - Mb_Rx_Overwrite => 2, - Mb_Tx => 3, - Mb_Consumer => 4, - Mb_Producer => 5); + (MB_DISABLED => 0, + MB_RX => 1, + MB_RX_OVERWRITE => 2, + MB_TX => 3, + MB_CONSUMER => 4, + MB_PRODUCER => 5); -- Mailbox Mode Register (MB = 0) type MMR_Register is record @@ -768,7 +767,7 @@ package ATSAM3X8E.CAN is -- unspecified Reserved_20_23 : ATSAM3X8E.UInt4 := 16#0#; -- Mailbox Object Type - MOT : MMR0_MOT_Field := ATSAM3X8E.CAN.Mb_Disabled; + MOT : MMR0_MOT_Field := ATSAM3X8E.CAN.MB_DISABLED; -- unspecified Reserved_27_31 : ATSAM3X8E.UInt5 := 16#0#; end record diff --git a/arduino-due/atsam3x8e/atsam3x8e-chipid.ads b/arduino-due/atsam3x8e/atsam3x8e-chipid.ads index 749c8e8..5eca3dc 100644 --- a/arduino-due/atsam3x8e/atsam3x8e-chipid.ads +++ b/arduino-due/atsam3x8e/atsam3x8e-chipid.ads @@ -1,4 +1,3 @@ -pragma Ada_2012; pragma Style_Checks (Off); -- This spec has been automatically generated from ATSAM3X8E.svd @@ -20,33 +19,33 @@ package ATSAM3X8E.CHIPID is -- Embedded Processor type CIDR_EPROC_Field is (-- ARM946ES - Arm946Es, + ARM946ES, -- ARM7TDMI - Arm7Tdmi, + ARM7TDMI, -- Cortex-M3 - Cm3, + CM3, -- ARM920T - Arm920T, + ARM920T, -- ARM926EJS - Arm926Ejs, + ARM926EJS, -- Cortex-A5 - Ca5, + CA5, -- Cortex-M4 - Cm4) + CM4) with Size => 3; for CIDR_EPROC_Field use - (Arm946Es => 1, - Arm7Tdmi => 2, - Cm3 => 3, - Arm920T => 4, - Arm926Ejs => 5, - Ca5 => 6, - Cm4 => 7); + (ARM946ES => 1, + ARM7TDMI => 2, + CM3 => 3, + ARM920T => 4, + ARM926EJS => 5, + CA5 => 6, + CM4 => 7); -- Nonvolatile Program Memory Size type CIDR_NVPSIZ_Field is (-- None - None, + NONE, -- 8K bytes Val_8K, -- 16K bytes @@ -67,7 +66,7 @@ package ATSAM3X8E.CHIPID is Val_2048K) with Size => 4; for CIDR_NVPSIZ_Field use - (None => 0, + (NONE => 0, Val_8K => 1, Val_16K => 2, Val_32K => 3, @@ -158,132 +157,132 @@ package ATSAM3X8E.CHIPID is -- Architecture Identifier type CIDR_ARCH_Field is (-- AT91SAM9xx Series - At91Sam9XX, + AT91SAM9xx, -- AT91SAM9XExx Series - At91Sam9Xexx, + AT91SAM9XExx, -- AT91x34 Series - At91X34, + AT91x34, -- CAP7 Series - Cap7, + CAP7, -- CAP9 Series - Cap9, + CAP9, -- CAP11 Series - Cap11, + CAP11, -- AT91x40 Series - At91X40, + AT91x40, -- AT91x42 Series - At91X42, + AT91x42, -- AT91x55 Series - At91X55, + AT91x55, -- AT91SAM7Axx Series - At91Sam7Axx, + AT91SAM7Axx, -- AT91SAM7AQxx Series - At91Sam7Aqxx, + AT91SAM7AQxx, -- AT91x63 Series - At91X63, + AT91x63, -- AT91SAM7Sxx Series - At91Sam7Sxx, + AT91SAM7Sxx, -- AT91SAM7XCxx Series - At91Sam7Xcxx, + AT91SAM7XCxx, -- AT91SAM7SExx Series - At91Sam7Sexx, + AT91SAM7SExx, -- AT91SAM7Lxx Series - At91Sam7Lxx, + AT91SAM7Lxx, -- AT91SAM7Xxx Series - At91Sam7Xxx, + AT91SAM7Xxx, -- AT91SAM7SLxx Series - At91Sam7Slxx, + AT91SAM7SLxx, -- SAM3UxC Series (100-pin version) - Sam3Uxc, + SAM3UxC, -- SAM3UxE Series (144-pin version) - Sam3Uxe, + SAM3UxE, -- SAM3AxC/SAM4AxC Series (100-pin version) - Sam3Axc_Sam4Axc, + SAM3AxC_SAM4AxC, -- SAM3XxC/SAM4XxC Series (100-pin version) - Sam3Xxc_Sam4Xxc, + SAM3XxC_SAM4XxC, -- SAM3XxE/SAM4XxE Series (144-pin version) - Sam3Xxe_Sam4Xxe, + SAM3XxE_SAM4XxE, -- SAM3XxG/SAM4XxG Series (208/217-pin version) - Sam3Xxg_Sam4Xxg, + SAM3XxG_SAM4XxG, -- SAM3SxA/SAM4SxA Series (48-pin version) - Sam3Sxa_Sam4Sxa, + SAM3SxA_SAM4SxA, -- SAM3SxB/SAM4SxB Series (64-pin version) - Sam3Sxb_Sam4Sxb, + SAM3SxB_SAM4SxB, -- SAM3SxC/SAM4SxC Series (100-pin version) - Sam3Sxc_Sam4Sxc, + SAM3SxC_SAM4SxC, -- AT91x92 Series - At91X92, + AT91x92, -- SAM3NxA Series (48-pin version) - Sam3Nxa, + SAM3NxA, -- SAM3NxB Series (64-pin version) - Sam3Nxb, + SAM3NxB, -- SAM3NxC Series (100-pin version) - Sam3Nxc, + SAM3NxC, -- SAM3SDxB Series (64-pin version) - Sam3Sdxb, + SAM3SDxB, -- SAM3SDxC Series (100-pin version) - Sam3Sdxc, + SAM3SDxC, -- SAM5A - Sam5A, + SAM5A, -- AT75Cxx Series - At75Cxx) + AT75Cxx) with Size => 8; for CIDR_ARCH_Field use - (At91Sam9XX => 25, - At91Sam9Xexx => 41, - At91X34 => 52, - Cap7 => 55, - Cap9 => 57, - Cap11 => 59, - At91X40 => 64, - At91X42 => 66, - At91X55 => 85, - At91Sam7Axx => 96, - At91Sam7Aqxx => 97, - At91X63 => 99, - At91Sam7Sxx => 112, - At91Sam7Xcxx => 113, - At91Sam7Sexx => 114, - At91Sam7Lxx => 115, - At91Sam7Xxx => 117, - At91Sam7Slxx => 118, - Sam3Uxc => 128, - Sam3Uxe => 129, - Sam3Axc_Sam4Axc => 131, - Sam3Xxc_Sam4Xxc => 132, - Sam3Xxe_Sam4Xxe => 133, - Sam3Xxg_Sam4Xxg => 134, - Sam3Sxa_Sam4Sxa => 136, - Sam3Sxb_Sam4Sxb => 137, - Sam3Sxc_Sam4Sxc => 138, - At91X92 => 146, - Sam3Nxa => 147, - Sam3Nxb => 148, - Sam3Nxc => 149, - Sam3Sdxb => 153, - Sam3Sdxc => 154, - Sam5A => 165, - At75Cxx => 240); + (AT91SAM9xx => 25, + AT91SAM9XExx => 41, + AT91x34 => 52, + CAP7 => 55, + CAP9 => 57, + CAP11 => 59, + AT91x40 => 64, + AT91x42 => 66, + AT91x55 => 85, + AT91SAM7Axx => 96, + AT91SAM7AQxx => 97, + AT91x63 => 99, + AT91SAM7Sxx => 112, + AT91SAM7XCxx => 113, + AT91SAM7SExx => 114, + AT91SAM7Lxx => 115, + AT91SAM7Xxx => 117, + AT91SAM7SLxx => 118, + SAM3UxC => 128, + SAM3UxE => 129, + SAM3AxC_SAM4AxC => 131, + SAM3XxC_SAM4XxC => 132, + SAM3XxE_SAM4XxE => 133, + SAM3XxG_SAM4XxG => 134, + SAM3SxA_SAM4SxA => 136, + SAM3SxB_SAM4SxB => 137, + SAM3SxC_SAM4SxC => 138, + AT91x92 => 146, + SAM3NxA => 147, + SAM3NxB => 148, + SAM3NxC => 149, + SAM3SDxB => 153, + SAM3SDxC => 154, + SAM5A => 165, + AT75Cxx => 240); -- Nonvolatile Program Memory Type type CIDR_NVPTYP_Field is (-- ROM - Rom, + ROM, -- ROMless or on-chip Flash - Romless, + ROMLESS, -- Embedded Flash Memory - Flash, + FLASH, -- ROM and Embedded Flash MemoryNVPSIZ is ROM size NVPSIZ2 is Flash size - Rom_Flash, + ROM_FLASH, -- SRAM emulating ROM - Sram) + SRAM) with Size => 3; for CIDR_NVPTYP_Field use - (Rom => 0, - Romless => 1, - Flash => 2, - Rom_Flash => 3, - Sram => 4); + (ROM => 0, + ROMLESS => 1, + FLASH => 2, + ROM_FLASH => 3, + SRAM => 4); subtype CHIPID_CIDR_EXT_Field is ATSAM3X8E.Bit; diff --git a/arduino-due/atsam3x8e/atsam3x8e-dacc.ads b/arduino-due/atsam3x8e/atsam3x8e-dacc.ads index bf905f3..e96b061 100644 --- a/arduino-due/atsam3x8e/atsam3x8e-dacc.ads +++ b/arduino-due/atsam3x8e/atsam3x8e-dacc.ads @@ -1,4 +1,3 @@ -pragma Ada_2012; pragma Style_Checks (Off); -- This spec has been automatically generated from ATSAM3X8E.svd @@ -34,26 +33,26 @@ package ATSAM3X8E.DACC is -- Trigger Enable type MR_TRGEN_Field is (-- External trigger mode disabled. DACC in free running mode. - Dis, + DIS, -- External trigger mode enabled. - En) + EN) with Size => 1; for MR_TRGEN_Field use - (Dis => 0, - En => 1); + (DIS => 0, + EN => 1); subtype DACC_MR_TRGSEL_Field is ATSAM3X8E.UInt3; -- Word Transfer type MR_WORD_Field is (-- Half-Word transfer - Half, + HALF, -- Word Transfer - Word) + WORD) with Size => 1; for MR_WORD_Field use - (Half => 0, - Word => 1); + (HALF => 0, + WORD => 1); subtype DACC_MR_SLEEP_Field is ATSAM3X8E.Bit; subtype DACC_MR_FASTWKUP_Field is ATSAM3X8E.Bit; @@ -62,36 +61,36 @@ package ATSAM3X8E.DACC is -- User Channel Selection type MR_USER_SEL_Field is (-- Channel 0 - Channel0, + CHANNEL0, -- Channel 1 - Channel1) + CHANNEL1) with Size => 2; for MR_USER_SEL_Field use - (Channel0 => 0, - Channel1 => 1); + (CHANNEL0 => 0, + CHANNEL1 => 1); -- Tag Selection Mode type MR_TAG_Field is (-- Tag selection mode disabled. Using USER_SEL to select the channel for the -- conversion. - Dis, + DIS, -- Tag selection mode enabled - En) + EN) with Size => 1; for MR_TAG_Field use - (Dis => 0, - En => 1); + (DIS => 0, + EN => 1); -- Max Speed Mode type MR_MAXS_Field is (-- Normal Mode - Normal, + NORMAL, -- Max Speed Mode enabled - Maximum) + MAXIMUM) with Size => 1; for MR_MAXS_Field use - (Normal => 0, - Maximum => 1); + (NORMAL => 0, + MAXIMUM => 1); -- Startup Time Selection type MR_STARTUP_Field is @@ -197,11 +196,11 @@ package ATSAM3X8E.DACC is -- Mode Register type DACC_MR_Register is record -- Trigger Enable - TRGEN : MR_TRGEN_Field := ATSAM3X8E.DACC.Dis; + TRGEN : MR_TRGEN_Field := ATSAM3X8E.DACC.DIS; -- Trigger Selection TRGSEL : DACC_MR_TRGSEL_Field := 16#0#; -- Word Transfer - WORD : MR_WORD_Field := ATSAM3X8E.DACC.Half; + WORD : MR_WORD_Field := ATSAM3X8E.DACC.HALF; -- Sleep Mode SLEEP : DACC_MR_SLEEP_Field := 16#0#; -- Fast Wake up Mode @@ -211,13 +210,13 @@ package ATSAM3X8E.DACC is -- Refresh Period REFRESH : DACC_MR_REFRESH_Field := 16#0#; -- User Channel Selection - USER_SEL : MR_USER_SEL_Field := ATSAM3X8E.DACC.Channel0; + USER_SEL : MR_USER_SEL_Field := ATSAM3X8E.DACC.CHANNEL0; -- unspecified Reserved_18_19 : ATSAM3X8E.UInt2 := 16#0#; -- Tag Selection Mode - TAG : MR_TAG_Field := ATSAM3X8E.DACC.Dis; + TAG : MR_TAG_Field := ATSAM3X8E.DACC.DIS; -- Max Speed Mode - MAXS : MR_MAXS_Field := ATSAM3X8E.DACC.Normal; + MAXS : MR_MAXS_Field := ATSAM3X8E.DACC.NORMAL; -- unspecified Reserved_22_23 : ATSAM3X8E.UInt2 := 16#0#; -- Startup Time Selection diff --git a/arduino-due/atsam3x8e/atsam3x8e-dmac.ads b/arduino-due/atsam3x8e/atsam3x8e-dmac.ads index f89733b..63c4bee 100644 --- a/arduino-due/atsam3x8e/atsam3x8e-dmac.ads +++ b/arduino-due/atsam3x8e/atsam3x8e-dmac.ads @@ -1,4 +1,3 @@ -pragma Ada_2012; pragma Style_Checks (Off); -- This spec has been automatically generated from ATSAM3X8E.svd @@ -18,20 +17,20 @@ package ATSAM3X8E.DMAC is -- Arbiter Configuration type GCFG_ARB_CFG_Field is (-- Fixed priority arbiter. - Fixed, + FIXED, -- Modified round robin arbiter. - Round_Robin) + ROUND_ROBIN) with Size => 1; for GCFG_ARB_CFG_Field use - (Fixed => 0, - Round_Robin => 1); + (FIXED => 0, + ROUND_ROBIN => 1); -- DMAC Global Configuration Register type DMAC_GCFG_Register is record -- unspecified Reserved_0_3 : ATSAM3X8E.UInt4 := 16#0#; -- Arbiter Configuration - ARB_CFG : GCFG_ARB_CFG_Field := ATSAM3X8E.DMAC.Round_Robin; + ARB_CFG : GCFG_ARB_CFG_Field := ATSAM3X8E.DMAC.ROUND_ROBIN; -- unspecified Reserved_5_31 : ATSAM3X8E.UInt27 := 16#0#; end record @@ -1040,88 +1039,88 @@ package ATSAM3X8E.DMAC is -- Source Chunk Transfer Size. type CTRLA0_SCSIZE_Field is (-- 1 data transferred - Chk_1, + CHK_1, -- 4 data transferred - Chk_4, + CHK_4, -- 8 data transferred - Chk_8, + CHK_8, -- 16 data transferred - Chk_16, + CHK_16, -- 32 data transferred - Chk_32, + CHK_32, -- 64 data transferred - Chk_64, + CHK_64, -- 128 data transferred - Chk_128, + CHK_128, -- 256 data transferred - Chk_256) + CHK_256) with Size => 3; for CTRLA0_SCSIZE_Field use - (Chk_1 => 0, - Chk_4 => 1, - Chk_8 => 2, - Chk_16 => 3, - Chk_32 => 4, - Chk_64 => 5, - Chk_128 => 6, - Chk_256 => 7); + (CHK_1 => 0, + CHK_4 => 1, + CHK_8 => 2, + CHK_16 => 3, + CHK_32 => 4, + CHK_64 => 5, + CHK_128 => 6, + CHK_256 => 7); -- Destination Chunk Transfer Size type CTRLA0_DCSIZE_Field is (-- 1 data transferred - Chk_1, + CHK_1, -- 4 data transferred - Chk_4, + CHK_4, -- 8 data transferred - Chk_8, + CHK_8, -- 16 data transferred - Chk_16, + CHK_16, -- 32 data transferred - Chk_32, + CHK_32, -- 64 data transferred - Chk_64, + CHK_64, -- 128 data transferred - Chk_128, + CHK_128, -- 256 data transferred - Chk_256) + CHK_256) with Size => 3; for CTRLA0_DCSIZE_Field use - (Chk_1 => 0, - Chk_4 => 1, - Chk_8 => 2, - Chk_16 => 3, - Chk_32 => 4, - Chk_64 => 5, - Chk_128 => 6, - Chk_256 => 7); + (CHK_1 => 0, + CHK_4 => 1, + CHK_8 => 2, + CHK_16 => 3, + CHK_32 => 4, + CHK_64 => 5, + CHK_128 => 6, + CHK_256 => 7); -- Transfer Width for the Source type CTRLA0_SRC_WIDTH_Field is (-- the transfer size is set to 8-bit width - Byte, + BYTE, -- the transfer size is set to 16-bit width - Half_Word, + HALF_WORD, -- the transfer size is set to 32-bit width - Word) + WORD) with Size => 2; for CTRLA0_SRC_WIDTH_Field use - (Byte => 0, - Half_Word => 1, - Word => 2); + (BYTE => 0, + HALF_WORD => 1, + WORD => 2); -- Transfer Width for the Destination type CTRLA0_DST_WIDTH_Field is (-- the transfer size is set to 8-bit width - Byte, + BYTE, -- the transfer size is set to 16-bit width - Half_Word, + HALF_WORD, -- the transfer size is set to 32-bit width - Word) + WORD) with Size => 2; for CTRLA0_DST_WIDTH_Field use - (Byte => 0, - Half_Word => 1, - Word => 2); + (BYTE => 0, + HALF_WORD => 1, + WORD => 2); subtype CTRLA_DONE_Field is ATSAM3X8E.Bit; @@ -1130,19 +1129,19 @@ package ATSAM3X8E.DMAC is -- Buffer Transfer Size BTSIZE : CTRLA_BTSIZE_Field := 16#0#; -- Source Chunk Transfer Size. - SCSIZE : CTRLA0_SCSIZE_Field := ATSAM3X8E.DMAC.Chk_1; + SCSIZE : CTRLA0_SCSIZE_Field := ATSAM3X8E.DMAC.CHK_1; -- unspecified Reserved_19_19 : ATSAM3X8E.Bit := 16#0#; -- Destination Chunk Transfer Size - DCSIZE : CTRLA0_DCSIZE_Field := ATSAM3X8E.DMAC.Chk_1; + DCSIZE : CTRLA0_DCSIZE_Field := ATSAM3X8E.DMAC.CHK_1; -- unspecified Reserved_23_23 : ATSAM3X8E.Bit := 16#0#; -- Transfer Width for the Source - SRC_WIDTH : CTRLA0_SRC_WIDTH_Field := ATSAM3X8E.DMAC.Byte; + SRC_WIDTH : CTRLA0_SRC_WIDTH_Field := ATSAM3X8E.DMAC.BYTE; -- unspecified Reserved_26_27 : ATSAM3X8E.UInt2 := 16#0#; -- Transfer Width for the Destination - DST_WIDTH : CTRLA0_DST_WIDTH_Field := ATSAM3X8E.DMAC.Byte; + DST_WIDTH : CTRLA0_DST_WIDTH_Field := ATSAM3X8E.DMAC.BYTE; -- unspecified Reserved_30_30 : ATSAM3X8E.Bit := 16#0#; DONE : CTRLA_DONE_Field := 16#0#; @@ -1165,70 +1164,70 @@ package ATSAM3X8E.DMAC is -- Source Address Descriptor type CTRLB0_SRC_DSCR_Field is (-- Source address is updated when the descriptor is fetched from the memory. - Fetch_From_Mem, + FETCH_FROM_MEM, -- Buffer Descriptor Fetch operation is disabled for the source. - Fetch_Disable) + FETCH_DISABLE) with Size => 1; for CTRLB0_SRC_DSCR_Field use - (Fetch_From_Mem => 0, - Fetch_Disable => 1); + (FETCH_FROM_MEM => 0, + FETCH_DISABLE => 1); -- Destination Address Descriptor type CTRLB0_DST_DSCR_Field is (-- Destination address is updated when the descriptor is fetched from the -- memory. - Fetch_From_Mem, + FETCH_FROM_MEM, -- Buffer Descriptor Fetch operation is disabled for the destination. - Fetch_Disable) + FETCH_DISABLE) with Size => 1; for CTRLB0_DST_DSCR_Field use - (Fetch_From_Mem => 0, - Fetch_Disable => 1); + (FETCH_FROM_MEM => 0, + FETCH_DISABLE => 1); -- Flow Control type CTRLB0_FC_Field is (-- Memory-to-Memory Transfer DMAC is flow controller - Mem2Mem_Dma_Fc, + MEM2MEM_DMA_FC, -- Memory-to-Peripheral Transfer DMAC is flow controller - Mem2Per_Dma_Fc, + MEM2PER_DMA_FC, -- Peripheral-to-Memory Transfer DMAC is flow controller - Per2Mem_Dma_Fc, + PER2MEM_DMA_FC, -- Peripheral-to-Peripheral Transfer DMAC is flow controller - Per2Per_Dma_Fc) + PER2PER_DMA_FC) with Size => 3; for CTRLB0_FC_Field use - (Mem2Mem_Dma_Fc => 0, - Mem2Per_Dma_Fc => 1, - Per2Mem_Dma_Fc => 2, - Per2Per_Dma_Fc => 3); + (MEM2MEM_DMA_FC => 0, + MEM2PER_DMA_FC => 1, + PER2MEM_DMA_FC => 2, + PER2PER_DMA_FC => 3); -- Incrementing, Decrementing or Fixed Address for the Source type CTRLB0_SRC_INCR_Field is (-- The source address is incremented - Incrementing, + INCREMENTING, -- The source address is decremented - Decrementing, + DECREMENTING, -- The source address remains unchanged - Fixed) + FIXED) with Size => 2; for CTRLB0_SRC_INCR_Field use - (Incrementing => 0, - Decrementing => 1, - Fixed => 2); + (INCREMENTING => 0, + DECREMENTING => 1, + FIXED => 2); -- Incrementing, Decrementing or Fixed Address for the Destination type CTRLB0_DST_INCR_Field is (-- The destination address is incremented - Incrementing, + INCREMENTING, -- The destination address is decremented - Decrementing, + DECREMENTING, -- The destination address remains unchanged - Fixed) + FIXED) with Size => 2; for CTRLB0_DST_INCR_Field use - (Incrementing => 0, - Decrementing => 1, - Fixed => 2); + (INCREMENTING => 0, + DECREMENTING => 1, + FIXED => 2); subtype CTRLB_IEN_Field is ATSAM3X8E.Bit; @@ -1237,19 +1236,19 @@ package ATSAM3X8E.DMAC is -- unspecified Reserved_0_15 : ATSAM3X8E.UInt16 := 16#0#; -- Source Address Descriptor - SRC_DSCR : CTRLB0_SRC_DSCR_Field := ATSAM3X8E.DMAC.Fetch_From_Mem; + SRC_DSCR : CTRLB0_SRC_DSCR_Field := ATSAM3X8E.DMAC.FETCH_FROM_MEM; -- unspecified Reserved_17_19 : ATSAM3X8E.UInt3 := 16#0#; -- Destination Address Descriptor - DST_DSCR : CTRLB0_DST_DSCR_Field := ATSAM3X8E.DMAC.Fetch_From_Mem; + DST_DSCR : CTRLB0_DST_DSCR_Field := ATSAM3X8E.DMAC.FETCH_FROM_MEM; -- Flow Control - FC : CTRLB0_FC_Field := ATSAM3X8E.DMAC.Mem2Mem_Dma_Fc; + FC : CTRLB0_FC_Field := ATSAM3X8E.DMAC.MEM2MEM_DMA_FC; -- Incrementing, Decrementing or Fixed Address for the Source - SRC_INCR : CTRLB0_SRC_INCR_Field := ATSAM3X8E.DMAC.Incrementing; + SRC_INCR : CTRLB0_SRC_INCR_Field := ATSAM3X8E.DMAC.INCREMENTING; -- unspecified Reserved_26_27 : ATSAM3X8E.UInt2 := 16#0#; -- Incrementing, Decrementing or Fixed Address for the Destination - DST_INCR : CTRLB0_DST_INCR_Field := ATSAM3X8E.DMAC.Incrementing; + DST_INCR : CTRLB0_DST_INCR_Field := ATSAM3X8E.DMAC.INCREMENTING; IEN : CTRLB_IEN_Field := 16#0#; -- unspecified Reserved_31_31 : ATSAM3X8E.Bit := 16#0#; @@ -1275,69 +1274,69 @@ package ATSAM3X8E.DMAC is -- Software or Hardware Selection for the Source type CFG0_SRC_H2SEL_Field is (-- Software handshaking interface is used to trigger a transfer request. - Sw, + SW, -- Hardware handshaking interface is used to trigger a transfer request. - Hw) + HW) with Size => 1; for CFG0_SRC_H2SEL_Field use - (Sw => 0, - Hw => 1); + (SW => 0, + HW => 1); -- Software or Hardware Selection for the Destination type CFG0_DST_H2SEL_Field is (-- Software handshaking interface is used to trigger a transfer request. - Sw, + SW, -- Hardware handshaking interface is used to trigger a transfer request. - Hw) + HW) with Size => 1; for CFG0_DST_H2SEL_Field use - (Sw => 0, - Hw => 1); + (SW => 0, + HW => 1); -- Stop On Done type CFG0_SOD_Field is (-- STOP ON DONE disabled, the descriptor fetch operation ignores DONE Field of -- CTRLA register. - Disable, + DISABLE, -- STOP ON DONE activated, the DMAC module is automatically disabled if DONE -- FIELD is set to 1. - Enable) + ENABLE) with Size => 1; for CFG0_SOD_Field use - (Disable => 0, - Enable => 1); + (DISABLE => 0, + ENABLE => 1); -- Interface Lock type CFG0_LOCK_IF_Field is (-- Interface Lock capability is disabled - Disable, + DISABLE, -- Interface Lock capability is enabled - Enable) + ENABLE) with Size => 1; for CFG0_LOCK_IF_Field use - (Disable => 0, - Enable => 1); + (DISABLE => 0, + ENABLE => 1); -- Bus Lock type CFG0_LOCK_B_Field is (-- AHB Bus Locking capability is disabled. - Disable) + DISABLE) with Size => 1; for CFG0_LOCK_B_Field use - (Disable => 0); + (DISABLE => 0); -- Master Interface Arbiter Lock type CFG0_LOCK_IF_L_Field is (-- The Master Interface Arbiter is locked by the channel x for a chunk -- transfer. - Chunk, + CHUNK, -- The Master Interface Arbiter is locked by the channel x for a buffer -- transfer. - Buffer) + BUFFER) with Size => 1; for CFG0_LOCK_IF_L_Field use - (Chunk => 0, - Buffer => 1); + (CHUNK => 0, + BUFFER => 1); subtype CFG_AHB_PROT_Field is ATSAM3X8E.UInt3; @@ -1345,18 +1344,18 @@ package ATSAM3X8E.DMAC is type CFG0_FIFOCFG_Field is (-- The largest defined length AHB burst is performed on the destination AHB -- interface. - Alap_Cfg, + ALAP_CFG, -- When half FIFO size is available/filled, a source/destination request is -- serviced. - Half_Cfg, + HALF_CFG, -- When there is enough space/data available to perform a single AHB access, -- then the request is serviced. - Asap_Cfg) + ASAP_CFG) with Size => 2; for CFG0_FIFOCFG_Field use - (Alap_Cfg => 0, - Half_Cfg => 1, - Asap_Cfg => 2); + (ALAP_CFG => 0, + HALF_CFG => 1, + ASAP_CFG => 2); -- DMAC Channel Configuration Register (ch_num = 0) type CFG_Register is record @@ -1367,23 +1366,23 @@ package ATSAM3X8E.DMAC is -- unspecified Reserved_8_8 : ATSAM3X8E.Bit := 16#0#; -- Software or Hardware Selection for the Source - SRC_H2SEL : CFG0_SRC_H2SEL_Field := ATSAM3X8E.DMAC.Sw; + SRC_H2SEL : CFG0_SRC_H2SEL_Field := ATSAM3X8E.DMAC.SW; -- unspecified Reserved_10_12 : ATSAM3X8E.UInt3 := 16#0#; -- Software or Hardware Selection for the Destination - DST_H2SEL : CFG0_DST_H2SEL_Field := ATSAM3X8E.DMAC.Sw; + DST_H2SEL : CFG0_DST_H2SEL_Field := ATSAM3X8E.DMAC.SW; -- unspecified Reserved_14_15 : ATSAM3X8E.UInt2 := 16#0#; -- Stop On Done - SOD : CFG0_SOD_Field := ATSAM3X8E.DMAC.Disable; + SOD : CFG0_SOD_Field := ATSAM3X8E.DMAC.DISABLE; -- unspecified Reserved_17_19 : ATSAM3X8E.UInt3 := 16#0#; -- Interface Lock - LOCK_IF : CFG0_LOCK_IF_Field := ATSAM3X8E.DMAC.Disable; + LOCK_IF : CFG0_LOCK_IF_Field := ATSAM3X8E.DMAC.DISABLE; -- Bus Lock - LOCK_B : CFG0_LOCK_B_Field := ATSAM3X8E.DMAC.Disable; + LOCK_B : CFG0_LOCK_B_Field := ATSAM3X8E.DMAC.DISABLE; -- Master Interface Arbiter Lock - LOCK_IF_L : CFG0_LOCK_IF_L_Field := ATSAM3X8E.DMAC.Chunk; + LOCK_IF_L : CFG0_LOCK_IF_L_Field := ATSAM3X8E.DMAC.CHUNK; -- unspecified Reserved_23_23 : ATSAM3X8E.Bit := 16#0#; -- AHB Protection @@ -1391,7 +1390,7 @@ package ATSAM3X8E.DMAC is -- unspecified Reserved_27_27 : ATSAM3X8E.Bit := 16#0#; -- FIFO Configuration - FIFOCFG : CFG0_FIFOCFG_Field := ATSAM3X8E.DMAC.Alap_Cfg; + FIFOCFG : CFG0_FIFOCFG_Field := ATSAM3X8E.DMAC.ALAP_CFG; -- unspecified Reserved_30_31 : ATSAM3X8E.UInt2 := 16#0#; end record diff --git a/arduino-due/atsam3x8e/atsam3x8e-ebi.ads b/arduino-due/atsam3x8e/atsam3x8e-ebi.ads index 3012413..d21cd6e 100644 --- a/arduino-due/atsam3x8e/atsam3x8e-ebi.ads +++ b/arduino-due/atsam3x8e/atsam3x8e-ebi.ads @@ -1,4 +1,3 @@ -pragma Ada_2012; pragma Style_Checks (Off); -- This spec has been automatically generated from ATSAM3X8E.svd @@ -16,19 +15,19 @@ package ATSAM3X8E.EBI is type CFG_PAGESIZE_Field is (-- Main area 512 Bytes + Spare area 16 Bytes = 528 Bytes - Ps512_16, + PS512_16, -- Main area 1024 Bytes + Spare area 32 Bytes = 1056 Bytes - Ps1024_32, + PS1024_32, -- Main area 2048 Bytes + Spare area 64 Bytes = 2112 Bytes - Ps2048_64, + PS2048_64, -- Main area 4096 Bytes + Spare area 128 Bytes = 4224 Bytes - Ps4096_128) + PS4096_128) with Size => 2; for CFG_PAGESIZE_Field use - (Ps512_16 => 0, - Ps1024_32 => 1, - Ps2048_64 => 2, - Ps4096_128 => 3); + (PS512_16 => 0, + PS1024_32 => 1, + PS2048_64 => 2, + PS4096_128 => 3); subtype SMC_CFG_WSPARE_Field is ATSAM3X8E.Bit; subtype SMC_CFG_RSPARE_Field is ATSAM3X8E.Bit; @@ -67,7 +66,7 @@ package ATSAM3X8E.EBI is -- SMC NFC Configuration Register type SMC_CFG_Register is record - PAGESIZE : CFG_PAGESIZE_Field := ATSAM3X8E.EBI.Ps512_16; + PAGESIZE : CFG_PAGESIZE_Field := ATSAM3X8E.EBI.PS512_16; -- unspecified Reserved_2_7 : ATSAM3X8E.UInt6 := 16#0#; -- Write Spare Area @@ -430,25 +429,25 @@ package ATSAM3X8E.EBI is -- ECC Page Size type ECC_MD_ECC_PAGESIZE_Field is (-- Main area 512 Bytes + Spare area 16 Bytes = 528 Bytes - Ps512_16, + PS512_16, -- Main area 1024 Bytes + Spare area 32 Bytes = 1056 Bytes - Ps1024_32, + PS1024_32, -- Main area 2048 Bytes + Spare area 64 Bytes = 2112 Bytes - Ps2048_64, + PS2048_64, -- Main area 4096 Bytes + Spare area 128 Bytes = 4224 Bytes - Ps4096_128) + PS4096_128) with Size => 2; for ECC_MD_ECC_PAGESIZE_Field use - (Ps512_16 => 0, - Ps1024_32 => 1, - Ps2048_64 => 2, - Ps4096_128 => 3); + (PS512_16 => 0, + PS1024_32 => 1, + PS2048_64 => 2, + PS4096_128 => 3); -- Type of Correction type ECC_MD_TYPCORREC_Field is (-- 1 bit correction for a page of 512/1024/2048/4096 Bytes (for 8 or 16-bit -- NAND Flash) - Cpage, + CPAGE, -- 1 bit correction for 256 Bytes of data for a page of 512/2048/4096 bytes -- (for 8-bit NAND Flash only) C256B, @@ -457,18 +456,18 @@ package ATSAM3X8E.EBI is C512B) with Size => 2; for ECC_MD_TYPCORREC_Field use - (Cpage => 0, + (CPAGE => 0, C256B => 1, C512B => 2); -- SMC ECC Mode Register type SMC_ECC_MD_Register is record -- ECC Page Size - ECC_PAGESIZE : ECC_MD_ECC_PAGESIZE_Field := ATSAM3X8E.EBI.Ps512_16; + ECC_PAGESIZE : ECC_MD_ECC_PAGESIZE_Field := ATSAM3X8E.EBI.PS512_16; -- unspecified Reserved_2_3 : ATSAM3X8E.UInt2 := 16#0#; -- Type of Correction - TYPCORREC : ECC_MD_TYPCORREC_Field := ATSAM3X8E.EBI.Cpage; + TYPCORREC : ECC_MD_TYPCORREC_Field := ATSAM3X8E.EBI.CPAGE; -- unspecified Reserved_6_31 : ATSAM3X8E.UInt26 := 16#0#; end record @@ -1255,62 +1254,62 @@ package ATSAM3X8E.EBI is type MODE0_READ_MODE_Field is (-- The Read operation is controlled by the NCS signal. - Ncs_Ctrl, + NCS_CTRL, -- The Read operation is controlled by the NRD signal. - Nrd_Ctrl) + NRD_CTRL) with Size => 1; for MODE0_READ_MODE_Field use - (Ncs_Ctrl => 0, - Nrd_Ctrl => 1); + (NCS_CTRL => 0, + NRD_CTRL => 1); type MODE0_WRITE_MODE_Field is (-- The Write operation is controller by the NCS signal. - Ncs_Ctrl, + NCS_CTRL, -- The Write operation is controlled by the NWE signal. - Nwe_Ctrl) + NWE_CTRL) with Size => 1; for MODE0_WRITE_MODE_Field use - (Ncs_Ctrl => 0, - Nwe_Ctrl => 1); + (NCS_CTRL => 0, + NWE_CTRL => 1); -- NWAIT Mode type MODE0_EXNW_MODE_Field is (-- Disabled - Disabled, + DISABLED, -- Frozen Mode - Frozen, + FROZEN, -- Ready Mode - Ready) + READY) with Size => 2; for MODE0_EXNW_MODE_Field use - (Disabled => 0, - Frozen => 2, - Ready => 3); + (DISABLED => 0, + FROZEN => 2, + READY => 3); subtype MODE_BAT_Field is ATSAM3X8E.Bit; -- Data Bus Width type MODE0_DBW_Field is (-- 8-bit bus - Bit_8, + BIT_8, -- 16-bit bus - Bit_16) + BIT_16) with Size => 1; for MODE0_DBW_Field use - (Bit_8 => 0, - Bit_16 => 1); + (BIT_8 => 0, + BIT_16 => 1); subtype MODE_TDF_CYCLES_Field is ATSAM3X8E.UInt4; subtype MODE_TDF_MODE_Field is ATSAM3X8E.Bit; -- SMC Mode Register (CS_number = 0) type MODE_Register is record - READ_MODE : MODE0_READ_MODE_Field := ATSAM3X8E.EBI.Nrd_Ctrl; - WRITE_MODE : MODE0_WRITE_MODE_Field := ATSAM3X8E.EBI.Nwe_Ctrl; + READ_MODE : MODE0_READ_MODE_Field := ATSAM3X8E.EBI.NRD_CTRL; + WRITE_MODE : MODE0_WRITE_MODE_Field := ATSAM3X8E.EBI.NWE_CTRL; -- unspecified Reserved_2_3 : ATSAM3X8E.UInt2 := 16#0#; -- NWAIT Mode - EXNW_MODE : MODE0_EXNW_MODE_Field := ATSAM3X8E.EBI.Disabled; + EXNW_MODE : MODE0_EXNW_MODE_Field := ATSAM3X8E.EBI.DISABLED; -- unspecified Reserved_6_7 : ATSAM3X8E.UInt2 := 16#0#; -- Byte Access Type @@ -1318,7 +1317,7 @@ package ATSAM3X8E.EBI is -- unspecified Reserved_9_11 : ATSAM3X8E.UInt3 := 16#0#; -- Data Bus Width - DBW : MODE0_DBW_Field := ATSAM3X8E.EBI.Bit_8; + DBW : MODE0_DBW_Field := ATSAM3X8E.EBI.BIT_8; -- unspecified Reserved_13_15 : ATSAM3X8E.UInt3 := 16#0#; -- Data Float Time @@ -1414,8 +1413,8 @@ package ATSAM3X8E.EBI is type SMC_Disc is (Default, - W9Bit, - W8Bit); + W9BIT, + W8BIT); -- Static Memory Controller type SMC_Peripheral @@ -1640,14 +1639,14 @@ package ATSAM3X8E.EBI is -- SMC ECC parity 7 Register ECC_PR7 : aliased ECC_PR_Register; pragma Volatile_Full_Access (ECC_PR7); - when W9Bit => + when W9BIT => -- SMC ECC Parity 0 Register ECC_PR0_W9BIT : aliased SMC_ECC_PR0_W9BIT_Register; pragma Volatile_Full_Access (ECC_PR0_W9BIT); -- SMC ECC parity 1 Register ECC_PR1_W9BIT : aliased SMC_ECC_PR1_W9BIT_Register; pragma Volatile_Full_Access (ECC_PR1_W9BIT); - when W8Bit => + when W8BIT => -- SMC ECC Parity 0 Register ECC_PR0_W8BIT : aliased SMC_ECC_PR0_W8BIT_Register; pragma Volatile_Full_Access (ECC_PR0_W8BIT); diff --git a/arduino-due/atsam3x8e/atsam3x8e-efc.ads b/arduino-due/atsam3x8e/atsam3x8e-efc.ads index 677e4e9..1cf5af4 100644 --- a/arduino-due/atsam3x8e/atsam3x8e-efc.ads +++ b/arduino-due/atsam3x8e/atsam3x8e-efc.ads @@ -1,4 +1,3 @@ -pragma Ada_2012; pragma Style_Checks (Off); -- This spec has been automatically generated from ATSAM3X8E.svd @@ -54,76 +53,76 @@ package ATSAM3X8E.EFC is -- Flash Command type FCR_FCMD_Field is (-- Get Flash Descriptor - Getd, + GETD, -- Write page - Wp, + WP, -- Write page and lock - Wpl, + WPL, -- Erase page and write page - Ewp, + EWP, -- Erase page and write page then lock - Ewpl, + EWPL, -- Erase all - Ea, + EA, -- Set Lock Bit - Slb, + SLB, -- Clear Lock Bit - Clb, + CLB, -- Get Lock Bit - Glb, + GLB, -- Set GPNVM Bit - Sgpb, + SGPB, -- Clear GPNVM Bit - Cgpb, + CGPB, -- Get GPNVM Bit - Ggpb, + GGPB, -- Start Read Unique Identifier - Stui, + STUI, -- Stop Read Unique Identifier - Spui, + SPUI, -- Get CALIB Bit - Gcalb) + GCALB) with Size => 8; for FCR_FCMD_Field use - (Getd => 0, - Wp => 1, - Wpl => 2, - Ewp => 3, - Ewpl => 4, - Ea => 5, - Slb => 8, - Clb => 9, - Glb => 10, - Sgpb => 11, - Cgpb => 12, - Ggpb => 13, - Stui => 14, - Spui => 15, - Gcalb => 16); + (GETD => 0, + WP => 1, + WPL => 2, + EWP => 3, + EWPL => 4, + EA => 5, + SLB => 8, + CLB => 9, + GLB => 10, + SGPB => 11, + CGPB => 12, + GGPB => 13, + STUI => 14, + SPUI => 15, + GCALB => 16); subtype EFC0_FCR_FARG_Field is ATSAM3X8E.UInt16; -- Flash Writing Protection Key type FCR_FKEY_Field is (-- Reset value for the field - Fcr_Fkey_Field_Reset, + FCR_FKEY_Field_Reset, -- The 0x5A value enables the command defined by the bits of the register. If -- the field is written with a different value, the write is not performed and -- no action is started. - Passwd) + PASSWD) with Size => 8; for FCR_FKEY_Field use - (Fcr_Fkey_Field_Reset => 0, - Passwd => 90); + (FCR_FKEY_Field_Reset => 0, + PASSWD => 90); -- EEFC Flash Command Register type EFC0_FCR_Register is record -- Write-only. Flash Command - FCMD : FCR_FCMD_Field := ATSAM3X8E.EFC.Getd; + FCMD : FCR_FCMD_Field := ATSAM3X8E.EFC.GETD; -- Write-only. Flash Command Argument FARG : EFC0_FCR_FARG_Field := 16#0#; -- Write-only. Flash Writing Protection Key - FKEY : FCR_FKEY_Field := Fcr_Fkey_Field_Reset; + FKEY : FCR_FKEY_Field := FCR_FKEY_Field_Reset; end record with Object_Size => 32, Bit_Order => System.Low_Order_First; diff --git a/arduino-due/atsam3x8e/atsam3x8e-emac.ads b/arduino-due/atsam3x8e/atsam3x8e-emac.ads index c3c695c..4aea5d8 100644 --- a/arduino-due/atsam3x8e/atsam3x8e-emac.ads +++ b/arduino-due/atsam3x8e/atsam3x8e-emac.ads @@ -1,4 +1,3 @@ -pragma Ada_2012; pragma Style_Checks (Off); -- This spec has been automatically generated from ATSAM3X8E.svd @@ -83,19 +82,19 @@ package ATSAM3X8E.EMAC is -- MDC clock divider type NCFGR_CLK_Field is (-- MCK divided by 8 (MCK up to 20 MHz). - Mck_8, + MCK_8, -- MCK divided by 16 (MCK up to 40 MHz). - Mck_16, + MCK_16, -- MCK divided by 32 (MCK up to 80 MHz). - Mck_32, + MCK_32, -- MCK divided by 64 (MCK up to 160 MHz). - Mck_64) + MCK_64) with Size => 2; for NCFGR_CLK_Field use - (Mck_8 => 0, - Mck_16 => 1, - Mck_32 => 2, - Mck_64 => 3); + (MCK_8 => 0, + MCK_16 => 1, + MCK_32 => 2, + MCK_64 => 3); subtype EMAC_NCFGR_RTY_Field is ATSAM3X8E.Bit; subtype EMAC_NCFGR_PAE_Field is ATSAM3X8E.Bit; @@ -103,19 +102,19 @@ package ATSAM3X8E.EMAC is -- Receive Buffer Offset type NCFGR_RBOF_Field is (-- No offset from start of receive buffer. - Offset_0, + OFFSET_0, -- One-byte offset from start of receive buffer. - Offset_1, + OFFSET_1, -- Two-byte offset from start of receive buffer. - Offset_2, + OFFSET_2, -- Three-byte offset from start of receive buffer. - Offset_3) + OFFSET_3) with Size => 2; for NCFGR_RBOF_Field use - (Offset_0 => 0, - Offset_1 => 1, - Offset_2 => 2, - Offset_3 => 3); + (OFFSET_0 => 0, + OFFSET_1 => 1, + OFFSET_2 => 2, + OFFSET_3 => 3); subtype EMAC_NCFGR_RLCE_Field is ATSAM3X8E.Bit; subtype EMAC_NCFGR_DRFCS_Field is ATSAM3X8E.Bit; @@ -145,13 +144,13 @@ package ATSAM3X8E.EMAC is -- unspecified Reserved_9_9 : ATSAM3X8E.Bit := 16#0#; -- MDC clock divider - CLK : NCFGR_CLK_Field := ATSAM3X8E.EMAC.Mck_32; + CLK : NCFGR_CLK_Field := ATSAM3X8E.EMAC.MCK_32; -- Retry test RTY : EMAC_NCFGR_RTY_Field := 16#0#; -- Pause Enable PAE : EMAC_NCFGR_PAE_Field := 16#0#; -- Receive Buffer Offset - RBOF : NCFGR_RBOF_Field := ATSAM3X8E.EMAC.Offset_0; + RBOF : NCFGR_RBOF_Field := ATSAM3X8E.EMAC.OFFSET_0; -- Receive Length field Checking Enable RLCE : EMAC_NCFGR_RLCE_Field := 16#0#; -- Discard Receive FCS diff --git a/arduino-due/atsam3x8e/atsam3x8e-hsmci.ads b/arduino-due/atsam3x8e/atsam3x8e-hsmci.ads index d5d3fb5..1755895 100644 --- a/arduino-due/atsam3x8e/atsam3x8e-hsmci.ads +++ b/arduino-due/atsam3x8e/atsam3x8e-hsmci.ads @@ -1,4 +1,3 @@ -pragma Ada_2012; pragma Style_Checks (Off); -- This spec has been automatically generated from ATSAM3X8E.svd @@ -135,19 +134,19 @@ package ATSAM3X8E.HSMCI is -- SDCard/SDIO Slot type SDCR_SDCSEL_Field is (-- Slot A is selected. - Slota, + SLOTA, -- SDCARD/SDIO Slot B selected - Slotb, + SLOTB, -- - - Slotc, + SLOTC, -- - - Slotd) + SLOTD) with Size => 2; for SDCR_SDCSEL_Field use - (Slota => 0, - Slotb => 1, - Slotc => 2, - Slotd => 3); + (SLOTA => 0, + SLOTB => 1, + SLOTC => 2, + SLOTD => 3); -- SDCard/SDIO Bus Width type SDCR_SDCBUS_Field is @@ -166,7 +165,7 @@ package ATSAM3X8E.HSMCI is -- SD/SDIO Card Register type HSMCI_SDCR_Register is record -- SDCard/SDIO Slot - SDCSEL : SDCR_SDCSEL_Field := ATSAM3X8E.HSMCI.Slota; + SDCSEL : SDCR_SDCSEL_Field := ATSAM3X8E.HSMCI.SLOTA; -- unspecified Reserved_2_5 : ATSAM3X8E.UInt4 := 16#0#; -- SDCard/SDIO Bus Width @@ -188,63 +187,63 @@ package ATSAM3X8E.HSMCI is -- Response Type type CMDR_RSPTYP_Field is (-- No response. - Noresp, + NORESP, -- 48-bit response. - Val_48_Bit, + Val_48_BIT, -- 136-bit response. - Val_136_Bit, + Val_136_BIT, -- R1b response type R1B) with Size => 2; for CMDR_RSPTYP_Field use - (Noresp => 0, - Val_48_Bit => 1, - Val_136_Bit => 2, + (NORESP => 0, + Val_48_BIT => 1, + Val_136_BIT => 2, R1B => 3); -- Special Command type CMDR_SPCMD_Field is (-- Not a special CMD. - Std, + STD, -- Initialization CMD: 74 clock cycles for initialization sequence. - Init, + INIT, -- Synchronized CMD: Wait for the end of the current data block transfer -- before sending the pending command. - Sync, + SYNC, -- CE-ATA Completion Signal disable Command. The host cancels the ability for -- the device to return a command completion signal on the command line. - Ce_Ata, + CE_ATA, -- Interrupt command: Corresponds to the Interrupt Mode (CMD40). - It_Cmd, + IT_CMD, -- Interrupt response: Corresponds to the Interrupt Mode (CMD40). - It_Resp, + IT_RESP, -- Boot Operation Request. Start a boot operation mode, the host processor can -- read boot data from the MMC device directly. - Bor, + BOR, -- End Boot Operation. This command allows the host processor to terminate the -- boot operation mode. - Ebo) + EBO) with Size => 3; for CMDR_SPCMD_Field use - (Std => 0, - Init => 1, - Sync => 2, - Ce_Ata => 3, - It_Cmd => 4, - It_Resp => 5, - Bor => 6, - Ebo => 7); + (STD => 0, + INIT => 1, + SYNC => 2, + CE_ATA => 3, + IT_CMD => 4, + IT_RESP => 5, + BOR => 6, + EBO => 7); -- Open Drain Command type CMDR_OPDCMD_Field is (-- Push pull command. - Pushpull, + PUSHPULL, -- Open drain command. - Opendrain) + OPENDRAIN) with Size => 1; for CMDR_OPDCMD_Field use - (Pushpull => 0, - Opendrain => 1); + (PUSHPULL => 0, + OPENDRAIN => 1); -- Max Latency for Command to Response type CMDR_MAXLAT_Field is @@ -260,73 +259,73 @@ package ATSAM3X8E.HSMCI is -- Transfer Command type CMDR_TRCMD_Field is (-- No data transfer - No_Data, + NO_DATA, -- Start data transfer - Start_Data, + START_DATA, -- Stop data transfer - Stop_Data) + STOP_DATA) with Size => 2; for CMDR_TRCMD_Field use - (No_Data => 0, - Start_Data => 1, - Stop_Data => 2); + (NO_DATA => 0, + START_DATA => 1, + STOP_DATA => 2); -- Transfer Direction type CMDR_TRDIR_Field is (-- Write. - Write, + WRITE, -- Read. - Read) + READ) with Size => 1; for CMDR_TRDIR_Field use - (Write => 0, - Read => 1); + (WRITE => 0, + READ => 1); -- Transfer Type type CMDR_TRTYP_Field is (-- MMC/SDCard Single Block - Single, + SINGLE, -- MMC/SDCard Multiple Block - Multiple, + MULTIPLE, -- MMC Stream - Stream, + STREAM, -- SDIO Byte - Byte, + BYTE, -- SDIO Block - Block) + BLOCK) with Size => 3; for CMDR_TRTYP_Field use - (Single => 0, - Multiple => 1, - Stream => 2, - Byte => 4, - Block => 5); + (SINGLE => 0, + MULTIPLE => 1, + STREAM => 2, + BYTE => 4, + BLOCK => 5); -- SDIO Special Command type CMDR_IOSPCMD_Field is (-- Not an SDIO Special Command - Std, + STD, -- SDIO Suspend Command - Suspend, + SUSPEND, -- SDIO Resume Command - Resume) + RESUME) with Size => 2; for CMDR_IOSPCMD_Field use - (Std => 0, - Suspend => 1, - Resume => 2); + (STD => 0, + SUSPEND => 1, + RESUME => 2); -- ATA with Command Completion Signal type CMDR_ATACS_Field is (-- Normal operation mode. - Normal, + NORMAL, -- This bit indicates that a completion signal is expected within a programmed -- amount of time (HSMCI_CSTOR). - Completion) + COMPLETION) with Size => 1; for CMDR_ATACS_Field use - (Normal => 0, - Completion => 1); + (NORMAL => 0, + COMPLETION => 1); subtype HSMCI_CMDR_BOOT_ACK_Field is ATSAM3X8E.Bit; @@ -335,27 +334,27 @@ package ATSAM3X8E.HSMCI is -- Write-only. Command Number CMDNB : HSMCI_CMDR_CMDNB_Field := 16#0#; -- Write-only. Response Type - RSPTYP : CMDR_RSPTYP_Field := ATSAM3X8E.HSMCI.Noresp; + RSPTYP : CMDR_RSPTYP_Field := ATSAM3X8E.HSMCI.NORESP; -- Write-only. Special Command - SPCMD : CMDR_SPCMD_Field := ATSAM3X8E.HSMCI.Std; + SPCMD : CMDR_SPCMD_Field := ATSAM3X8E.HSMCI.STD; -- Write-only. Open Drain Command - OPDCMD : CMDR_OPDCMD_Field := ATSAM3X8E.HSMCI.Pushpull; + OPDCMD : CMDR_OPDCMD_Field := ATSAM3X8E.HSMCI.PUSHPULL; -- Write-only. Max Latency for Command to Response MAXLAT : CMDR_MAXLAT_Field := ATSAM3X8E.HSMCI.Val_5; -- unspecified Reserved_13_15 : ATSAM3X8E.UInt3 := 16#0#; -- Write-only. Transfer Command - TRCMD : CMDR_TRCMD_Field := ATSAM3X8E.HSMCI.No_Data; + TRCMD : CMDR_TRCMD_Field := ATSAM3X8E.HSMCI.NO_DATA; -- Write-only. Transfer Direction - TRDIR : CMDR_TRDIR_Field := ATSAM3X8E.HSMCI.Write; + TRDIR : CMDR_TRDIR_Field := ATSAM3X8E.HSMCI.WRITE; -- Write-only. Transfer Type - TRTYP : CMDR_TRTYP_Field := ATSAM3X8E.HSMCI.Single; + TRTYP : CMDR_TRTYP_Field := ATSAM3X8E.HSMCI.SINGLE; -- unspecified Reserved_22_23 : ATSAM3X8E.UInt2 := 16#0#; -- Write-only. SDIO Special Command - IOSPCMD : CMDR_IOSPCMD_Field := ATSAM3X8E.HSMCI.Std; + IOSPCMD : CMDR_IOSPCMD_Field := ATSAM3X8E.HSMCI.STD; -- Write-only. ATA with Command Completion Signal - ATACS : CMDR_ATACS_Field := ATSAM3X8E.HSMCI.Normal; + ATACS : CMDR_ATACS_Field := ATSAM3X8E.HSMCI.NORMAL; -- Write-only. Boot Operation Acknowledge. BOOT_ACK : HSMCI_CMDR_BOOT_ACK_Field := 16#0#; -- unspecified @@ -384,25 +383,25 @@ package ATSAM3X8E.HSMCI is type BLKR_BCNT_Field is (-- MMC/SDCARD Multiple BlockFrom 1 to 65635: Value 0 corresponds to an -- infinite block transfer. - Multiple, + MULTIPLE, -- SDIO ByteFrom 1 to 512 bytes: Value 0 corresponds to a 512-byte -- transfer.Values from 0x200 to 0xFFFF are forbidden. - Byte, + BYTE, -- SDIO BlockFrom 1 to 511 blocks: Value 0 corresponds to an infinite block -- transfer.Values from 0x200 to 0xFFFF are forbidden. - Block) + BLOCK) with Size => 16; for BLKR_BCNT_Field use - (Multiple => 0, - Byte => 4, - Block => 5); + (MULTIPLE => 0, + BYTE => 4, + BLOCK => 5); subtype HSMCI_BLKR_BLKLEN_Field is ATSAM3X8E.UInt16; -- Block Register type HSMCI_BLKR_Register is record -- MMC/SDIO Block Count - SDIO Byte Count - BCNT : BLKR_BCNT_Field := ATSAM3X8E.HSMCI.Multiple; + BCNT : BLKR_BCNT_Field := ATSAM3X8E.HSMCI.MULTIPLE; -- Data Block Length BLKLEN : HSMCI_BLKR_BLKLEN_Field := 16#0#; end record @@ -1059,22 +1058,22 @@ package ATSAM3X8E.HSMCI is type WPSR_WP_VS_Field is (-- No Write Protection Violation occurred since the last read of this register -- (WP_SR) - None, + NONE, -- Write Protection detected unauthorized attempt to write a control register -- had occurred (since the last read.) - Write, + WRITE, -- Software reset had been performed while Write Protection was enabled (since -- the last read). - Reset, + RESET, -- Both Write Protection violation and software reset with Write Protection -- enabled have occurred since the last read. - Both) + BOTH) with Size => 4; for WPSR_WP_VS_Field use - (None => 0, - Write => 1, - Reset => 2, - Both => 3); + (NONE => 0, + WRITE => 1, + RESET => 2, + BOTH => 3); subtype HSMCI_WPSR_WP_VSRC_Field is ATSAM3X8E.UInt16; diff --git a/arduino-due/atsam3x8e/atsam3x8e-matrix.ads b/arduino-due/atsam3x8e/atsam3x8e-matrix.ads index 5ac8a1d..3fef7db 100644 --- a/arduino-due/atsam3x8e/atsam3x8e-matrix.ads +++ b/arduino-due/atsam3x8e/atsam3x8e-matrix.ads @@ -1,4 +1,3 @@ -pragma Ada_2012; pragma Style_Checks (Off); -- This spec has been automatically generated from ATSAM3X8E.svd diff --git a/arduino-due/atsam3x8e/atsam3x8e-pio.ads b/arduino-due/atsam3x8e/atsam3x8e-pio.ads index 49eb9b4..713288e 100644 --- a/arduino-due/atsam3x8e/atsam3x8e-pio.ads +++ b/arduino-due/atsam3x8e/atsam3x8e-pio.ads @@ -1,4 +1,3 @@ -pragma Ada_2012; pragma Style_Checks (Off); -- This spec has been automatically generated from ATSAM3X8E.svd diff --git a/arduino-due/atsam3x8e/atsam3x8e-pmc.ads b/arduino-due/atsam3x8e/atsam3x8e-pmc.ads index c4670c8..ca26253 100644 --- a/arduino-due/atsam3x8e/atsam3x8e-pmc.ads +++ b/arduino-due/atsam3x8e/atsam3x8e-pmc.ads @@ -1,4 +1,3 @@ -pragma Ada_2012; pragma Style_Checks (Off); -- This spec has been automatically generated from ATSAM3X8E.svd @@ -326,16 +325,16 @@ package ATSAM3X8E.PMC is -- Main On-Chip RC Oscillator Frequency Selection type CKGR_MOR_MOSCRCF_Field is (-- The Fast RC Oscillator Frequency is at 4 MHz (default) - Val_4_Mhz, + Val_4_MHz, -- The Fast RC Oscillator Frequency is at 8 MHz - Val_8_Mhz, + Val_8_MHz, -- The Fast RC Oscillator Frequency is at 12 MHz - Val_12_Mhz) + Val_12_MHz) with Size => 3; for CKGR_MOR_MOSCRCF_Field use - (Val_4_Mhz => 0, - Val_8_Mhz => 1, - Val_12_Mhz => 2); + (Val_4_MHz => 0, + Val_8_MHz => 1, + Val_12_MHz => 2); subtype CKGR_MOR_MOSCXTST_Field is ATSAM3X8E.Byte; subtype CKGR_MOR_KEY_Field is ATSAM3X8E.Byte; @@ -353,7 +352,7 @@ package ATSAM3X8E.PMC is -- Main On-Chip RC Oscillator Enable MOSCRCEN : CKGR_MOR_MOSCRCEN_Field := 16#0#; -- Main On-Chip RC Oscillator Frequency Selection - MOSCRCF : CKGR_MOR_MOSCRCF_Field := ATSAM3X8E.PMC.Val_4_Mhz; + MOSCRCF : CKGR_MOR_MOSCRCF_Field := ATSAM3X8E.PMC.Val_4_MHz; -- unspecified Reserved_7_7 : ATSAM3X8E.Bit := 16#0#; -- Main Crystal Oscillator Start-up Time @@ -440,48 +439,48 @@ package ATSAM3X8E.PMC is -- Master Clock Source Selection type PMC_MCKR_CSS_Field is (-- Slow Clock is selected - Slow_Clk, + SLOW_CLK, -- Main Clock is selected - Main_Clk, + MAIN_CLK, -- PLLA Clock is selected - Plla_Clk, + PLLA_CLK, -- UPLL Clock is selected - Upll_Clk) + UPLL_CLK) with Size => 2; for PMC_MCKR_CSS_Field use - (Slow_Clk => 0, - Main_Clk => 1, - Plla_Clk => 2, - Upll_Clk => 3); + (SLOW_CLK => 0, + MAIN_CLK => 1, + PLLA_CLK => 2, + UPLL_CLK => 3); -- Processor Clock Prescaler type PMC_MCKR_PRES_Field is (-- Selected clock - Clk_1, + CLK_1, -- Selected clock divided by 2 - Clk_2, + CLK_2, -- Selected clock divided by 4 - Clk_4, + CLK_4, -- Selected clock divided by 8 - Clk_8, + CLK_8, -- Selected clock divided by 16 - Clk_16, + CLK_16, -- Selected clock divided by 32 - Clk_32, + CLK_32, -- Selected clock divided by 64 - Clk_64, + CLK_64, -- Selected clock divided by 3 - Clk_3) + CLK_3) with Size => 3; for PMC_MCKR_PRES_Field use - (Clk_1 => 0, - Clk_2 => 1, - Clk_4 => 2, - Clk_8 => 3, - Clk_16 => 4, - Clk_32 => 5, - Clk_64 => 6, - Clk_3 => 7); + (CLK_1 => 0, + CLK_2 => 1, + CLK_4 => 2, + CLK_8 => 3, + CLK_16 => 4, + CLK_32 => 5, + CLK_64 => 6, + CLK_3 => 7); subtype PMC_MCKR_PLLADIV2_Field is ATSAM3X8E.Bit; subtype PMC_MCKR_UPLLDIV2_Field is ATSAM3X8E.Bit; @@ -489,11 +488,11 @@ package ATSAM3X8E.PMC is -- Master Clock Register type PMC_MCKR_Register is record -- Master Clock Source Selection - CSS : PMC_MCKR_CSS_Field := ATSAM3X8E.PMC.Main_Clk; + CSS : PMC_MCKR_CSS_Field := ATSAM3X8E.PMC.MAIN_CLK; -- unspecified Reserved_2_3 : ATSAM3X8E.UInt2 := 16#0#; -- Processor Clock Prescaler - PRES : PMC_MCKR_PRES_Field := ATSAM3X8E.PMC.Clk_1; + PRES : PMC_MCKR_PRES_Field := ATSAM3X8E.PMC.CLK_1; -- unspecified Reserved_7_11 : ATSAM3X8E.UInt5 := 16#0#; -- PLLA Divisor by 2 @@ -540,57 +539,57 @@ package ATSAM3X8E.PMC is -- Master Clock Source Selection type PMC_PCK_CSS_Field is (-- Slow Clock is selected - Slow_Clk, + SLOW_CLK, -- Main Clock is selected - Main_Clk, + MAIN_CLK, -- PLLA Clock is selected - Plla_Clk, + PLLA_CLK, -- UPLL Clock is selected - Upll_Clk, + UPLL_CLK, -- Master Clock is selected - Mck) + MCK) with Size => 3; for PMC_PCK_CSS_Field use - (Slow_Clk => 0, - Main_Clk => 1, - Plla_Clk => 2, - Upll_Clk => 3, - Mck => 4); + (SLOW_CLK => 0, + MAIN_CLK => 1, + PLLA_CLK => 2, + UPLL_CLK => 3, + MCK => 4); -- Programmable Clock Prescaler type PMC_PCK_PRES_Field is (-- Selected clock - Clk_1, + CLK_1, -- Selected clock divided by 2 - Clk_2, + CLK_2, -- Selected clock divided by 4 - Clk_4, + CLK_4, -- Selected clock divided by 8 - Clk_8, + CLK_8, -- Selected clock divided by 16 - Clk_16, + CLK_16, -- Selected clock divided by 32 - Clk_32, + CLK_32, -- Selected clock divided by 64 - Clk_64) + CLK_64) with Size => 3; for PMC_PCK_PRES_Field use - (Clk_1 => 0, - Clk_2 => 1, - Clk_4 => 2, - Clk_8 => 3, - Clk_16 => 4, - Clk_32 => 5, - Clk_64 => 6); + (CLK_1 => 0, + CLK_2 => 1, + CLK_4 => 2, + CLK_8 => 3, + CLK_16 => 4, + CLK_32 => 5, + CLK_64 => 6); -- Programmable Clock 0 Register type PMC_PCK_Register is record -- Master Clock Source Selection - CSS : PMC_PCK_CSS_Field := ATSAM3X8E.PMC.Slow_Clk; + CSS : PMC_PCK_CSS_Field := ATSAM3X8E.PMC.SLOW_CLK; -- unspecified Reserved_3_3 : ATSAM3X8E.Bit := 16#0#; -- Programmable Clock Prescaler - PRES : PMC_PCK_PRES_Field := ATSAM3X8E.PMC.Clk_1; + PRES : PMC_PCK_PRES_Field := ATSAM3X8E.PMC.CLK_1; -- unspecified Reserved_7_31 : ATSAM3X8E.UInt25 := 16#0#; end record @@ -1242,16 +1241,16 @@ package ATSAM3X8E.PMC is -- Divisor Value type PMC_PCR_DIV_Field is (-- Peripheral clock is MCK - Periph_Div_Mck, + PERIPH_DIV_MCK, -- Peripheral clock is MCK/2 - Periph_Div2_Mck, + PERIPH_DIV2_MCK, -- Peripheral clock is MCK/4 - Periph_Div4_Mck) + PERIPH_DIV4_MCK) with Size => 2; for PMC_PCR_DIV_Field use - (Periph_Div_Mck => 0, - Periph_Div2_Mck => 1, - Periph_Div4_Mck => 2); + (PERIPH_DIV_MCK => 0, + PERIPH_DIV2_MCK => 1, + PERIPH_DIV4_MCK => 2); subtype PMC_PCR_EN_Field is ATSAM3X8E.Bit; @@ -1266,7 +1265,7 @@ package ATSAM3X8E.PMC is -- unspecified Reserved_13_15 : ATSAM3X8E.UInt3 := 16#0#; -- Divisor Value - DIV : PMC_PCR_DIV_Field := ATSAM3X8E.PMC.Periph_Div_Mck; + DIV : PMC_PCR_DIV_Field := ATSAM3X8E.PMC.PERIPH_DIV_MCK; -- unspecified Reserved_18_27 : ATSAM3X8E.UInt10 := 16#0#; -- Enable diff --git a/arduino-due/atsam3x8e/atsam3x8e-pwm.ads b/arduino-due/atsam3x8e/atsam3x8e-pwm.ads index 6535c45..4238876 100644 --- a/arduino-due/atsam3x8e/atsam3x8e-pwm.ads +++ b/arduino-due/atsam3x8e/atsam3x8e-pwm.ads @@ -1,4 +1,3 @@ -pragma Ada_2012; pragma Style_Checks (Off); -- This spec has been automatically generated from ATSAM3X8E.svd @@ -504,18 +503,18 @@ package ATSAM3X8E.PWM is type SCM_UPDM_Field is (-- Manual write of double buffer registers and manual update of synchronous -- channels - Mode0, + MODE0, -- Manual write of double buffer registers and automatic update of synchronous -- channels - Mode1, + MODE1, -- Automatic write of duty-cycle update registers by the PDC and automatic -- update of synchronous channels - Mode2) + MODE2) with Size => 2; for SCM_UPDM_Field use - (Mode0 => 0, - Mode1 => 1, - Mode2 => 2); + (MODE0 => 0, + MODE1 => 1, + MODE2 => 2); subtype PWM_SCM_PTRM_Field is ATSAM3X8E.Bit; subtype PWM_SCM_PTRCS_Field is ATSAM3X8E.UInt3; @@ -528,7 +527,7 @@ package ATSAM3X8E.PWM is -- unspecified Reserved_8_15 : ATSAM3X8E.Byte := 16#0#; -- Synchronous Channels Update Mode - UPDM : SCM_UPDM_Field := ATSAM3X8E.PWM.Mode0; + UPDM : SCM_UPDM_Field := ATSAM3X8E.PWM.MODE0; -- unspecified Reserved_18_19 : ATSAM3X8E.UInt2 := 16#0#; -- PDC Transfer Request Mode @@ -2081,46 +2080,46 @@ package ATSAM3X8E.PWM is -- Channel Pre-scaler type CMR0_CPRE_Field is (-- Master clock - Mck, + MCK, -- Master clock/2 - Mck_Div_2, + MCK_DIV_2, -- Master clock/4 - Mck_Div_4, + MCK_DIV_4, -- Master clock/8 - Mck_Div_8, + MCK_DIV_8, -- Master clock/16 - Mck_Div_16, + MCK_DIV_16, -- Master clock/32 - Mck_Div_32, + MCK_DIV_32, -- Master clock/64 - Mck_Div_64, + MCK_DIV_64, -- Master clock/128 - Mck_Div_128, + MCK_DIV_128, -- Master clock/256 - Mck_Div_256, + MCK_DIV_256, -- Master clock/512 - Mck_Div_512, + MCK_DIV_512, -- Master clock/1024 - Mck_Div_1024, + MCK_DIV_1024, -- Clock A - Clka, + CLKA, -- Clock B - Clkb) + CLKB) with Size => 4; for CMR0_CPRE_Field use - (Mck => 0, - Mck_Div_2 => 1, - Mck_Div_4 => 2, - Mck_Div_8 => 3, - Mck_Div_16 => 4, - Mck_Div_32 => 5, - Mck_Div_64 => 6, - Mck_Div_128 => 7, - Mck_Div_256 => 8, - Mck_Div_512 => 9, - Mck_Div_1024 => 10, - Clka => 11, - Clkb => 12); + (MCK => 0, + MCK_DIV_2 => 1, + MCK_DIV_4 => 2, + MCK_DIV_8 => 3, + MCK_DIV_16 => 4, + MCK_DIV_32 => 5, + MCK_DIV_64 => 6, + MCK_DIV_128 => 7, + MCK_DIV_256 => 8, + MCK_DIV_512 => 9, + MCK_DIV_1024 => 10, + CLKA => 11, + CLKB => 12); subtype CMR_CALG_Field is ATSAM3X8E.Bit; subtype CMR_CPOL_Field is ATSAM3X8E.Bit; @@ -2132,7 +2131,7 @@ package ATSAM3X8E.PWM is -- PWM Channel Mode Register (ch_num = 0) type CMR_Register is record -- Channel Pre-scaler - CPRE : CMR0_CPRE_Field := ATSAM3X8E.PWM.Mck; + CPRE : CMR0_CPRE_Field := ATSAM3X8E.PWM.MCK; -- unspecified Reserved_4_7 : ATSAM3X8E.UInt4 := 16#0#; -- Channel Alignment diff --git a/arduino-due/atsam3x8e/atsam3x8e-spi.ads b/arduino-due/atsam3x8e/atsam3x8e-spi.ads index d362bb0..0ae9755 100644 --- a/arduino-due/atsam3x8e/atsam3x8e-spi.ads +++ b/arduino-due/atsam3x8e/atsam3x8e-spi.ads @@ -1,4 +1,3 @@ -pragma Ada_2012; pragma Style_Checks (Off); -- This spec has been automatically generated from ATSAM3X8E.svd @@ -335,34 +334,34 @@ package ATSAM3X8E.SPI is -- Bits Per Transfer type CSR_BITS_Field is (-- 8 bits for transfer - Val_8_Bit, + Val_8_BIT, -- 9 bits for transfer - Val_9_Bit, + Val_9_BIT, -- 10 bits for transfer - Val_10_Bit, + Val_10_BIT, -- 11 bits for transfer - Val_11_Bit, + Val_11_BIT, -- 12 bits for transfer - Val_12_Bit, + Val_12_BIT, -- 13 bits for transfer - Val_13_Bit, + Val_13_BIT, -- 14 bits for transfer - Val_14_Bit, + Val_14_BIT, -- 15 bits for transfer - Val_15_Bit, + Val_15_BIT, -- 16 bits for transfer - Val_16_Bit) + Val_16_BIT) with Size => 4; for CSR_BITS_Field use - (Val_8_Bit => 0, - Val_9_Bit => 1, - Val_10_Bit => 2, - Val_11_Bit => 3, - Val_12_Bit => 4, - Val_13_Bit => 5, - Val_14_Bit => 6, - Val_15_Bit => 7, - Val_16_Bit => 8); + (Val_8_BIT => 0, + Val_9_BIT => 1, + Val_10_BIT => 2, + Val_11_BIT => 3, + Val_12_BIT => 4, + Val_13_BIT => 5, + Val_14_BIT => 6, + Val_15_BIT => 7, + Val_16_BIT => 8); subtype SPI0_CSR_SCBR_Field is ATSAM3X8E.Byte; subtype SPI0_CSR_DLYBS_Field is ATSAM3X8E.Byte; @@ -379,7 +378,7 @@ package ATSAM3X8E.SPI is -- Chip Select Active After Transfer CSAAT : SPI0_CSR_CSAAT_Field := 16#0#; -- Bits Per Transfer - BITS : CSR_BITS_Field := ATSAM3X8E.SPI.Val_8_Bit; + BITS : CSR_BITS_Field := ATSAM3X8E.SPI.Val_8_BIT; -- Serial Clock Baud Rate SCBR : SPI0_CSR_SCBR_Field := 16#0#; -- Delay Before SPCK diff --git a/arduino-due/atsam3x8e/atsam3x8e-ssc.ads b/arduino-due/atsam3x8e/atsam3x8e-ssc.ads index 7a80e56..a5329de 100644 --- a/arduino-due/atsam3x8e/atsam3x8e-ssc.ads +++ b/arduino-due/atsam3x8e/atsam3x8e-ssc.ads @@ -1,4 +1,3 @@ -pragma Ada_2012; pragma Style_Checks (Off); -- This spec has been automatically generated from ATSAM3X8E.svd @@ -72,79 +71,79 @@ package ATSAM3X8E.SSC is -- Receive Clock Selection type RCMR_CKS_Field is (-- Divided Clock - Mck, + MCK, -- TK Clock signal - Tk, + TK, -- RK pin - Rk) + RK) with Size => 2; for RCMR_CKS_Field use - (Mck => 0, - Tk => 1, - Rk => 2); + (MCK => 0, + TK => 1, + RK => 2); -- Receive Clock Output Mode Selection type RCMR_CKO_Field is (-- None - None, + NONE, -- Continuous Receive Clock - Continuous, + CONTINUOUS, -- Receive Clock only during data transfers - Transfer) + TRANSFER) with Size => 3; for RCMR_CKO_Field use - (None => 0, - Continuous => 1, - Transfer => 2); + (NONE => 0, + CONTINUOUS => 1, + TRANSFER => 2); subtype SSC_RCMR_CKI_Field is ATSAM3X8E.Bit; -- Receive Clock Gating Selection type RCMR_CKG_Field is (-- None - None, + NONE, -- Continuous Receive Clock - Continuous, + CONTINUOUS, -- Receive Clock only during data transfers - Transfer) + TRANSFER) with Size => 2; for RCMR_CKG_Field use - (None => 0, - Continuous => 1, - Transfer => 2); + (NONE => 0, + CONTINUOUS => 1, + TRANSFER => 2); -- Receive Start Selection type RCMR_START_Field is (-- Continuous, as soon as the receiver is enabled, and immediately after the -- end of transfer of the previous data. - Continuous, + CONTINUOUS, -- Transmit start - Transmit, + TRANSMIT, -- Detection of a low level on RF signal - Rf_Low, + RF_LOW, -- Detection of a high level on RF signal - Rf_High, + RF_HIGH, -- Detection of a falling edge on RF signal - Rf_Falling, + RF_FALLING, -- Detection of a rising edge on RF signal - Rf_Rising, + RF_RISING, -- Detection of any level change on RF signal - Rf_Level, + RF_LEVEL, -- Detection of any edge on RF signal - Rf_Edge, + RF_EDGE, -- Compare 0 - Cmp_0) + CMP_0) with Size => 4; for RCMR_START_Field use - (Continuous => 0, - Transmit => 1, - Rf_Low => 2, - Rf_High => 3, - Rf_Falling => 4, - Rf_Rising => 5, - Rf_Level => 6, - Rf_Edge => 7, - Cmp_0 => 8); + (CONTINUOUS => 0, + TRANSMIT => 1, + RF_LOW => 2, + RF_HIGH => 3, + RF_FALLING => 4, + RF_RISING => 5, + RF_LEVEL => 6, + RF_EDGE => 7, + CMP_0 => 8); subtype SSC_RCMR_STOP_Field is ATSAM3X8E.Bit; subtype SSC_RCMR_STTDLY_Field is ATSAM3X8E.Byte; @@ -153,15 +152,15 @@ package ATSAM3X8E.SSC is -- Receive Clock Mode Register type SSC_RCMR_Register is record -- Receive Clock Selection - CKS : RCMR_CKS_Field := ATSAM3X8E.SSC.Mck; + CKS : RCMR_CKS_Field := ATSAM3X8E.SSC.MCK; -- Receive Clock Output Mode Selection - CKO : RCMR_CKO_Field := ATSAM3X8E.SSC.None; + CKO : RCMR_CKO_Field := ATSAM3X8E.SSC.NONE; -- Receive Clock Inversion CKI : SSC_RCMR_CKI_Field := 16#0#; -- Receive Clock Gating Selection - CKG : RCMR_CKG_Field := ATSAM3X8E.SSC.None; + CKG : RCMR_CKG_Field := ATSAM3X8E.SSC.NONE; -- Receive Start Selection - START : RCMR_START_Field := ATSAM3X8E.SSC.Continuous; + START : RCMR_START_Field := ATSAM3X8E.SSC.CONTINUOUS; -- Receive Stop Selection STOP : SSC_RCMR_STOP_Field := 16#0#; -- unspecified @@ -194,36 +193,36 @@ package ATSAM3X8E.SSC is -- Receive Frame Sync Output Selection type RFMR_FSOS_Field is (-- None - None, + NONE, -- Negative Pulse - Negative, + NEGATIVE, -- Positive Pulse - Positive, + POSITIVE, -- Driven Low during data transfer - Low, + LOW, -- Driven High during data transfer - High, + HIGH, -- Toggling at each start of data transfer - Toggling) + TOGGLING) with Size => 3; for RFMR_FSOS_Field use - (None => 0, - Negative => 1, - Positive => 2, - Low => 3, - High => 4, - Toggling => 5); + (NONE => 0, + NEGATIVE => 1, + POSITIVE => 2, + LOW => 3, + HIGH => 4, + TOGGLING => 5); -- Frame Sync Edge Detection type RFMR_FSEDGE_Field is (-- Positive Edge Detection - Positive, + POSITIVE, -- Negative Edge Detection - Negative) + NEGATIVE) with Size => 1; for RFMR_FSEDGE_Field use - (Positive => 0, - Negative => 1); + (POSITIVE => 0, + NEGATIVE => 1); subtype SSC_RFMR_FSLEN_EXT_Field is ATSAM3X8E.UInt4; @@ -244,11 +243,11 @@ package ATSAM3X8E.SSC is -- Receive Frame Sync Length FSLEN : SSC_RFMR_FSLEN_Field := 16#0#; -- Receive Frame Sync Output Selection - FSOS : RFMR_FSOS_Field := ATSAM3X8E.SSC.None; + FSOS : RFMR_FSOS_Field := ATSAM3X8E.SSC.NONE; -- unspecified Reserved_23_23 : ATSAM3X8E.Bit := 16#0#; -- Frame Sync Edge Detection - FSEDGE : RFMR_FSEDGE_Field := ATSAM3X8E.SSC.Positive; + FSEDGE : RFMR_FSEDGE_Field := ATSAM3X8E.SSC.POSITIVE; -- unspecified Reserved_25_27 : ATSAM3X8E.UInt3 := 16#0#; -- FSLEN Field Extension @@ -274,80 +273,80 @@ package ATSAM3X8E.SSC is -- Transmit Clock Selection type TCMR_CKS_Field is (-- Divided Clock - Mck, + MCK, -- TK Clock signal - Tk, + TK, -- RK pin - Rk) + RK) with Size => 2; for TCMR_CKS_Field use - (Mck => 0, - Tk => 1, - Rk => 2); + (MCK => 0, + TK => 1, + RK => 2); -- Transmit Clock Output Mode Selection type TCMR_CKO_Field is (-- None - None, + NONE, -- Continuous Receive Clock - Continuous, + CONTINUOUS, -- Transmit Clock only during data transfers - Transfer) + TRANSFER) with Size => 3; for TCMR_CKO_Field use - (None => 0, - Continuous => 1, - Transfer => 2); + (NONE => 0, + CONTINUOUS => 1, + TRANSFER => 2); subtype SSC_TCMR_CKI_Field is ATSAM3X8E.Bit; -- Transmit Clock Gating Selection type TCMR_CKG_Field is (-- None - None, + NONE, -- Transmit Clock enabled only if TF Low - Continuous, + CONTINUOUS, -- Transmit Clock enabled only if TF High - Transfer) + TRANSFER) with Size => 2; for TCMR_CKG_Field use - (None => 0, - Continuous => 1, - Transfer => 2); + (NONE => 0, + CONTINUOUS => 1, + TRANSFER => 2); -- Transmit Start Selection type TCMR_START_Field is (-- Continuous, as soon as a word is written in the SSC_THR Register (if -- Transmit is enabled), and immediately after the end of transfer of the -- previous data. - Continuous, + CONTINUOUS, -- Receive start - Receive, + RECEIVE, -- Detection of a low level on TF signal - Rf_Low, + RF_LOW, -- Detection of a high level on TF signal - Rf_High, + RF_HIGH, -- Detection of a falling edge on TF signal - Rf_Falling, + RF_FALLING, -- Detection of a rising edge on TF signal - Rf_Rising, + RF_RISING, -- Detection of any level change on TF signal - Rf_Level, + RF_LEVEL, -- Detection of any edge on TF signal - Rf_Edge, + RF_EDGE, -- Compare 0 - Cmp_0) + CMP_0) with Size => 4; for TCMR_START_Field use - (Continuous => 0, - Receive => 1, - Rf_Low => 2, - Rf_High => 3, - Rf_Falling => 4, - Rf_Rising => 5, - Rf_Level => 6, - Rf_Edge => 7, - Cmp_0 => 8); + (CONTINUOUS => 0, + RECEIVE => 1, + RF_LOW => 2, + RF_HIGH => 3, + RF_FALLING => 4, + RF_RISING => 5, + RF_LEVEL => 6, + RF_EDGE => 7, + CMP_0 => 8); subtype SSC_TCMR_STTDLY_Field is ATSAM3X8E.Byte; subtype SSC_TCMR_PERIOD_Field is ATSAM3X8E.Byte; @@ -355,15 +354,15 @@ package ATSAM3X8E.SSC is -- Transmit Clock Mode Register type SSC_TCMR_Register is record -- Transmit Clock Selection - CKS : TCMR_CKS_Field := ATSAM3X8E.SSC.Mck; + CKS : TCMR_CKS_Field := ATSAM3X8E.SSC.MCK; -- Transmit Clock Output Mode Selection - CKO : TCMR_CKO_Field := ATSAM3X8E.SSC.None; + CKO : TCMR_CKO_Field := ATSAM3X8E.SSC.NONE; -- Transmit Clock Inversion CKI : SSC_TCMR_CKI_Field := 16#0#; -- Transmit Clock Gating Selection - CKG : TCMR_CKG_Field := ATSAM3X8E.SSC.None; + CKG : TCMR_CKG_Field := ATSAM3X8E.SSC.NONE; -- Transmit Start Selection - START : TCMR_START_Field := ATSAM3X8E.SSC.Continuous; + START : TCMR_START_Field := ATSAM3X8E.SSC.CONTINUOUS; -- unspecified Reserved_12_15 : ATSAM3X8E.UInt4 := 16#0#; -- Transmit Start Delay @@ -393,38 +392,38 @@ package ATSAM3X8E.SSC is -- Transmit Frame Sync Output Selection type TFMR_FSOS_Field is (-- None - None, + NONE, -- Negative Pulse - Negative, + NEGATIVE, -- Positive Pulse - Positive, + POSITIVE, -- Driven Low during data transfer - Low, + LOW, -- Driven High during data transfer - High, + HIGH, -- Toggling at each start of data transfer - Toggling) + TOGGLING) with Size => 3; for TFMR_FSOS_Field use - (None => 0, - Negative => 1, - Positive => 2, - Low => 3, - High => 4, - Toggling => 5); + (NONE => 0, + NEGATIVE => 1, + POSITIVE => 2, + LOW => 3, + HIGH => 4, + TOGGLING => 5); subtype SSC_TFMR_FSDEN_Field is ATSAM3X8E.Bit; -- Frame Sync Edge Detection type TFMR_FSEDGE_Field is (-- Positive Edge Detection - Positive, + POSITIVE, -- Negative Edge Detection - Negative) + NEGATIVE) with Size => 1; for TFMR_FSEDGE_Field use - (Positive => 0, - Negative => 1); + (POSITIVE => 0, + NEGATIVE => 1); subtype SSC_TFMR_FSLEN_EXT_Field is ATSAM3X8E.UInt4; @@ -445,11 +444,11 @@ package ATSAM3X8E.SSC is -- Transmit Frame Sync Length FSLEN : SSC_TFMR_FSLEN_Field := 16#0#; -- Transmit Frame Sync Output Selection - FSOS : TFMR_FSOS_Field := ATSAM3X8E.SSC.None; + FSOS : TFMR_FSOS_Field := ATSAM3X8E.SSC.NONE; -- Frame Sync Data Enable FSDEN : SSC_TFMR_FSDEN_Field := 16#0#; -- Frame Sync Edge Detection - FSEDGE : TFMR_FSEDGE_Field := ATSAM3X8E.SSC.Positive; + FSEDGE : TFMR_FSEDGE_Field := ATSAM3X8E.SSC.POSITIVE; -- unspecified Reserved_25_27 : ATSAM3X8E.UInt3 := 16#0#; -- FSLEN Field Extension diff --git a/arduino-due/atsam3x8e/atsam3x8e-sysc.ads b/arduino-due/atsam3x8e/atsam3x8e-sysc.ads index 51b83f8..d09bd5c 100644 --- a/arduino-due/atsam3x8e/atsam3x8e-sysc.ads +++ b/arduino-due/atsam3x8e/atsam3x8e-sysc.ads @@ -1,4 +1,3 @@ -pragma Ada_2012; pragma Style_Checks (Off); -- This spec has been automatically generated from ATSAM3X8E.svd @@ -120,33 +119,33 @@ package ATSAM3X8E.SYSC is -- Time Event Selection type CR_TIMEVSEL_Field is (-- Minute change - Minute, + MINUTE, -- Hour change - Hour, + HOUR, -- Every day at midnight - Midnight, + MIDNIGHT, -- Every day at noon - Noon) + NOON) with Size => 2; for CR_TIMEVSEL_Field use - (Minute => 0, - Hour => 1, - Midnight => 2, - Noon => 3); + (MINUTE => 0, + HOUR => 1, + MIDNIGHT => 2, + NOON => 3); -- Calendar Event Selection type CR_CALEVSEL_Field is (-- Week change (every Monday at time 00:00:00) - Week, + WEEK, -- Month change (every 01 of each month at time 00:00:00) - Month, + MONTH, -- Year change (every January 1 at time 00:00:00) - Year) + YEAR) with Size => 2; for CR_CALEVSEL_Field use - (Week => 0, - Month => 1, - Year => 2); + (WEEK => 0, + MONTH => 1, + YEAR => 2); -- Control Register type RTC_CR_Register is record @@ -157,11 +156,11 @@ package ATSAM3X8E.SYSC is -- unspecified Reserved_2_7 : ATSAM3X8E.UInt6 := 16#0#; -- Time Event Selection - TIMEVSEL : CR_TIMEVSEL_Field := ATSAM3X8E.SYSC.Minute; + TIMEVSEL : CR_TIMEVSEL_Field := ATSAM3X8E.SYSC.MINUTE; -- unspecified Reserved_10_15 : ATSAM3X8E.UInt6 := 16#0#; -- Calendar Event Selection - CALEVSEL : CR_CALEVSEL_Field := ATSAM3X8E.SYSC.Week; + CALEVSEL : CR_CALEVSEL_Field := ATSAM3X8E.SYSC.WEEK; -- unspecified Reserved_18_31 : ATSAM3X8E.UInt14 := 16#0#; end record @@ -594,25 +593,25 @@ package ATSAM3X8E.SYSC is -- Voltage Regulator Off type CR_VROFF_Field is (-- no effect. - No_Effect, + NO_EFFECT, -- if KEY is correct, asserts vddcore_nreset and stops the voltage regulator. - Stop_Vreg) + STOP_VREG) with Size => 1; for CR_VROFF_Field use - (No_Effect => 0, - Stop_Vreg => 1); + (NO_EFFECT => 0, + STOP_VREG => 1); -- Crystal Oscillator Select type CR_XTALSEL_Field is (-- no effect. - No_Effect, + NO_EFFECT, -- if KEY is correct, switches the slow clock on the crystal oscillator -- output. - Crystal_Sel) + CRYSTAL_SEL) with Size => 1; for CR_XTALSEL_Field use - (No_Effect => 0, - Crystal_Sel => 1); + (NO_EFFECT => 0, + CRYSTAL_SEL => 1); subtype SUPC_CR_KEY_Field is ATSAM3X8E.Byte; @@ -621,9 +620,9 @@ package ATSAM3X8E.SYSC is -- unspecified Reserved_0_1 : ATSAM3X8E.UInt2 := 16#0#; -- Write-only. Voltage Regulator Off - VROFF : CR_VROFF_Field := ATSAM3X8E.SYSC.No_Effect; + VROFF : CR_VROFF_Field := ATSAM3X8E.SYSC.NO_EFFECT; -- Write-only. Crystal Oscillator Select - XTALSEL : CR_XTALSEL_Field := ATSAM3X8E.SYSC.No_Effect; + XTALSEL : CR_XTALSEL_Field := ATSAM3X8E.SYSC.NO_EFFECT; -- unspecified Reserved_4_23 : ATSAM3X8E.UInt20 := 16#0#; -- Write-only. Password @@ -695,48 +694,48 @@ package ATSAM3X8E.SYSC is -- Supply Monitor Sampling Period type SMMR_SMSMPL_Field is (-- Supply Monitor disabled - Smd, + SMD, -- Continuous Supply Monitor - Csm, + CSM, -- Supply Monitor enabled one SLCK period every 32 SLCK periods - Val_32Slck, + Val_32SLCK, -- Supply Monitor enabled one SLCK period every 256 SLCK periods - Val_256Slck, + Val_256SLCK, -- Supply Monitor enabled one SLCK period every 2,048 SLCK periods - Val_2048Slck) + Val_2048SLCK) with Size => 3; for SMMR_SMSMPL_Field use - (Smd => 0, - Csm => 1, - Val_32Slck => 2, - Val_256Slck => 3, - Val_2048Slck => 4); + (SMD => 0, + CSM => 1, + Val_32SLCK => 2, + Val_256SLCK => 3, + Val_2048SLCK => 4); -- Supply Monitor Reset Enable type SMMR_SMRSTEN_Field is (-- the core reset signal "vddcore_nreset" is not affected when a supply -- monitor detection occurs. - Not_Enable, + NOT_ENABLE, -- the core reset signal, vddcore_nreset is asserted when a supply monitor -- detection occurs. - Enable) + ENABLE) with Size => 1; for SMMR_SMRSTEN_Field use - (Not_Enable => 0, - Enable => 1); + (NOT_ENABLE => 0, + ENABLE => 1); -- Supply Monitor Interrupt Enable type SMMR_SMIEN_Field is (-- the SUPC interrupt signal is not affected when a supply monitor detection -- occurs. - Not_Enable, + NOT_ENABLE, -- the SUPC interrupt signal is asserted when a supply monitor detection -- occurs. - Enable) + ENABLE) with Size => 1; for SMMR_SMIEN_Field use - (Not_Enable => 0, - Enable => 1); + (NOT_ENABLE => 0, + ENABLE => 1); -- Supply Controller Supply Monitor Mode Register type SUPC_SMMR_Register is record @@ -745,13 +744,13 @@ package ATSAM3X8E.SYSC is -- unspecified Reserved_4_7 : ATSAM3X8E.UInt4 := 16#0#; -- Supply Monitor Sampling Period - SMSMPL : SMMR_SMSMPL_Field := ATSAM3X8E.SYSC.Smd; + SMSMPL : SMMR_SMSMPL_Field := ATSAM3X8E.SYSC.SMD; -- unspecified Reserved_11_11 : ATSAM3X8E.Bit := 16#0#; -- Supply Monitor Reset Enable - SMRSTEN : SMMR_SMRSTEN_Field := ATSAM3X8E.SYSC.Not_Enable; + SMRSTEN : SMMR_SMRSTEN_Field := ATSAM3X8E.SYSC.NOT_ENABLE; -- Supply Monitor Interrupt Enable - SMIEN : SMMR_SMIEN_Field := ATSAM3X8E.SYSC.Not_Enable; + SMIEN : SMMR_SMIEN_Field := ATSAM3X8E.SYSC.NOT_ENABLE; -- unspecified Reserved_14_31 : ATSAM3X8E.UInt18 := 16#0#; end record @@ -771,38 +770,38 @@ package ATSAM3X8E.SYSC is type MR_BODRSTEN_Field is (-- the core reset signal "vddcore_nreset" is not affected when a brownout -- detection occurs. - Not_Enable, + NOT_ENABLE, -- the core reset signal, vddcore_nreset is asserted when a brownout detection -- occurs. - Enable) + ENABLE) with Size => 1; for MR_BODRSTEN_Field use - (Not_Enable => 0, - Enable => 1); + (NOT_ENABLE => 0, + ENABLE => 1); -- Brownout Detector Disable type MR_BODDIS_Field is (-- the core brownout detector is enabled. - Enable, + ENABLE, -- the core brownout detector is disabled. - Disable) + DISABLE) with Size => 1; for MR_BODDIS_Field use - (Enable => 0, - Disable => 1); + (ENABLE => 0, + DISABLE => 1); subtype SUPC_MR_VDDIORDYONREG_Field is ATSAM3X8E.Bit; -- Oscillator Bypass type MR_OSCBYPASS_Field is (-- no effect. Clock selection depends on XTALSEL value. - No_Effect, + NO_EFFECT, -- the 32-KHz XTAL oscillator is selected and is put in bypass mode. - Bypass) + BYPASS) with Size => 1; for MR_OSCBYPASS_Field use - (No_Effect => 0, - Bypass => 1); + (NO_EFFECT => 0, + BYPASS => 1); subtype SUPC_MR_KEY_Field is ATSAM3X8E.Byte; @@ -811,14 +810,14 @@ package ATSAM3X8E.SYSC is -- unspecified Reserved_0_11 : ATSAM3X8E.UInt12 := 16#A00#; -- Brownout Detector Reset Enable - BODRSTEN : MR_BODRSTEN_Field := ATSAM3X8E.SYSC.Enable; + BODRSTEN : MR_BODRSTEN_Field := ATSAM3X8E.SYSC.ENABLE; -- Brownout Detector Disable - BODDIS : MR_BODDIS_Field := ATSAM3X8E.SYSC.Enable; + BODDIS : MR_BODDIS_Field := ATSAM3X8E.SYSC.ENABLE; VDDIORDYONREG : SUPC_MR_VDDIORDYONREG_Field := 16#1#; -- unspecified Reserved_15_19 : ATSAM3X8E.UInt5 := 16#0#; -- Oscillator Bypass - OSCBYPASS : MR_OSCBYPASS_Field := ATSAM3X8E.SYSC.No_Effect; + OSCBYPASS : MR_OSCBYPASS_Field := ATSAM3X8E.SYSC.NO_EFFECT; -- unspecified Reserved_21_23 : ATSAM3X8E.UInt3 := 16#0#; -- Password Key @@ -840,111 +839,111 @@ package ATSAM3X8E.SYSC is -- Force Wake Up Enable type WUMR_FWUPEN_Field is (-- the Force Wake Up pin has no wake up effect. - Not_Enable, + NOT_ENABLE, -- the Force Wake Up pin low forces the wake up of the core power supply. - Enable) + ENABLE) with Size => 1; for WUMR_FWUPEN_Field use - (Not_Enable => 0, - Enable => 1); + (NOT_ENABLE => 0, + ENABLE => 1); -- Supply Monitor Wake Up Enable type WUMR_SMEN_Field is (-- the supply monitor detection has no wake up effect. - Not_Enable, + NOT_ENABLE, -- the supply monitor detection forces the wake up of the core power supply. - Enable) + ENABLE) with Size => 1; for WUMR_SMEN_Field use - (Not_Enable => 0, - Enable => 1); + (NOT_ENABLE => 0, + ENABLE => 1); -- Real Time Timer Wake Up Enable type WUMR_RTTEN_Field is (-- the RTT alarm signal has no wake up effect. - Not_Enable, + NOT_ENABLE, -- the RTT alarm signal forces the wake up of the core power supply. - Enable) + ENABLE) with Size => 1; for WUMR_RTTEN_Field use - (Not_Enable => 0, - Enable => 1); + (NOT_ENABLE => 0, + ENABLE => 1); -- Real Time Clock Wake Up Enable type WUMR_RTCEN_Field is (-- the RTC alarm signal has no wake up effect. - Not_Enable, + NOT_ENABLE, -- the RTC alarm signal forces the wake up of the core power supply. - Enable) + ENABLE) with Size => 1; for WUMR_RTCEN_Field use - (Not_Enable => 0, - Enable => 1); + (NOT_ENABLE => 0, + ENABLE => 1); -- Force Wake Up Debouncer Period type WUMR_FWUPDBC_Field is (-- Immediate, no debouncing, detected active at least on one Slow Clock edge. - Immediate, + IMMEDIATE, -- FWUP shall be low for at least 3 SLCK periods - Val_3_Sclk, + Val_3_SCLK, -- FWUP shall be low for at least 32 SLCK periods - Val_32_Sclk, + Val_32_SCLK, -- FWUP shall be low for at least 512 SLCK periods - Val_512_Sclk, + Val_512_SCLK, -- FWUP shall be low for at least 4,096 SLCK periods - Val_4096_Sclk, + Val_4096_SCLK, -- FWUP shall be low for at least 32,768 SLCK periods - Val_32768_Sclk) + Val_32768_SCLK) with Size => 3; for WUMR_FWUPDBC_Field use - (Immediate => 0, - Val_3_Sclk => 1, - Val_32_Sclk => 2, - Val_512_Sclk => 3, - Val_4096_Sclk => 4, - Val_32768_Sclk => 5); + (IMMEDIATE => 0, + Val_3_SCLK => 1, + Val_32_SCLK => 2, + Val_512_SCLK => 3, + Val_4096_SCLK => 4, + Val_32768_SCLK => 5); -- Wake Up Inputs Debouncer Period type WUMR_WKUPDBC_Field is (-- Immediate, no debouncing, detected active at least on one Slow Clock edge. - Immediate, + IMMEDIATE, -- WKUPx shall be in its active state for at least 3 SLCK periods - Val_3_Sclk, + Val_3_SCLK, -- WKUPx shall be in its active state for at least 32 SLCK periods - Val_32_Sclk, + Val_32_SCLK, -- WKUPx shall be in its active state for at least 512 SLCK periods - Val_512_Sclk, + Val_512_SCLK, -- WKUPx shall be in its active state for at least 4,096 SLCK periods - Val_4096_Sclk, + Val_4096_SCLK, -- WKUPx shall be in its active state for at least 32,768 SLCK periods - Val_32768_Sclk) + Val_32768_SCLK) with Size => 3; for WUMR_WKUPDBC_Field use - (Immediate => 0, - Val_3_Sclk => 1, - Val_32_Sclk => 2, - Val_512_Sclk => 3, - Val_4096_Sclk => 4, - Val_32768_Sclk => 5); + (IMMEDIATE => 0, + Val_3_SCLK => 1, + Val_32_SCLK => 2, + Val_512_SCLK => 3, + Val_4096_SCLK => 4, + Val_32768_SCLK => 5); -- Supply Controller Wake Up Mode Register type SUPC_WUMR_Register is record -- Force Wake Up Enable - FWUPEN : WUMR_FWUPEN_Field := ATSAM3X8E.SYSC.Not_Enable; + FWUPEN : WUMR_FWUPEN_Field := ATSAM3X8E.SYSC.NOT_ENABLE; -- Supply Monitor Wake Up Enable - SMEN : WUMR_SMEN_Field := ATSAM3X8E.SYSC.Not_Enable; + SMEN : WUMR_SMEN_Field := ATSAM3X8E.SYSC.NOT_ENABLE; -- Real Time Timer Wake Up Enable - RTTEN : WUMR_RTTEN_Field := ATSAM3X8E.SYSC.Not_Enable; + RTTEN : WUMR_RTTEN_Field := ATSAM3X8E.SYSC.NOT_ENABLE; -- Real Time Clock Wake Up Enable - RTCEN : WUMR_RTCEN_Field := ATSAM3X8E.SYSC.Not_Enable; + RTCEN : WUMR_RTCEN_Field := ATSAM3X8E.SYSC.NOT_ENABLE; -- unspecified Reserved_4_7 : ATSAM3X8E.UInt4 := 16#0#; -- Force Wake Up Debouncer Period - FWUPDBC : WUMR_FWUPDBC_Field := ATSAM3X8E.SYSC.Immediate; + FWUPDBC : WUMR_FWUPDBC_Field := ATSAM3X8E.SYSC.IMMEDIATE; -- unspecified Reserved_11_11 : ATSAM3X8E.Bit := 16#0#; -- Wake Up Inputs Debouncer Period - WKUPDBC : WUMR_WKUPDBC_Field := ATSAM3X8E.SYSC.Immediate; + WKUPDBC : WUMR_WKUPDBC_Field := ATSAM3X8E.SYSC.IMMEDIATE; -- unspecified Reserved_15_31 : ATSAM3X8E.UInt17 := 16#0#; end record @@ -965,14 +964,14 @@ package ATSAM3X8E.SYSC is -- Wake Up Input Enable 0 type WUIR_WKUPEN0_Field is (-- the corresponding wake-up input has no wake up effect. - Disable, + DISABLE, -- the corresponding wake-up input forces the wake up of the core power -- supply. - Enable) + ENABLE) with Size => 1; for WUIR_WKUPEN0_Field use - (Disable => 0, - Enable => 1); + (DISABLE => 0, + ENABLE => 1); -- SUPC_WUIR_WKUPEN array type SUPC_WUIR_WKUPEN_Field_Array is array (0 .. 15) of WUIR_WKUPEN0_Field @@ -1002,14 +1001,14 @@ package ATSAM3X8E.SYSC is type WUIR_WKUPT0_Field is (-- a high to low level transition for a period defined by WKUPDBC on the -- corresponding wake-up input forces the wake up of the core power supply. - High_To_Low, + HIGH_TO_LOW, -- a low to high level transition for a period defined by WKUPDBC on the -- correspond-ing wake-up input forces the wake up of the core power supply. - Low_To_High) + LOW_TO_HIGH) with Size => 1; for WUIR_WKUPT0_Field use - (High_To_Low => 0, - Low_To_High => 1); + (HIGH_TO_LOW => 0, + LOW_TO_HIGH => 1); -- SUPC_WUIR_WKUPT array type SUPC_WUIR_WKUPT_Field_Array is array (0 .. 15) of WUIR_WKUPT0_Field @@ -1053,125 +1052,125 @@ package ATSAM3X8E.SYSC is type SR_FWUPS_Field is (-- no wake up due to the assertion of the FWUP pin has occurred since the last -- read of SUPC_SR. - No, + NO, -- at least one wake up due to the assertion of the FWUP pin has occurred -- since the last read of SUPC_SR. - Present) + PRESENT) with Size => 1; for SR_FWUPS_Field use - (No => 0, - Present => 1); + (NO => 0, + PRESENT => 1); -- WKUP Wake Up Status type SR_WKUPS_Field is (-- no wake up due to the assertion of the WKUP pins has occurred since the -- last read of SUPC_SR. - No, + NO, -- at least one wake up due to the assertion of the WKUP pins has occurred -- since the last read of SUPC_SR. - Present) + PRESENT) with Size => 1; for SR_WKUPS_Field use - (No => 0, - Present => 1); + (NO => 0, + PRESENT => 1); -- Supply Monitor Detection Wake Up Status type SR_SMWS_Field is (-- no wake up due to a supply monitor detection has occurred since the last -- read of SUPC_SR. - No, + NO, -- at least one wake up due to a supply monitor detection has occurred since -- the last read of SUPC_SR. - Present) + PRESENT) with Size => 1; for SR_SMWS_Field use - (No => 0, - Present => 1); + (NO => 0, + PRESENT => 1); -- Brownout Detector Reset Status type SR_BODRSTS_Field is (-- no core brownout rising edge event has been detected since the last read of -- the SUPC_SR. - No, + NO, -- at least one brownout output rising edge event has been detected since the -- last read of the SUPC_SR. - Present) + PRESENT) with Size => 1; for SR_BODRSTS_Field use - (No => 0, - Present => 1); + (NO => 0, + PRESENT => 1); -- Supply Monitor Reset Status type SR_SMRSTS_Field is (-- no supply monitor detection has generated a core reset since the last read -- of the SUPC_SR. - No, + NO, -- at least one supply monitor detection has generated a core reset since the -- last read of the SUPC_SR. - Present) + PRESENT) with Size => 1; for SR_SMRSTS_Field use - (No => 0, - Present => 1); + (NO => 0, + PRESENT => 1); -- Supply Monitor Status type SR_SMS_Field is (-- no supply monitor detection since the last read of SUPC_SR. - No, + NO, -- at least one supply monitor detection since the last read of SUPC_SR. - Present) + PRESENT) with Size => 1; for SR_SMS_Field use - (No => 0, - Present => 1); + (NO => 0, + PRESENT => 1); -- Supply Monitor Output Status type SR_SMOS_Field is (-- the supply monitor detected VDDUTMI higher than its threshold at its last -- measurement. - High, + HIGH, -- the supply monitor detected VDDUTMI lower than its threshold at its last -- measurement. - Low) + LOW) with Size => 1; for SR_SMOS_Field use - (High => 0, - Low => 1); + (HIGH => 0, + LOW => 1); -- 32-kHz Oscillator Selection Status type SR_OSCSEL_Field is (-- the slow clock, SLCK is generated by the embedded 32-kHz RC oscillator. - Rc, + RC, -- the slow clock, SLCK is generated by the 32-kHz crystal oscillator. - Cryst) + CRYST) with Size => 1; for SR_OSCSEL_Field use - (Rc => 0, - Cryst => 1); + (RC => 0, + CRYST => 1); -- FWUP Input Status type SR_FWUPIS_Field is (-- FWUP input is tied low. - Low, + LOW, -- FWUP input is tied high. - High) + HIGH) with Size => 1; for SR_FWUPIS_Field use - (Low => 0, - High => 1); + (LOW => 0, + HIGH => 1); -- WKUP Input Status 0 type SR_WKUPIS0_Field is (-- the corresponding wake-up input is disabled, or was inactive at the time -- the debouncer triggered a wake up event. - Dis, + DIS, -- the corresponding wake-up input was active at the time the debouncer -- triggered a wake up event. - En) + EN) with Size => 1; for SR_WKUPIS0_Field use - (Dis => 0, - En => 1); + (DIS => 0, + EN => 1); -- SUPC_SR_WKUPIS array type SUPC_SR_WKUPIS_Field_Array is array (0 .. 15) of SR_WKUPIS0_Field diff --git a/arduino-due/atsam3x8e/atsam3x8e-tc.ads b/arduino-due/atsam3x8e/atsam3x8e-tc.ads index c44b439..3295216 100644 --- a/arduino-due/atsam3x8e/atsam3x8e-tc.ads +++ b/arduino-due/atsam3x8e/atsam3x8e-tc.ads @@ -1,4 +1,3 @@ -pragma Ada_2012; pragma Style_Checks (Off); -- This spec has been automatically generated from ATSAM3X8E.svd @@ -41,50 +40,50 @@ package ATSAM3X8E.TC is -- Clock Selection type CMR0_TCCLKS_Field is (-- Clock selected: TCLK1 - Timer_Clock1, + TIMER_CLOCK1, -- Clock selected: TCLK2 - Timer_Clock2, + TIMER_CLOCK2, -- Clock selected: TCLK3 - Timer_Clock3, + TIMER_CLOCK3, -- Clock selected: TCLK4 - Timer_Clock4, + TIMER_CLOCK4, -- Clock selected: TCLK5 - Timer_Clock5, + TIMER_CLOCK5, -- Clock selected: XC0 - Xc0, + XC0, -- Clock selected: XC1 - Xc1, + XC1, -- Clock selected: XC2 - Xc2) + XC2) with Size => 3; for CMR0_TCCLKS_Field use - (Timer_Clock1 => 0, - Timer_Clock2 => 1, - Timer_Clock3 => 2, - Timer_Clock4 => 3, - Timer_Clock5 => 4, - Xc0 => 5, - Xc1 => 6, - Xc2 => 7); + (TIMER_CLOCK1 => 0, + TIMER_CLOCK2 => 1, + TIMER_CLOCK3 => 2, + TIMER_CLOCK4 => 3, + TIMER_CLOCK5 => 4, + XC0 => 5, + XC1 => 6, + XC2 => 7); subtype CMR_CLKI_Field is ATSAM3X8E.Bit; -- Burst Signal Selection type CMR0_BURST_Field is (-- The clock is not gated by an external signal. - None, + NONE, -- XC0 is ANDed with the selected clock. - Xc0, + XC0, -- XC1 is ANDed with the selected clock. - Xc1, + XC1, -- XC2 is ANDed with the selected clock. - Xc2) + XC2) with Size => 2; for CMR0_BURST_Field use - (None => 0, - Xc0 => 1, - Xc1 => 2, - Xc2 => 3); + (NONE => 0, + XC0 => 1, + XC1 => 2, + XC2 => 3); subtype CMR_LDBSTOP_Field is ATSAM3X8E.Bit; subtype CMR_LDBDIS_Field is ATSAM3X8E.Bit; @@ -92,19 +91,19 @@ package ATSAM3X8E.TC is -- External Trigger Edge Selection type CMR0_ETRGEDG_Field is (-- The clock is not gated by an external signal. - None, + NONE, -- Rising edge - Rising, + RISING, -- Falling edge - Falling, + FALLING, -- Each edge - Edge) + EDGE) with Size => 2; for CMR0_ETRGEDG_Field use - (None => 0, - Rising => 1, - Falling => 2, - Edge => 3); + (NONE => 0, + RISING => 1, + FALLING => 2, + EDGE => 3); subtype CMR_ABETRG_Field is ATSAM3X8E.Bit; subtype CMR_CPCTRG_Field is ATSAM3X8E.Bit; @@ -113,51 +112,51 @@ package ATSAM3X8E.TC is -- RA Loading Edge Selection type CMR0_LDRA_Field is (-- None - None, + NONE, -- Rising edge of TIOA - Rising, + RISING, -- Falling edge of TIOA - Falling, + FALLING, -- Each edge of TIOA - Edge) + EDGE) with Size => 2; for CMR0_LDRA_Field use - (None => 0, - Rising => 1, - Falling => 2, - Edge => 3); + (NONE => 0, + RISING => 1, + FALLING => 2, + EDGE => 3); -- RB Loading Edge Selection type CMR0_LDRB_Field is (-- None - None, + NONE, -- Rising edge of TIOA - Rising, + RISING, -- Falling edge of TIOA - Falling, + FALLING, -- Each edge of TIOA - Edge) + EDGE) with Size => 2; for CMR0_LDRB_Field use - (None => 0, - Rising => 1, - Falling => 2, - Edge => 3); + (NONE => 0, + RISING => 1, + FALLING => 2, + EDGE => 3); -- Channel Mode Register (channel = 0) type CMR_Register is record -- Clock Selection - TCCLKS : CMR0_TCCLKS_Field := ATSAM3X8E.TC.Timer_Clock1; + TCCLKS : CMR0_TCCLKS_Field := ATSAM3X8E.TC.TIMER_CLOCK1; -- Clock Invert CLKI : CMR_CLKI_Field := 16#0#; -- Burst Signal Selection - BURST : CMR0_BURST_Field := ATSAM3X8E.TC.None; + BURST : CMR0_BURST_Field := ATSAM3X8E.TC.NONE; -- Counter Clock Stopped with RB Loading LDBSTOP : CMR_LDBSTOP_Field := 16#0#; -- Counter Clock Disable with RB Loading LDBDIS : CMR_LDBDIS_Field := 16#0#; -- External Trigger Edge Selection - ETRGEDG : CMR0_ETRGEDG_Field := ATSAM3X8E.TC.None; + ETRGEDG : CMR0_ETRGEDG_Field := ATSAM3X8E.TC.NONE; -- TIOA or TIOB External Trigger Selection ABETRG : CMR_ABETRG_Field := 16#0#; -- unspecified @@ -167,9 +166,9 @@ package ATSAM3X8E.TC is -- Waveform Mode WAVE : CMR_WAVE_Field := 16#0#; -- RA Loading Edge Selection - LDRA : CMR0_LDRA_Field := ATSAM3X8E.TC.None; + LDRA : CMR0_LDRA_Field := ATSAM3X8E.TC.NONE; -- RB Loading Edge Selection - LDRB : CMR0_LDRB_Field := ATSAM3X8E.TC.None; + LDRB : CMR0_LDRB_Field := ATSAM3X8E.TC.NONE; -- unspecified Reserved_20_31 : ATSAM3X8E.UInt12 := 16#0#; end record @@ -194,50 +193,50 @@ package ATSAM3X8E.TC is -- Clock Selection type CMR0_WAVE_EQ_1_TCCLKS_Field is (-- Clock selected: TCLK1 - Timer_Clock1, + TIMER_CLOCK1, -- Clock selected: TCLK2 - Timer_Clock2, + TIMER_CLOCK2, -- Clock selected: TCLK3 - Timer_Clock3, + TIMER_CLOCK3, -- Clock selected: TCLK4 - Timer_Clock4, + TIMER_CLOCK4, -- Clock selected: TCLK5 - Timer_Clock5, + TIMER_CLOCK5, -- Clock selected: XC0 - Xc0, + XC0, -- Clock selected: XC1 - Xc1, + XC1, -- Clock selected: XC2 - Xc2) + XC2) with Size => 3; for CMR0_WAVE_EQ_1_TCCLKS_Field use - (Timer_Clock1 => 0, - Timer_Clock2 => 1, - Timer_Clock3 => 2, - Timer_Clock4 => 3, - Timer_Clock5 => 4, - Xc0 => 5, - Xc1 => 6, - Xc2 => 7); + (TIMER_CLOCK1 => 0, + TIMER_CLOCK2 => 1, + TIMER_CLOCK3 => 2, + TIMER_CLOCK4 => 3, + TIMER_CLOCK5 => 4, + XC0 => 5, + XC1 => 6, + XC2 => 7); subtype TC0_CMR0_WAVE_EQ_1_CLKI_Field is ATSAM3X8E.Bit; -- Burst Signal Selection type CMR0_WAVE_EQ_1_BURST_Field is (-- The clock is not gated by an external signal. - None, + NONE, -- XC0 is ANDed with the selected clock. - Xc0, + XC0, -- XC1 is ANDed with the selected clock. - Xc1, + XC1, -- XC2 is ANDed with the selected clock. - Xc2) + XC2) with Size => 2; for CMR0_WAVE_EQ_1_BURST_Field use - (None => 0, - Xc0 => 1, - Xc1 => 2, - Xc2 => 3); + (NONE => 0, + XC0 => 1, + XC1 => 2, + XC2 => 3); subtype TC0_CMR0_WAVE_EQ_1_CPCSTOP_Field is ATSAM3X8E.Bit; subtype TC0_CMR0_WAVE_EQ_1_CPCDIS_Field is ATSAM3X8E.Bit; @@ -245,232 +244,232 @@ package ATSAM3X8E.TC is -- External Event Edge Selection type CMR0_WAVE_EQ_1_EEVTEDG_Field is (-- None - None, + NONE, -- Rising edge - Rising, + RISING, -- Falling edge - Falling, + FALLING, -- Each edge - Edge) + EDGE) with Size => 2; for CMR0_WAVE_EQ_1_EEVTEDG_Field use - (None => 0, - Rising => 1, - Falling => 2, - Edge => 3); + (NONE => 0, + RISING => 1, + FALLING => 2, + EDGE => 3); -- External Event Selection type CMR0_WAVE_EQ_1_EEVT_Field is (-- TIOB - Tiob, + TIOB, -- XC0 - Xc0, + XC0, -- XC1 - Xc1, + XC1, -- XC2 - Xc2) + XC2) with Size => 2; for CMR0_WAVE_EQ_1_EEVT_Field use - (Tiob => 0, - Xc0 => 1, - Xc1 => 2, - Xc2 => 3); + (TIOB => 0, + XC0 => 1, + XC1 => 2, + XC2 => 3); subtype TC0_CMR0_WAVE_EQ_1_ENETRG_Field is ATSAM3X8E.Bit; -- Waveform Selection type CMR0_WAVE_EQ_1_WAVSEL_Field is (-- UP mode without automatic trigger on RC Compare - Up, + UP, -- UPDOWN mode without automatic trigger on RC Compare - Updown, + UPDOWN, -- UP mode with automatic trigger on RC Compare - Up_Rc, + UP_RC, -- UPDOWN mode with automatic trigger on RC Compare - Updown_Rc) + UPDOWN_RC) with Size => 2; for CMR0_WAVE_EQ_1_WAVSEL_Field use - (Up => 0, - Updown => 1, - Up_Rc => 2, - Updown_Rc => 3); + (UP => 0, + UPDOWN => 1, + UP_RC => 2, + UPDOWN_RC => 3); subtype TC0_CMR0_WAVE_EQ_1_WAVE_Field is ATSAM3X8E.Bit; -- RA Compare Effect on TIOA type CMR0_WAVE_EQ_1_ACPA_Field is (-- None - None, + NONE, -- Set - Set, + SET, -- Clear - Clear, + CLEAR, -- Toggle - Toggle) + TOGGLE) with Size => 2; for CMR0_WAVE_EQ_1_ACPA_Field use - (None => 0, - Set => 1, - Clear => 2, - Toggle => 3); + (NONE => 0, + SET => 1, + CLEAR => 2, + TOGGLE => 3); -- RC Compare Effect on TIOA type CMR0_WAVE_EQ_1_ACPC_Field is (-- None - None, + NONE, -- Set - Set, + SET, -- Clear - Clear, + CLEAR, -- Toggle - Toggle) + TOGGLE) with Size => 2; for CMR0_WAVE_EQ_1_ACPC_Field use - (None => 0, - Set => 1, - Clear => 2, - Toggle => 3); + (NONE => 0, + SET => 1, + CLEAR => 2, + TOGGLE => 3); -- External Event Effect on TIOA type CMR0_WAVE_EQ_1_AEEVT_Field is (-- None - None, + NONE, -- Set - Set, + SET, -- Clear - Clear, + CLEAR, -- Toggle - Toggle) + TOGGLE) with Size => 2; for CMR0_WAVE_EQ_1_AEEVT_Field use - (None => 0, - Set => 1, - Clear => 2, - Toggle => 3); + (NONE => 0, + SET => 1, + CLEAR => 2, + TOGGLE => 3); -- Software Trigger Effect on TIOA type CMR0_WAVE_EQ_1_ASWTRG_Field is (-- None - None, + NONE, -- Set - Set, + SET, -- Clear - Clear, + CLEAR, -- Toggle - Toggle) + TOGGLE) with Size => 2; for CMR0_WAVE_EQ_1_ASWTRG_Field use - (None => 0, - Set => 1, - Clear => 2, - Toggle => 3); + (NONE => 0, + SET => 1, + CLEAR => 2, + TOGGLE => 3); -- RB Compare Effect on TIOB type CMR0_WAVE_EQ_1_BCPB_Field is (-- None - None, + NONE, -- Set - Set, + SET, -- Clear - Clear, + CLEAR, -- Toggle - Toggle) + TOGGLE) with Size => 2; for CMR0_WAVE_EQ_1_BCPB_Field use - (None => 0, - Set => 1, - Clear => 2, - Toggle => 3); + (NONE => 0, + SET => 1, + CLEAR => 2, + TOGGLE => 3); -- RC Compare Effect on TIOB type CMR0_WAVE_EQ_1_BCPC_Field is (-- None - None, + NONE, -- Set - Set, + SET, -- Clear - Clear, + CLEAR, -- Toggle - Toggle) + TOGGLE) with Size => 2; for CMR0_WAVE_EQ_1_BCPC_Field use - (None => 0, - Set => 1, - Clear => 2, - Toggle => 3); + (NONE => 0, + SET => 1, + CLEAR => 2, + TOGGLE => 3); -- External Event Effect on TIOB type CMR0_WAVE_EQ_1_BEEVT_Field is (-- None - None, + NONE, -- Set - Set, + SET, -- Clear - Clear, + CLEAR, -- Toggle - Toggle) + TOGGLE) with Size => 2; for CMR0_WAVE_EQ_1_BEEVT_Field use - (None => 0, - Set => 1, - Clear => 2, - Toggle => 3); + (NONE => 0, + SET => 1, + CLEAR => 2, + TOGGLE => 3); -- Software Trigger Effect on TIOB type CMR0_WAVE_EQ_1_BSWTRG_Field is (-- None - None, + NONE, -- Set - Set, + SET, -- Clear - Clear, + CLEAR, -- Toggle - Toggle) + TOGGLE) with Size => 2; for CMR0_WAVE_EQ_1_BSWTRG_Field use - (None => 0, - Set => 1, - Clear => 2, - Toggle => 3); + (NONE => 0, + SET => 1, + CLEAR => 2, + TOGGLE => 3); -- Channel Mode Register (channel = 0) type TC0_CMR0_WAVE_EQ_1_Register is record -- Clock Selection - TCCLKS : CMR0_WAVE_EQ_1_TCCLKS_Field := ATSAM3X8E.TC.Timer_Clock1; + TCCLKS : CMR0_WAVE_EQ_1_TCCLKS_Field := ATSAM3X8E.TC.TIMER_CLOCK1; -- Clock Invert CLKI : TC0_CMR0_WAVE_EQ_1_CLKI_Field := 16#0#; -- Burst Signal Selection - BURST : CMR0_WAVE_EQ_1_BURST_Field := ATSAM3X8E.TC.None; + BURST : CMR0_WAVE_EQ_1_BURST_Field := ATSAM3X8E.TC.NONE; -- Counter Clock Stopped with RC Compare CPCSTOP : TC0_CMR0_WAVE_EQ_1_CPCSTOP_Field := 16#0#; -- Counter Clock Disable with RC Compare CPCDIS : TC0_CMR0_WAVE_EQ_1_CPCDIS_Field := 16#0#; -- External Event Edge Selection - EEVTEDG : CMR0_WAVE_EQ_1_EEVTEDG_Field := ATSAM3X8E.TC.None; + EEVTEDG : CMR0_WAVE_EQ_1_EEVTEDG_Field := ATSAM3X8E.TC.NONE; -- External Event Selection - EEVT : CMR0_WAVE_EQ_1_EEVT_Field := ATSAM3X8E.TC.Tiob; + EEVT : CMR0_WAVE_EQ_1_EEVT_Field := ATSAM3X8E.TC.TIOB; -- External Event Trigger Enable ENETRG : TC0_CMR0_WAVE_EQ_1_ENETRG_Field := 16#0#; -- Waveform Selection - WAVSEL : CMR0_WAVE_EQ_1_WAVSEL_Field := ATSAM3X8E.TC.Up; + WAVSEL : CMR0_WAVE_EQ_1_WAVSEL_Field := ATSAM3X8E.TC.UP; -- Waveform Mode WAVE : TC0_CMR0_WAVE_EQ_1_WAVE_Field := 16#0#; -- RA Compare Effect on TIOA - ACPA : CMR0_WAVE_EQ_1_ACPA_Field := ATSAM3X8E.TC.None; + ACPA : CMR0_WAVE_EQ_1_ACPA_Field := ATSAM3X8E.TC.NONE; -- RC Compare Effect on TIOA - ACPC : CMR0_WAVE_EQ_1_ACPC_Field := ATSAM3X8E.TC.None; + ACPC : CMR0_WAVE_EQ_1_ACPC_Field := ATSAM3X8E.TC.NONE; -- External Event Effect on TIOA - AEEVT : CMR0_WAVE_EQ_1_AEEVT_Field := ATSAM3X8E.TC.None; + AEEVT : CMR0_WAVE_EQ_1_AEEVT_Field := ATSAM3X8E.TC.NONE; -- Software Trigger Effect on TIOA - ASWTRG : CMR0_WAVE_EQ_1_ASWTRG_Field := ATSAM3X8E.TC.None; + ASWTRG : CMR0_WAVE_EQ_1_ASWTRG_Field := ATSAM3X8E.TC.NONE; -- RB Compare Effect on TIOB - BCPB : CMR0_WAVE_EQ_1_BCPB_Field := ATSAM3X8E.TC.None; + BCPB : CMR0_WAVE_EQ_1_BCPB_Field := ATSAM3X8E.TC.NONE; -- RC Compare Effect on TIOB - BCPC : CMR0_WAVE_EQ_1_BCPC_Field := ATSAM3X8E.TC.None; + BCPC : CMR0_WAVE_EQ_1_BCPC_Field := ATSAM3X8E.TC.NONE; -- External Event Effect on TIOB - BEEVT : CMR0_WAVE_EQ_1_BEEVT_Field := ATSAM3X8E.TC.None; + BEEVT : CMR0_WAVE_EQ_1_BEEVT_Field := ATSAM3X8E.TC.NONE; -- Software Trigger Effect on TIOB - BSWTRG : CMR0_WAVE_EQ_1_BSWTRG_Field := ATSAM3X8E.TC.None; + BSWTRG : CMR0_WAVE_EQ_1_BSWTRG_Field := ATSAM3X8E.TC.NONE; end record with Object_Size => 32, Bit_Order => System.Low_Order_First; @@ -709,50 +708,50 @@ package ATSAM3X8E.TC is -- Clock Selection type CMR1_WAVE_EQ_1_TCCLKS_Field is (-- Clock selected: TCLK1 - Timer_Clock1, + TIMER_CLOCK1, -- Clock selected: TCLK2 - Timer_Clock2, + TIMER_CLOCK2, -- Clock selected: TCLK3 - Timer_Clock3, + TIMER_CLOCK3, -- Clock selected: TCLK4 - Timer_Clock4, + TIMER_CLOCK4, -- Clock selected: TCLK5 - Timer_Clock5, + TIMER_CLOCK5, -- Clock selected: XC0 - Xc0, + XC0, -- Clock selected: XC1 - Xc1, + XC1, -- Clock selected: XC2 - Xc2) + XC2) with Size => 3; for CMR1_WAVE_EQ_1_TCCLKS_Field use - (Timer_Clock1 => 0, - Timer_Clock2 => 1, - Timer_Clock3 => 2, - Timer_Clock4 => 3, - Timer_Clock5 => 4, - Xc0 => 5, - Xc1 => 6, - Xc2 => 7); + (TIMER_CLOCK1 => 0, + TIMER_CLOCK2 => 1, + TIMER_CLOCK3 => 2, + TIMER_CLOCK4 => 3, + TIMER_CLOCK5 => 4, + XC0 => 5, + XC1 => 6, + XC2 => 7); subtype TC0_CMR1_WAVE_EQ_1_CLKI_Field is ATSAM3X8E.Bit; -- Burst Signal Selection type CMR1_WAVE_EQ_1_BURST_Field is (-- The clock is not gated by an external signal. - None, + NONE, -- XC0 is ANDed with the selected clock. - Xc0, + XC0, -- XC1 is ANDed with the selected clock. - Xc1, + XC1, -- XC2 is ANDed with the selected clock. - Xc2) + XC2) with Size => 2; for CMR1_WAVE_EQ_1_BURST_Field use - (None => 0, - Xc0 => 1, - Xc1 => 2, - Xc2 => 3); + (NONE => 0, + XC0 => 1, + XC1 => 2, + XC2 => 3); subtype TC0_CMR1_WAVE_EQ_1_CPCSTOP_Field is ATSAM3X8E.Bit; subtype TC0_CMR1_WAVE_EQ_1_CPCDIS_Field is ATSAM3X8E.Bit; @@ -760,232 +759,232 @@ package ATSAM3X8E.TC is -- External Event Edge Selection type CMR1_WAVE_EQ_1_EEVTEDG_Field is (-- None - None, + NONE, -- Rising edge - Rising, + RISING, -- Falling edge - Falling, + FALLING, -- Each edge - Edge) + EDGE) with Size => 2; for CMR1_WAVE_EQ_1_EEVTEDG_Field use - (None => 0, - Rising => 1, - Falling => 2, - Edge => 3); + (NONE => 0, + RISING => 1, + FALLING => 2, + EDGE => 3); -- External Event Selection type CMR1_WAVE_EQ_1_EEVT_Field is (-- TIOB - Tiob, + TIOB, -- XC0 - Xc0, + XC0, -- XC1 - Xc1, + XC1, -- XC2 - Xc2) + XC2) with Size => 2; for CMR1_WAVE_EQ_1_EEVT_Field use - (Tiob => 0, - Xc0 => 1, - Xc1 => 2, - Xc2 => 3); + (TIOB => 0, + XC0 => 1, + XC1 => 2, + XC2 => 3); subtype TC0_CMR1_WAVE_EQ_1_ENETRG_Field is ATSAM3X8E.Bit; -- Waveform Selection type CMR1_WAVE_EQ_1_WAVSEL_Field is (-- UP mode without automatic trigger on RC Compare - Up, + UP, -- UPDOWN mode without automatic trigger on RC Compare - Updown, + UPDOWN, -- UP mode with automatic trigger on RC Compare - Up_Rc, + UP_RC, -- UPDOWN mode with automatic trigger on RC Compare - Updown_Rc) + UPDOWN_RC) with Size => 2; for CMR1_WAVE_EQ_1_WAVSEL_Field use - (Up => 0, - Updown => 1, - Up_Rc => 2, - Updown_Rc => 3); + (UP => 0, + UPDOWN => 1, + UP_RC => 2, + UPDOWN_RC => 3); subtype TC0_CMR1_WAVE_EQ_1_WAVE_Field is ATSAM3X8E.Bit; -- RA Compare Effect on TIOA type CMR1_WAVE_EQ_1_ACPA_Field is (-- None - None, + NONE, -- Set - Set, + SET, -- Clear - Clear, + CLEAR, -- Toggle - Toggle) + TOGGLE) with Size => 2; for CMR1_WAVE_EQ_1_ACPA_Field use - (None => 0, - Set => 1, - Clear => 2, - Toggle => 3); + (NONE => 0, + SET => 1, + CLEAR => 2, + TOGGLE => 3); -- RC Compare Effect on TIOA type CMR1_WAVE_EQ_1_ACPC_Field is (-- None - None, + NONE, -- Set - Set, + SET, -- Clear - Clear, + CLEAR, -- Toggle - Toggle) + TOGGLE) with Size => 2; for CMR1_WAVE_EQ_1_ACPC_Field use - (None => 0, - Set => 1, - Clear => 2, - Toggle => 3); + (NONE => 0, + SET => 1, + CLEAR => 2, + TOGGLE => 3); -- External Event Effect on TIOA type CMR1_WAVE_EQ_1_AEEVT_Field is (-- None - None, + NONE, -- Set - Set, + SET, -- Clear - Clear, + CLEAR, -- Toggle - Toggle) + TOGGLE) with Size => 2; for CMR1_WAVE_EQ_1_AEEVT_Field use - (None => 0, - Set => 1, - Clear => 2, - Toggle => 3); + (NONE => 0, + SET => 1, + CLEAR => 2, + TOGGLE => 3); -- Software Trigger Effect on TIOA type CMR1_WAVE_EQ_1_ASWTRG_Field is (-- None - None, + NONE, -- Set - Set, + SET, -- Clear - Clear, + CLEAR, -- Toggle - Toggle) + TOGGLE) with Size => 2; for CMR1_WAVE_EQ_1_ASWTRG_Field use - (None => 0, - Set => 1, - Clear => 2, - Toggle => 3); + (NONE => 0, + SET => 1, + CLEAR => 2, + TOGGLE => 3); -- RB Compare Effect on TIOB type CMR1_WAVE_EQ_1_BCPB_Field is (-- None - None, + NONE, -- Set - Set, + SET, -- Clear - Clear, + CLEAR, -- Toggle - Toggle) + TOGGLE) with Size => 2; for CMR1_WAVE_EQ_1_BCPB_Field use - (None => 0, - Set => 1, - Clear => 2, - Toggle => 3); + (NONE => 0, + SET => 1, + CLEAR => 2, + TOGGLE => 3); -- RC Compare Effect on TIOB type CMR1_WAVE_EQ_1_BCPC_Field is (-- None - None, + NONE, -- Set - Set, + SET, -- Clear - Clear, + CLEAR, -- Toggle - Toggle) + TOGGLE) with Size => 2; for CMR1_WAVE_EQ_1_BCPC_Field use - (None => 0, - Set => 1, - Clear => 2, - Toggle => 3); + (NONE => 0, + SET => 1, + CLEAR => 2, + TOGGLE => 3); -- External Event Effect on TIOB type CMR1_WAVE_EQ_1_BEEVT_Field is (-- None - None, + NONE, -- Set - Set, + SET, -- Clear - Clear, + CLEAR, -- Toggle - Toggle) + TOGGLE) with Size => 2; for CMR1_WAVE_EQ_1_BEEVT_Field use - (None => 0, - Set => 1, - Clear => 2, - Toggle => 3); + (NONE => 0, + SET => 1, + CLEAR => 2, + TOGGLE => 3); -- Software Trigger Effect on TIOB type CMR1_WAVE_EQ_1_BSWTRG_Field is (-- None - None, + NONE, -- Set - Set, + SET, -- Clear - Clear, + CLEAR, -- Toggle - Toggle) + TOGGLE) with Size => 2; for CMR1_WAVE_EQ_1_BSWTRG_Field use - (None => 0, - Set => 1, - Clear => 2, - Toggle => 3); + (NONE => 0, + SET => 1, + CLEAR => 2, + TOGGLE => 3); -- Channel Mode Register (channel = 1) type TC0_CMR1_WAVE_EQ_1_Register is record -- Clock Selection - TCCLKS : CMR1_WAVE_EQ_1_TCCLKS_Field := ATSAM3X8E.TC.Timer_Clock1; + TCCLKS : CMR1_WAVE_EQ_1_TCCLKS_Field := ATSAM3X8E.TC.TIMER_CLOCK1; -- Clock Invert CLKI : TC0_CMR1_WAVE_EQ_1_CLKI_Field := 16#0#; -- Burst Signal Selection - BURST : CMR1_WAVE_EQ_1_BURST_Field := ATSAM3X8E.TC.None; + BURST : CMR1_WAVE_EQ_1_BURST_Field := ATSAM3X8E.TC.NONE; -- Counter Clock Stopped with RC Compare CPCSTOP : TC0_CMR1_WAVE_EQ_1_CPCSTOP_Field := 16#0#; -- Counter Clock Disable with RC Compare CPCDIS : TC0_CMR1_WAVE_EQ_1_CPCDIS_Field := 16#0#; -- External Event Edge Selection - EEVTEDG : CMR1_WAVE_EQ_1_EEVTEDG_Field := ATSAM3X8E.TC.None; + EEVTEDG : CMR1_WAVE_EQ_1_EEVTEDG_Field := ATSAM3X8E.TC.NONE; -- External Event Selection - EEVT : CMR1_WAVE_EQ_1_EEVT_Field := ATSAM3X8E.TC.Tiob; + EEVT : CMR1_WAVE_EQ_1_EEVT_Field := ATSAM3X8E.TC.TIOB; -- External Event Trigger Enable ENETRG : TC0_CMR1_WAVE_EQ_1_ENETRG_Field := 16#0#; -- Waveform Selection - WAVSEL : CMR1_WAVE_EQ_1_WAVSEL_Field := ATSAM3X8E.TC.Up; + WAVSEL : CMR1_WAVE_EQ_1_WAVSEL_Field := ATSAM3X8E.TC.UP; -- Waveform Mode WAVE : TC0_CMR1_WAVE_EQ_1_WAVE_Field := 16#0#; -- RA Compare Effect on TIOA - ACPA : CMR1_WAVE_EQ_1_ACPA_Field := ATSAM3X8E.TC.None; + ACPA : CMR1_WAVE_EQ_1_ACPA_Field := ATSAM3X8E.TC.NONE; -- RC Compare Effect on TIOA - ACPC : CMR1_WAVE_EQ_1_ACPC_Field := ATSAM3X8E.TC.None; + ACPC : CMR1_WAVE_EQ_1_ACPC_Field := ATSAM3X8E.TC.NONE; -- External Event Effect on TIOA - AEEVT : CMR1_WAVE_EQ_1_AEEVT_Field := ATSAM3X8E.TC.None; + AEEVT : CMR1_WAVE_EQ_1_AEEVT_Field := ATSAM3X8E.TC.NONE; -- Software Trigger Effect on TIOA - ASWTRG : CMR1_WAVE_EQ_1_ASWTRG_Field := ATSAM3X8E.TC.None; + ASWTRG : CMR1_WAVE_EQ_1_ASWTRG_Field := ATSAM3X8E.TC.NONE; -- RB Compare Effect on TIOB - BCPB : CMR1_WAVE_EQ_1_BCPB_Field := ATSAM3X8E.TC.None; + BCPB : CMR1_WAVE_EQ_1_BCPB_Field := ATSAM3X8E.TC.NONE; -- RC Compare Effect on TIOB - BCPC : CMR1_WAVE_EQ_1_BCPC_Field := ATSAM3X8E.TC.None; + BCPC : CMR1_WAVE_EQ_1_BCPC_Field := ATSAM3X8E.TC.NONE; -- External Event Effect on TIOB - BEEVT : CMR1_WAVE_EQ_1_BEEVT_Field := ATSAM3X8E.TC.None; + BEEVT : CMR1_WAVE_EQ_1_BEEVT_Field := ATSAM3X8E.TC.NONE; -- Software Trigger Effect on TIOB - BSWTRG : CMR1_WAVE_EQ_1_BSWTRG_Field := ATSAM3X8E.TC.None; + BSWTRG : CMR1_WAVE_EQ_1_BSWTRG_Field := ATSAM3X8E.TC.NONE; end record with Object_Size => 32, Bit_Order => System.Low_Order_First; @@ -1013,50 +1012,50 @@ package ATSAM3X8E.TC is -- Clock Selection type CMR2_WAVE_EQ_1_TCCLKS_Field is (-- Clock selected: TCLK1 - Timer_Clock1, + TIMER_CLOCK1, -- Clock selected: TCLK2 - Timer_Clock2, + TIMER_CLOCK2, -- Clock selected: TCLK3 - Timer_Clock3, + TIMER_CLOCK3, -- Clock selected: TCLK4 - Timer_Clock4, + TIMER_CLOCK4, -- Clock selected: TCLK5 - Timer_Clock5, + TIMER_CLOCK5, -- Clock selected: XC0 - Xc0, + XC0, -- Clock selected: XC1 - Xc1, + XC1, -- Clock selected: XC2 - Xc2) + XC2) with Size => 3; for CMR2_WAVE_EQ_1_TCCLKS_Field use - (Timer_Clock1 => 0, - Timer_Clock2 => 1, - Timer_Clock3 => 2, - Timer_Clock4 => 3, - Timer_Clock5 => 4, - Xc0 => 5, - Xc1 => 6, - Xc2 => 7); + (TIMER_CLOCK1 => 0, + TIMER_CLOCK2 => 1, + TIMER_CLOCK3 => 2, + TIMER_CLOCK4 => 3, + TIMER_CLOCK5 => 4, + XC0 => 5, + XC1 => 6, + XC2 => 7); subtype TC0_CMR2_WAVE_EQ_1_CLKI_Field is ATSAM3X8E.Bit; -- Burst Signal Selection type CMR2_WAVE_EQ_1_BURST_Field is (-- The clock is not gated by an external signal. - None, + NONE, -- XC0 is ANDed with the selected clock. - Xc0, + XC0, -- XC1 is ANDed with the selected clock. - Xc1, + XC1, -- XC2 is ANDed with the selected clock. - Xc2) + XC2) with Size => 2; for CMR2_WAVE_EQ_1_BURST_Field use - (None => 0, - Xc0 => 1, - Xc1 => 2, - Xc2 => 3); + (NONE => 0, + XC0 => 1, + XC1 => 2, + XC2 => 3); subtype TC0_CMR2_WAVE_EQ_1_CPCSTOP_Field is ATSAM3X8E.Bit; subtype TC0_CMR2_WAVE_EQ_1_CPCDIS_Field is ATSAM3X8E.Bit; @@ -1064,232 +1063,232 @@ package ATSAM3X8E.TC is -- External Event Edge Selection type CMR2_WAVE_EQ_1_EEVTEDG_Field is (-- None - None, + NONE, -- Rising edge - Rising, + RISING, -- Falling edge - Falling, + FALLING, -- Each edge - Edge) + EDGE) with Size => 2; for CMR2_WAVE_EQ_1_EEVTEDG_Field use - (None => 0, - Rising => 1, - Falling => 2, - Edge => 3); + (NONE => 0, + RISING => 1, + FALLING => 2, + EDGE => 3); -- External Event Selection type CMR2_WAVE_EQ_1_EEVT_Field is (-- TIOB - Tiob, + TIOB, -- XC0 - Xc0, + XC0, -- XC1 - Xc1, + XC1, -- XC2 - Xc2) + XC2) with Size => 2; for CMR2_WAVE_EQ_1_EEVT_Field use - (Tiob => 0, - Xc0 => 1, - Xc1 => 2, - Xc2 => 3); + (TIOB => 0, + XC0 => 1, + XC1 => 2, + XC2 => 3); subtype TC0_CMR2_WAVE_EQ_1_ENETRG_Field is ATSAM3X8E.Bit; -- Waveform Selection type CMR2_WAVE_EQ_1_WAVSEL_Field is (-- UP mode without automatic trigger on RC Compare - Up, + UP, -- UPDOWN mode without automatic trigger on RC Compare - Updown, + UPDOWN, -- UP mode with automatic trigger on RC Compare - Up_Rc, + UP_RC, -- UPDOWN mode with automatic trigger on RC Compare - Updown_Rc) + UPDOWN_RC) with Size => 2; for CMR2_WAVE_EQ_1_WAVSEL_Field use - (Up => 0, - Updown => 1, - Up_Rc => 2, - Updown_Rc => 3); + (UP => 0, + UPDOWN => 1, + UP_RC => 2, + UPDOWN_RC => 3); subtype TC0_CMR2_WAVE_EQ_1_WAVE_Field is ATSAM3X8E.Bit; -- RA Compare Effect on TIOA type CMR2_WAVE_EQ_1_ACPA_Field is (-- None - None, + NONE, -- Set - Set, + SET, -- Clear - Clear, + CLEAR, -- Toggle - Toggle) + TOGGLE) with Size => 2; for CMR2_WAVE_EQ_1_ACPA_Field use - (None => 0, - Set => 1, - Clear => 2, - Toggle => 3); + (NONE => 0, + SET => 1, + CLEAR => 2, + TOGGLE => 3); -- RC Compare Effect on TIOA type CMR2_WAVE_EQ_1_ACPC_Field is (-- None - None, + NONE, -- Set - Set, + SET, -- Clear - Clear, + CLEAR, -- Toggle - Toggle) + TOGGLE) with Size => 2; for CMR2_WAVE_EQ_1_ACPC_Field use - (None => 0, - Set => 1, - Clear => 2, - Toggle => 3); + (NONE => 0, + SET => 1, + CLEAR => 2, + TOGGLE => 3); -- External Event Effect on TIOA type CMR2_WAVE_EQ_1_AEEVT_Field is (-- None - None, + NONE, -- Set - Set, + SET, -- Clear - Clear, + CLEAR, -- Toggle - Toggle) + TOGGLE) with Size => 2; for CMR2_WAVE_EQ_1_AEEVT_Field use - (None => 0, - Set => 1, - Clear => 2, - Toggle => 3); + (NONE => 0, + SET => 1, + CLEAR => 2, + TOGGLE => 3); -- Software Trigger Effect on TIOA type CMR2_WAVE_EQ_1_ASWTRG_Field is (-- None - None, + NONE, -- Set - Set, + SET, -- Clear - Clear, + CLEAR, -- Toggle - Toggle) + TOGGLE) with Size => 2; for CMR2_WAVE_EQ_1_ASWTRG_Field use - (None => 0, - Set => 1, - Clear => 2, - Toggle => 3); + (NONE => 0, + SET => 1, + CLEAR => 2, + TOGGLE => 3); -- RB Compare Effect on TIOB type CMR2_WAVE_EQ_1_BCPB_Field is (-- None - None, + NONE, -- Set - Set, + SET, -- Clear - Clear, + CLEAR, -- Toggle - Toggle) + TOGGLE) with Size => 2; for CMR2_WAVE_EQ_1_BCPB_Field use - (None => 0, - Set => 1, - Clear => 2, - Toggle => 3); + (NONE => 0, + SET => 1, + CLEAR => 2, + TOGGLE => 3); -- RC Compare Effect on TIOB type CMR2_WAVE_EQ_1_BCPC_Field is (-- None - None, + NONE, -- Set - Set, + SET, -- Clear - Clear, + CLEAR, -- Toggle - Toggle) + TOGGLE) with Size => 2; for CMR2_WAVE_EQ_1_BCPC_Field use - (None => 0, - Set => 1, - Clear => 2, - Toggle => 3); + (NONE => 0, + SET => 1, + CLEAR => 2, + TOGGLE => 3); -- External Event Effect on TIOB type CMR2_WAVE_EQ_1_BEEVT_Field is (-- None - None, + NONE, -- Set - Set, + SET, -- Clear - Clear, + CLEAR, -- Toggle - Toggle) + TOGGLE) with Size => 2; for CMR2_WAVE_EQ_1_BEEVT_Field use - (None => 0, - Set => 1, - Clear => 2, - Toggle => 3); + (NONE => 0, + SET => 1, + CLEAR => 2, + TOGGLE => 3); -- Software Trigger Effect on TIOB type CMR2_WAVE_EQ_1_BSWTRG_Field is (-- None - None, + NONE, -- Set - Set, + SET, -- Clear - Clear, + CLEAR, -- Toggle - Toggle) + TOGGLE) with Size => 2; for CMR2_WAVE_EQ_1_BSWTRG_Field use - (None => 0, - Set => 1, - Clear => 2, - Toggle => 3); + (NONE => 0, + SET => 1, + CLEAR => 2, + TOGGLE => 3); -- Channel Mode Register (channel = 2) type TC0_CMR2_WAVE_EQ_1_Register is record -- Clock Selection - TCCLKS : CMR2_WAVE_EQ_1_TCCLKS_Field := ATSAM3X8E.TC.Timer_Clock1; + TCCLKS : CMR2_WAVE_EQ_1_TCCLKS_Field := ATSAM3X8E.TC.TIMER_CLOCK1; -- Clock Invert CLKI : TC0_CMR2_WAVE_EQ_1_CLKI_Field := 16#0#; -- Burst Signal Selection - BURST : CMR2_WAVE_EQ_1_BURST_Field := ATSAM3X8E.TC.None; + BURST : CMR2_WAVE_EQ_1_BURST_Field := ATSAM3X8E.TC.NONE; -- Counter Clock Stopped with RC Compare CPCSTOP : TC0_CMR2_WAVE_EQ_1_CPCSTOP_Field := 16#0#; -- Counter Clock Disable with RC Compare CPCDIS : TC0_CMR2_WAVE_EQ_1_CPCDIS_Field := 16#0#; -- External Event Edge Selection - EEVTEDG : CMR2_WAVE_EQ_1_EEVTEDG_Field := ATSAM3X8E.TC.None; + EEVTEDG : CMR2_WAVE_EQ_1_EEVTEDG_Field := ATSAM3X8E.TC.NONE; -- External Event Selection - EEVT : CMR2_WAVE_EQ_1_EEVT_Field := ATSAM3X8E.TC.Tiob; + EEVT : CMR2_WAVE_EQ_1_EEVT_Field := ATSAM3X8E.TC.TIOB; -- External Event Trigger Enable ENETRG : TC0_CMR2_WAVE_EQ_1_ENETRG_Field := 16#0#; -- Waveform Selection - WAVSEL : CMR2_WAVE_EQ_1_WAVSEL_Field := ATSAM3X8E.TC.Up; + WAVSEL : CMR2_WAVE_EQ_1_WAVSEL_Field := ATSAM3X8E.TC.UP; -- Waveform Mode WAVE : TC0_CMR2_WAVE_EQ_1_WAVE_Field := 16#0#; -- RA Compare Effect on TIOA - ACPA : CMR2_WAVE_EQ_1_ACPA_Field := ATSAM3X8E.TC.None; + ACPA : CMR2_WAVE_EQ_1_ACPA_Field := ATSAM3X8E.TC.NONE; -- RC Compare Effect on TIOA - ACPC : CMR2_WAVE_EQ_1_ACPC_Field := ATSAM3X8E.TC.None; + ACPC : CMR2_WAVE_EQ_1_ACPC_Field := ATSAM3X8E.TC.NONE; -- External Event Effect on TIOA - AEEVT : CMR2_WAVE_EQ_1_AEEVT_Field := ATSAM3X8E.TC.None; + AEEVT : CMR2_WAVE_EQ_1_AEEVT_Field := ATSAM3X8E.TC.NONE; -- Software Trigger Effect on TIOA - ASWTRG : CMR2_WAVE_EQ_1_ASWTRG_Field := ATSAM3X8E.TC.None; + ASWTRG : CMR2_WAVE_EQ_1_ASWTRG_Field := ATSAM3X8E.TC.NONE; -- RB Compare Effect on TIOB - BCPB : CMR2_WAVE_EQ_1_BCPB_Field := ATSAM3X8E.TC.None; + BCPB : CMR2_WAVE_EQ_1_BCPB_Field := ATSAM3X8E.TC.NONE; -- RC Compare Effect on TIOB - BCPC : CMR2_WAVE_EQ_1_BCPC_Field := ATSAM3X8E.TC.None; + BCPC : CMR2_WAVE_EQ_1_BCPC_Field := ATSAM3X8E.TC.NONE; -- External Event Effect on TIOB - BEEVT : CMR2_WAVE_EQ_1_BEEVT_Field := ATSAM3X8E.TC.None; + BEEVT : CMR2_WAVE_EQ_1_BEEVT_Field := ATSAM3X8E.TC.NONE; -- Software Trigger Effect on TIOB - BSWTRG : CMR2_WAVE_EQ_1_BSWTRG_Field := ATSAM3X8E.TC.None; + BSWTRG : CMR2_WAVE_EQ_1_BSWTRG_Field := ATSAM3X8E.TC.NONE; end record with Object_Size => 32, Bit_Order => System.Low_Order_First; @@ -1333,44 +1332,44 @@ package ATSAM3X8E.TC is -- External Clock Signal 0 Selection type BMR_TC0XC0S_Field is (-- Signal connected to XC0: TCLK0 - Tclk0, + TCLK0, -- Signal connected to XC0: TIOA1 - Tioa1, + TIOA1, -- Signal connected to XC0: TIOA2 - Tioa2) + TIOA2) with Size => 2; for BMR_TC0XC0S_Field use - (Tclk0 => 0, - Tioa1 => 2, - Tioa2 => 3); + (TCLK0 => 0, + TIOA1 => 2, + TIOA2 => 3); -- External Clock Signal 1 Selection type BMR_TC1XC1S_Field is (-- Signal connected to XC1: TCLK1 - Tclk1, + TCLK1, -- Signal connected to XC1: TIOA0 - Tioa0, + TIOA0, -- Signal connected to XC1: TIOA2 - Tioa2) + TIOA2) with Size => 2; for BMR_TC1XC1S_Field use - (Tclk1 => 0, - Tioa0 => 2, - Tioa2 => 3); + (TCLK1 => 0, + TIOA0 => 2, + TIOA2 => 3); -- External Clock Signal 2 Selection type BMR_TC2XC2S_Field is (-- Signal connected to XC2: TCLK2 - Tclk2, + TCLK2, -- Signal connected to XC2: TIOA1 - Tioa1, + TIOA1, -- Signal connected to XC2: TIOA2 - Tioa2) + TIOA2) with Size => 2; for BMR_TC2XC2S_Field use - (Tclk2 => 0, - Tioa1 => 2, - Tioa2 => 3); + (TCLK2 => 0, + TIOA1 => 2, + TIOA2 => 3); subtype TC0_BMR_QDEN_Field is ATSAM3X8E.Bit; subtype TC0_BMR_POSEN_Field is ATSAM3X8E.Bit; @@ -1388,11 +1387,11 @@ package ATSAM3X8E.TC is -- Block Mode Register type TC0_BMR_Register is record -- External Clock Signal 0 Selection - TC0XC0S : BMR_TC0XC0S_Field := ATSAM3X8E.TC.Tclk0; + TC0XC0S : BMR_TC0XC0S_Field := ATSAM3X8E.TC.TCLK0; -- External Clock Signal 1 Selection - TC1XC1S : BMR_TC1XC1S_Field := ATSAM3X8E.TC.Tclk1; + TC1XC1S : BMR_TC1XC1S_Field := ATSAM3X8E.TC.TCLK1; -- External Clock Signal 2 Selection - TC2XC2S : BMR_TC2XC2S_Field := ATSAM3X8E.TC.Tclk2; + TC2XC2S : BMR_TC2XC2S_Field := ATSAM3X8E.TC.TCLK2; -- unspecified Reserved_6_7 : ATSAM3X8E.UInt2 := 16#0#; -- Quadrature Decoder ENabled @@ -1616,7 +1615,7 @@ package ATSAM3X8E.TC is type TC0_Disc is (Default, - Wave_Eq_1); + WAVE_EQ_1); -- Timer Counter 0 type TC_Peripheral @@ -1735,7 +1734,7 @@ package ATSAM3X8E.TC is -- Channel Mode Register (channel = 2) CMR2 : aliased CMR_Register; pragma Volatile_Full_Access (CMR2); - when Wave_Eq_1 => + when WAVE_EQ_1 => -- Channel Mode Register (channel = 0) CMR0_WAVE_EQ_1 : aliased TC0_CMR0_WAVE_EQ_1_Register; pragma Volatile_Full_Access (CMR0_WAVE_EQ_1); diff --git a/arduino-due/atsam3x8e/atsam3x8e-trng.ads b/arduino-due/atsam3x8e/atsam3x8e-trng.ads index 9cda455..3b36ac8 100644 --- a/arduino-due/atsam3x8e/atsam3x8e-trng.ads +++ b/arduino-due/atsam3x8e/atsam3x8e-trng.ads @@ -1,4 +1,3 @@ -pragma Ada_2012; pragma Style_Checks (Off); -- This spec has been automatically generated from ATSAM3X8E.svd diff --git a/arduino-due/atsam3x8e/atsam3x8e-twi.ads b/arduino-due/atsam3x8e/atsam3x8e-twi.ads index f3fda91..735f714 100644 --- a/arduino-due/atsam3x8e/atsam3x8e-twi.ads +++ b/arduino-due/atsam3x8e/atsam3x8e-twi.ads @@ -1,4 +1,3 @@ -pragma Ada_2012; pragma Style_Checks (Off); -- This spec has been automatically generated from ATSAM3X8E.svd @@ -61,19 +60,19 @@ package ATSAM3X8E.TWI is -- Internal Device Address Size type MMR_IADRSZ_Field is (-- No internal device address - None, + NONE, -- One-byte internal device address - Val_1_Byte, + Val_1_BYTE, -- Two-byte internal device address - Val_2_Byte, + Val_2_BYTE, -- Three-byte internal device address - Val_3_Byte) + Val_3_BYTE) with Size => 2; for MMR_IADRSZ_Field use - (None => 0, - Val_1_Byte => 1, - Val_2_Byte => 2, - Val_3_Byte => 3); + (NONE => 0, + Val_1_BYTE => 1, + Val_2_BYTE => 2, + Val_3_BYTE => 3); subtype TWI0_MMR_MREAD_Field is ATSAM3X8E.Bit; subtype TWI0_MMR_DADR_Field is ATSAM3X8E.UInt7; @@ -83,7 +82,7 @@ package ATSAM3X8E.TWI is -- unspecified Reserved_0_7 : ATSAM3X8E.Byte := 16#0#; -- Internal Device Address Size - IADRSZ : MMR_IADRSZ_Field := ATSAM3X8E.TWI.None; + IADRSZ : MMR_IADRSZ_Field := ATSAM3X8E.TWI.NONE; -- unspecified Reserved_10_11 : ATSAM3X8E.UInt2 := 16#0#; -- Master Read Direction diff --git a/arduino-due/atsam3x8e/atsam3x8e-uart.ads b/arduino-due/atsam3x8e/atsam3x8e-uart.ads index 7f009bc..200c47c 100644 --- a/arduino-due/atsam3x8e/atsam3x8e-uart.ads +++ b/arduino-due/atsam3x8e/atsam3x8e-uart.ads @@ -1,4 +1,3 @@ -pragma Ada_2012; pragma Style_Checks (Off); -- This spec has been automatically generated from ATSAM3X8E.svd @@ -61,50 +60,50 @@ package ATSAM3X8E.UART is -- Parity Type type MR_PAR_Field is (-- Even parity - Even, + EVEN, -- Odd parity - Odd, + ODD, -- Space: parity forced to 0 - Space, + SPACE, -- Mark: parity forced to 1 - Mark, + MARK, -- No parity - No) + NO) with Size => 3; for MR_PAR_Field use - (Even => 0, - Odd => 1, - Space => 2, - Mark => 3, - No => 4); + (EVEN => 0, + ODD => 1, + SPACE => 2, + MARK => 3, + NO => 4); -- Channel Mode type MR_CHMODE_Field is (-- Normal Mode - Normal, + NORMAL, -- Automatic Echo - Automatic, + AUTOMATIC, -- Local Loopback - Local_Loopback, + LOCAL_LOOPBACK, -- Remote Loopback - Remote_Loopback) + REMOTE_LOOPBACK) with Size => 2; for MR_CHMODE_Field use - (Normal => 0, - Automatic => 1, - Local_Loopback => 2, - Remote_Loopback => 3); + (NORMAL => 0, + AUTOMATIC => 1, + LOCAL_LOOPBACK => 2, + REMOTE_LOOPBACK => 3); -- Mode Register type UART_MR_Register is record -- unspecified Reserved_0_8 : ATSAM3X8E.UInt9 := 16#0#; -- Parity Type - PAR : MR_PAR_Field := ATSAM3X8E.UART.Even; + PAR : MR_PAR_Field := ATSAM3X8E.UART.EVEN; -- unspecified Reserved_12_13 : ATSAM3X8E.UInt2 := 16#0#; -- Channel Mode - CHMODE : MR_CHMODE_Field := ATSAM3X8E.UART.Normal; + CHMODE : MR_CHMODE_Field := ATSAM3X8E.UART.NORMAL; -- unspecified Reserved_16_31 : ATSAM3X8E.UInt16 := 16#0#; end record diff --git a/arduino-due/atsam3x8e/atsam3x8e-uotghs.ads b/arduino-due/atsam3x8e/atsam3x8e-uotghs.ads index 947025a..4c44ae5 100644 --- a/arduino-due/atsam3x8e/atsam3x8e-uotghs.ads +++ b/arduino-due/atsam3x8e/atsam3x8e-uotghs.ads @@ -1,4 +1,3 @@ -pragma Ada_2012; pragma Style_Checks (Off); -- This spec has been automatically generated from ATSAM3X8E.svd @@ -24,20 +23,20 @@ package ATSAM3X8E.UOTGHS is type DEVCTRL_SPDCONF_Field is (-- The peripheral starts in full-speed mode and performs a high-speed reset to -- switch to the high-speed mode if the host is high-speed capable. - Normal, + NORMAL, -- For a better consumption, if high-speed is not needed. - Low_Power, + LOW_POWER, -- Forced high speed. - High_Speed, + HIGH_SPEED, -- The peripheral remains in full-speed mode whatever the host speed -- capability. - Forced_Fs) + FORCED_FS) with Size => 2; for DEVCTRL_SPDCONF_Field use - (Normal => 0, - Low_Power => 1, - High_Speed => 2, - Forced_Fs => 3); + (NORMAL => 0, + LOW_POWER => 1, + HIGH_SPEED => 2, + FORCED_FS => 3); subtype UOTGHS_DEVCTRL_LS_Field is ATSAM3X8E.Bit; subtype UOTGHS_DEVCTRL_TSTJ_Field is ATSAM3X8E.Bit; @@ -56,7 +55,7 @@ package ATSAM3X8E.UOTGHS is -- Remote Wake-Up RMWKUP : UOTGHS_DEVCTRL_RMWKUP_Field := 16#0#; -- Mode Configuration - SPDCONF : DEVCTRL_SPDCONF_Field := ATSAM3X8E.UOTGHS.Normal; + SPDCONF : DEVCTRL_SPDCONF_Field := ATSAM3X8E.UOTGHS.NORMAL; -- Low-Speed Mode Force LS : UOTGHS_DEVCTRL_LS_Field := 16#0#; -- Test mode J @@ -743,95 +742,95 @@ package ATSAM3X8E.UOTGHS is -- Endpoint Banks type DEVEPTCFG_EPBK_Field is (-- Single-bank endpoint - Val_1_Bank, + Val_1_BANK, -- Double-bank endpoint - Val_2_Bank, + Val_2_BANK, -- Triple-bank endpoint - Val_3_Bank) + Val_3_BANK) with Size => 2; for DEVEPTCFG_EPBK_Field use - (Val_1_Bank => 0, - Val_2_Bank => 1, - Val_3_Bank => 2); + (Val_1_BANK => 0, + Val_2_BANK => 1, + Val_3_BANK => 2); -- Endpoint Size type DEVEPTCFG_EPSIZE_Field is (-- 8 bytes - Val_8_Byte, + Val_8_BYTE, -- 16 bytes - Val_16_Byte, + Val_16_BYTE, -- 32 bytes - Val_32_Byte, + Val_32_BYTE, -- 64 bytes - Val_64_Byte, + Val_64_BYTE, -- 128 bytes - Val_128_Byte, + Val_128_BYTE, -- 256 bytes - Val_256_Byte, + Val_256_BYTE, -- 512 bytes - Val_512_Byte, + Val_512_BYTE, -- 1024 bytes - Val_1024_Byte) + Val_1024_BYTE) with Size => 3; for DEVEPTCFG_EPSIZE_Field use - (Val_8_Byte => 0, - Val_16_Byte => 1, - Val_32_Byte => 2, - Val_64_Byte => 3, - Val_128_Byte => 4, - Val_256_Byte => 5, - Val_512_Byte => 6, - Val_1024_Byte => 7); + (Val_8_BYTE => 0, + Val_16_BYTE => 1, + Val_32_BYTE => 2, + Val_64_BYTE => 3, + Val_128_BYTE => 4, + Val_256_BYTE => 5, + Val_512_BYTE => 6, + Val_1024_BYTE => 7); -- Endpoint Direction type DEVEPTCFG_EPDIR_Field is (-- The endpoint direction is OUT. - Out_k, + OUT_k, -- The endpoint direction is IN (nor for control endpoints). - In_k) + IN_k) with Size => 1; for DEVEPTCFG_EPDIR_Field use - (Out_k => 0, - In_k => 1); + (OUT_k => 0, + IN_k => 1); subtype UOTGHS_DEVEPTCFG_AUTOSW_Field is ATSAM3X8E.Bit; -- Endpoint Type type DEVEPTCFG_EPTYPE_Field is (-- Control - Ctrl, + CTRL, -- Isochronous - Iso, + ISO, -- Bulk - Blk, + BLK, -- Interrupt - Intrpt) + INTRPT) with Size => 2; for DEVEPTCFG_EPTYPE_Field use - (Ctrl => 0, - Iso => 1, - Blk => 2, - Intrpt => 3); + (CTRL => 0, + ISO => 1, + BLK => 2, + INTRPT => 3); -- Number of transaction per microframe for isochronous endpoint type DEVEPTCFG_NBTRANS_Field is (-- reserved to endpoint that does not have the high-bandwidth isochronous -- capability. - Val_0_Trans, + Val_0_TRANS, -- default value: one transaction per micro-frame. - Val_1_Trans, + Val_1_TRANS, -- 2 transactions per micro-frame. This endpoint should be configured as -- double-bank. - Val_2_Trans, + Val_2_TRANS, -- 3 transactions per micro-frame. This endpoint should be configured as -- triple-bank. - Val_3_Trans) + Val_3_TRANS) with Size => 2; for DEVEPTCFG_NBTRANS_Field use - (Val_0_Trans => 0, - Val_1_Trans => 1, - Val_2_Trans => 2, - Val_3_Trans => 3); + (Val_0_TRANS => 0, + Val_1_TRANS => 1, + Val_2_TRANS => 2, + Val_3_TRANS => 3); -- Device Endpoint Configuration Register (n = 0) type UOTGHS_DEVEPTCFG_Register is record @@ -840,22 +839,22 @@ package ATSAM3X8E.UOTGHS is -- Endpoint Memory Allocate ALLOC : UOTGHS_DEVEPTCFG_ALLOC_Field := 16#0#; -- Endpoint Banks - EPBK : DEVEPTCFG_EPBK_Field := ATSAM3X8E.UOTGHS.Val_1_Bank; + EPBK : DEVEPTCFG_EPBK_Field := ATSAM3X8E.UOTGHS.Val_1_BANK; -- Endpoint Size - EPSIZE : DEVEPTCFG_EPSIZE_Field := ATSAM3X8E.UOTGHS.Val_8_Byte; + EPSIZE : DEVEPTCFG_EPSIZE_Field := ATSAM3X8E.UOTGHS.Val_8_BYTE; -- unspecified Reserved_7_7 : ATSAM3X8E.Bit := 16#0#; -- Endpoint Direction - EPDIR : DEVEPTCFG_EPDIR_Field := ATSAM3X8E.UOTGHS.Out_k; + EPDIR : DEVEPTCFG_EPDIR_Field := ATSAM3X8E.UOTGHS.OUT_k; -- Automatic Switch AUTOSW : UOTGHS_DEVEPTCFG_AUTOSW_Field := 16#0#; -- unspecified Reserved_10_10 : ATSAM3X8E.Bit := 16#0#; -- Endpoint Type - EPTYPE : DEVEPTCFG_EPTYPE_Field := ATSAM3X8E.UOTGHS.Ctrl; + EPTYPE : DEVEPTCFG_EPTYPE_Field := ATSAM3X8E.UOTGHS.CTRL; -- Number of transaction per microframe for isochronous endpoint NBTRANS : DEVEPTCFG_NBTRANS_Field := - ATSAM3X8E.UOTGHS.Val_0_Trans; + ATSAM3X8E.UOTGHS.Val_0_TRANS; -- unspecified Reserved_15_31 : ATSAM3X8E.UInt17 := 16#0#; end record @@ -887,50 +886,50 @@ package ATSAM3X8E.UOTGHS is -- Data Toggle Sequence type DEVEPTISR_DTSEQ_Field is (-- Data0 toggle sequence - Data0, + DATA0, -- Data1 toggle sequence - Data1, + DATA1, -- Reserved for high-bandwidth isochronous endpoint - Data2, + DATA2, -- Reserved for high-bandwidth isochronous endpoint - Mdata) + MDATA) with Size => 2; for DEVEPTISR_DTSEQ_Field use - (Data0 => 0, - Data1 => 1, - Data2 => 2, - Mdata => 3); + (DATA0 => 0, + DATA1 => 1, + DATA2 => 2, + MDATA => 3); -- Number of Busy Banks type DEVEPTISR_NBUSYBK_Field is (-- 0 busy bank (all banks free) - Val_0_Busy, + Val_0_BUSY, -- 1 busy bank - Val_1_Busy, + Val_1_BUSY, -- 2 busy banks - Val_2_Busy, + Val_2_BUSY, -- 3 busy banks - Val_3_Busy) + Val_3_BUSY) with Size => 2; for DEVEPTISR_NBUSYBK_Field use - (Val_0_Busy => 0, - Val_1_Busy => 1, - Val_2_Busy => 2, - Val_3_Busy => 3); + (Val_0_BUSY => 0, + Val_1_BUSY => 1, + Val_2_BUSY => 2, + Val_3_BUSY => 3); -- Current Bank type DEVEPTISR_CURRBK_Field is (-- Current bank is bank0 - Bank0, + BANK0, -- Current bank is bank1 - Bank1, + BANK1, -- Current bank is bank2 - Bank2) + BANK2) with Size => 2; for DEVEPTISR_CURRBK_Field use - (Bank0 => 0, - Bank1 => 1, - Bank2 => 2); + (BANK0 => 0, + BANK1 => 1, + BANK2 => 2); subtype UOTGHS_DEVEPTISR_RWALL_Field is ATSAM3X8E.Bit; subtype UOTGHS_DEVEPTISR_CTRLDIR_Field is ATSAM3X8E.Bit; @@ -1422,20 +1421,20 @@ package ATSAM3X8E.UOTGHS is (-- The host starts in full-speed mode and performs a high-speed reset to -- switch to the high-speed mode if the downstream peripheral is high-speed -- capable. - Normal, + NORMAL, -- For a better consumption, if high-speed is not needed. - Low_Power, + LOW_POWER, -- Forced high speed. - High_Speed, + HIGH_SPEED, -- The host remains to full-speed mode whatever the peripheral speed -- capability. - Forced_Fs) + FORCED_FS) with Size => 2; for HSTCTRL_SPDCONF_Field use - (Normal => 0, - Low_Power => 1, - High_Speed => 2, - Forced_Fs => 3); + (NORMAL => 0, + LOW_POWER => 1, + HIGH_SPEED => 2, + FORCED_FS => 3); -- Host General Control Register type UOTGHS_HSTCTRL_Register is record @@ -1450,7 +1449,7 @@ package ATSAM3X8E.UOTGHS is -- unspecified Reserved_11_11 : ATSAM3X8E.Bit := 16#0#; -- Mode Configuration - SPDCONF : HSTCTRL_SPDCONF_Field := ATSAM3X8E.UOTGHS.Normal; + SPDCONF : HSTCTRL_SPDCONF_Field := ATSAM3X8E.UOTGHS.NORMAL; -- unspecified Reserved_14_31 : ATSAM3X8E.UInt18 := 16#0#; end record @@ -2220,78 +2219,78 @@ package ATSAM3X8E.UOTGHS is -- Pipe Banks type HSTPIPCFG_PBK_Field is (-- Single-bank pipe - Val_1_Bank, + Val_1_BANK, -- Double-bank pipe - Val_2_Bank, + Val_2_BANK, -- Triple-bank pipe - Val_3_Bank) + Val_3_BANK) with Size => 2; for HSTPIPCFG_PBK_Field use - (Val_1_Bank => 0, - Val_2_Bank => 1, - Val_3_Bank => 2); + (Val_1_BANK => 0, + Val_2_BANK => 1, + Val_3_BANK => 2); -- Pipe Size type HSTPIPCFG_PSIZE_Field is (-- 8 bytes - Val_8_Byte, + Val_8_BYTE, -- 16 bytes - Val_16_Byte, + Val_16_BYTE, -- 32 bytes - Val_32_Byte, + Val_32_BYTE, -- 64 bytes - Val_64_Byte, + Val_64_BYTE, -- 128 bytes - Val_128_Byte, + Val_128_BYTE, -- 256 bytes - Val_256_Byte, + Val_256_BYTE, -- 512 bytes - Val_512_Byte, + Val_512_BYTE, -- 1024 bytes - Val_1024_Byte) + Val_1024_BYTE) with Size => 3; for HSTPIPCFG_PSIZE_Field use - (Val_8_Byte => 0, - Val_16_Byte => 1, - Val_32_Byte => 2, - Val_64_Byte => 3, - Val_128_Byte => 4, - Val_256_Byte => 5, - Val_512_Byte => 6, - Val_1024_Byte => 7); + (Val_8_BYTE => 0, + Val_16_BYTE => 1, + Val_32_BYTE => 2, + Val_64_BYTE => 3, + Val_128_BYTE => 4, + Val_256_BYTE => 5, + Val_512_BYTE => 6, + Val_1024_BYTE => 7); -- Pipe Token type HSTPIPCFG_PTOKEN_Field is (-- SETUP - Setup, + SETUP, -- IN - In_k, + IN_k, -- OUT - Out_k) + OUT_k) with Size => 2; for HSTPIPCFG_PTOKEN_Field use - (Setup => 0, - In_k => 1, - Out_k => 2); + (SETUP => 0, + IN_k => 1, + OUT_k => 2); subtype UOTGHS_HSTPIPCFG_AUTOSW_Field is ATSAM3X8E.Bit; -- Pipe Type type HSTPIPCFG_PTYPE_Field is (-- Control - Ctrl, + CTRL, -- Isochronous - Iso, + ISO, -- Bulk - Blk, + BLK, -- Interrupt - Intrpt) + INTRPT) with Size => 2; for HSTPIPCFG_PTYPE_Field use - (Ctrl => 0, - Iso => 1, - Blk => 2, - Intrpt => 3); + (CTRL => 0, + ISO => 1, + BLK => 2, + INTRPT => 3); subtype UOTGHS_HSTPIPCFG_PEPNUM_Field is ATSAM3X8E.UInt4; subtype UOTGHS_HSTPIPCFG_INTFRQ_Field is ATSAM3X8E.Byte; @@ -2303,19 +2302,19 @@ package ATSAM3X8E.UOTGHS is -- Pipe Memory Allocate ALLOC : UOTGHS_HSTPIPCFG_ALLOC_Field := 16#0#; -- Pipe Banks - PBK : HSTPIPCFG_PBK_Field := ATSAM3X8E.UOTGHS.Val_1_Bank; + PBK : HSTPIPCFG_PBK_Field := ATSAM3X8E.UOTGHS.Val_1_BANK; -- Pipe Size - PSIZE : HSTPIPCFG_PSIZE_Field := ATSAM3X8E.UOTGHS.Val_8_Byte; + PSIZE : HSTPIPCFG_PSIZE_Field := ATSAM3X8E.UOTGHS.Val_8_BYTE; -- unspecified Reserved_7_7 : ATSAM3X8E.Bit := 16#0#; -- Pipe Token - PTOKEN : HSTPIPCFG_PTOKEN_Field := ATSAM3X8E.UOTGHS.Setup; + PTOKEN : HSTPIPCFG_PTOKEN_Field := ATSAM3X8E.UOTGHS.SETUP; -- Automatic Switch AUTOSW : UOTGHS_HSTPIPCFG_AUTOSW_Field := 16#0#; -- unspecified Reserved_11_11 : ATSAM3X8E.Bit := 16#0#; -- Pipe Type - PTYPE : HSTPIPCFG_PTYPE_Field := ATSAM3X8E.UOTGHS.Ctrl; + PTYPE : HSTPIPCFG_PTYPE_Field := ATSAM3X8E.UOTGHS.CTRL; -- unspecified Reserved_14_15 : ATSAM3X8E.UInt2 := 16#0#; -- Pipe Endpoint Number @@ -2355,44 +2354,44 @@ package ATSAM3X8E.UOTGHS is -- Data Toggle Sequence type HSTPIPISR_DTSEQ_Field is (-- Data0 toggle sequence - Data0, + DATA0, -- Data1 toggle sequence - Data1) + DATA1) with Size => 2; for HSTPIPISR_DTSEQ_Field use - (Data0 => 0, - Data1 => 1); + (DATA0 => 0, + DATA1 => 1); -- Number of Busy Banks type HSTPIPISR_NBUSYBK_Field is (-- 0 busy bank (all banks free) - Val_0_Busy, + Val_0_BUSY, -- 1 busy bank - Val_1_Busy, + Val_1_BUSY, -- 2 busy banks - Val_2_Busy, + Val_2_BUSY, -- 3 busy banks - Val_3_Busy) + Val_3_BUSY) with Size => 2; for HSTPIPISR_NBUSYBK_Field use - (Val_0_Busy => 0, - Val_1_Busy => 1, - Val_2_Busy => 2, - Val_3_Busy => 3); + (Val_0_BUSY => 0, + Val_1_BUSY => 1, + Val_2_BUSY => 2, + Val_3_BUSY => 3); -- Current Bank type HSTPIPISR_CURRBK_Field is (-- Current bank is bank0 - Bank0, + BANK0, -- Current bank is bank1 - Bank1, + BANK1, -- Current bank is bank2 - Bank2) + BANK2) with Size => 2; for HSTPIPISR_CURRBK_Field use - (Bank0 => 0, - Bank1 => 1, - Bank2 => 2); + (BANK0 => 0, + BANK1 => 1, + BANK2 => 2); subtype UOTGHS_HSTPIPISR_RWALL_Field is ATSAM3X8E.Bit; subtype UOTGHS_HSTPIPISR_CFGOK_Field is ATSAM3X8E.Bit; @@ -2928,24 +2927,24 @@ package ATSAM3X8E.UOTGHS is -- UOTGID Pin Enable type CTRL_UIDE_Field is (-- The USB mode (device/host) is selected from the UIMOD bit. - Uimod, + UIMOD, -- The USB mode (device/host) is selected from the UOTGID input pin. - Uotgid) + UOTGID) with Size => 1; for CTRL_UIDE_Field use - (Uimod => 0, - Uotgid => 1); + (UIMOD => 0, + UOTGID => 1); -- UOTGHS Mode type CTRL_UIMOD_Field is (-- The module is in USB host mode. - Host, + HOST, -- The module is in USB device mode. - Device) + DEVICE) with Size => 1; for CTRL_UIMOD_Field use - (Host => 0, - Device => 1); + (HOST => 0, + DEVICE => 1); -- General Control Register type UOTGHS_CTRL_Register is record @@ -2992,9 +2991,9 @@ package ATSAM3X8E.UOTGHS is -- unspecified Reserved_23_23 : ATSAM3X8E.Bit := 16#0#; -- UOTGID Pin Enable - UIDE : CTRL_UIDE_Field := ATSAM3X8E.UOTGHS.Uotgid; + UIDE : CTRL_UIDE_Field := ATSAM3X8E.UOTGHS.UOTGID; -- UOTGHS Mode - UIMOD : CTRL_UIMOD_Field := ATSAM3X8E.UOTGHS.Device; + UIMOD : CTRL_UIMOD_Field := ATSAM3X8E.UOTGHS.DEVICE; -- unspecified Reserved_26_31 : ATSAM3X8E.UInt6 := 16#0#; end record @@ -3042,16 +3041,16 @@ package ATSAM3X8E.UOTGHS is -- Speed Status type SR_SPEED_Field is (-- Full-Speed mode - Full_Speed, + FULL_SPEED, -- High-Speed mode - High_Speed, + HIGH_SPEED, -- Low-Speed mode - Low_Speed) + LOW_SPEED) with Size => 2; for SR_SPEED_Field use - (Full_Speed => 0, - High_Speed => 1, - Low_Speed => 2); + (FULL_SPEED => 0, + HIGH_SPEED => 1, + LOW_SPEED => 2); subtype UOTGHS_SR_CLKUSABLE_Field is ATSAM3X8E.Bit; @@ -3213,63 +3212,63 @@ package ATSAM3X8E.UOTGHS is -- Dual Role Device State type FSM_DRDSTATE_Field is (-- This is the start state for A-devices (when the ID pin is 0) - A_Idlestate, + A_IDLESTATE, -- In this state, the A-device waits for the voltage on VBus to rise above the -- A-device VBus Valid threshold (4.4 V). - A_Wait_Vrise, + A_WAIT_VRISE, -- In this state, the A-device waits for the B-device to signal a connection. - A_Wait_Bcon, + A_WAIT_BCON, -- In this state, the A-device that operates in Host mode is operational. - A_Host, + A_HOST, -- The A-device operating as a host is in the suspend mode. - A_Suspend, + A_SUSPEND, -- The A-device operates as a peripheral. - A_Peripheral, + A_PERIPHERAL, -- In this state, the A-device waits for the voltage on VBus to drop below the -- A-device Session Valid threshold (1.4 V). - A_Wait_Vfall, + A_WAIT_VFALL, -- In this state, the A-device waits for recovery of the over-current -- condition that caused it to enter this state. - A_Vbus_Err, + A_VBUS_ERR, -- In this state, the A-device waits for the data USB line to discharge (100 -- us). - A_Wait_Discharge, + A_WAIT_DISCHARGE, -- This is the start state for B-device (when the ID pin is 1). - B_Idle, + B_IDLE, -- In this state, the B-device acts as the peripheral. - B_Peripheral, + B_PERIPHERAL, -- In this state, the B-device is in suspend mode and waits until 3 ms before -- initiating the HNP protocol if requested. - B_Wait_Begin_Hnp, + B_WAIT_BEGIN_HNP, -- In this state, the B-device waits for the data USB line to discharge (100 -- us) before becoming Host. - B_Wait_Discharge, + B_WAIT_DISCHARGE, -- In this state, the B-device waits for the A-device to signal a connect -- before becoming B-Host. - B_Wait_Acon, + B_WAIT_ACON, -- In this state, the B-device acts as the Host. - B_Host, + B_HOST, -- In this state, the B-device attempts to start a session using the SRP -- protocol. - B_Srp_Init) + B_SRP_INIT) with Size => 4; for FSM_DRDSTATE_Field use - (A_Idlestate => 0, - A_Wait_Vrise => 1, - A_Wait_Bcon => 2, - A_Host => 3, - A_Suspend => 4, - A_Peripheral => 5, - A_Wait_Vfall => 6, - A_Vbus_Err => 7, - A_Wait_Discharge => 8, - B_Idle => 9, - B_Peripheral => 10, - B_Wait_Begin_Hnp => 11, - B_Wait_Discharge => 12, - B_Wait_Acon => 13, - B_Host => 14, - B_Srp_Init => 15); + (A_IDLESTATE => 0, + A_WAIT_VRISE => 1, + A_WAIT_BCON => 2, + A_HOST => 3, + A_SUSPEND => 4, + A_PERIPHERAL => 5, + A_WAIT_VFALL => 6, + A_VBUS_ERR => 7, + A_WAIT_DISCHARGE => 8, + B_IDLE => 9, + B_PERIPHERAL => 10, + B_WAIT_BEGIN_HNP => 11, + B_WAIT_DISCHARGE => 12, + B_WAIT_ACON => 13, + B_HOST => 14, + B_SRP_INIT => 15); -- General Finite State Machine Register type UOTGHS_FSM_Register is record diff --git a/arduino-due/atsam3x8e/atsam3x8e-usart.ads b/arduino-due/atsam3x8e/atsam3x8e-usart.ads index 8379af3..c98e8b4 100644 --- a/arduino-due/atsam3x8e/atsam3x8e-usart.ads +++ b/arduino-due/atsam3x8e/atsam3x8e-usart.ads @@ -1,4 +1,3 @@ -pragma Ada_2012; pragma Style_Checks (Off); -- This spec has been automatically generated from ATSAM3X8E.svd @@ -161,124 +160,124 @@ package ATSAM3X8E.USART is -- USART Mode of Operation type MR_USART_MODE_Field is (-- Normal mode - Normal, + NORMAL, -- RS485 - Rs485, + RS485, -- Hardware Handshaking - Hw_Handshaking, + HW_HANDSHAKING, -- IS07816 Protocol: T = 0 - Is07816_T_0, + IS07816_T_0, -- IS07816 Protocol: T = 1 - Is07816_T_1, + IS07816_T_1, -- IrDA - Irda, + IRDA, -- LIN Master - Lin_Master, + LIN_MASTER, -- LIN Slave - Lin_Slave, + LIN_SLAVE, -- SPI Master - Spi_Master, + SPI_MASTER, -- SPI Slave - Spi_Slave) + SPI_SLAVE) with Size => 4; for MR_USART_MODE_Field use - (Normal => 0, - Rs485 => 1, - Hw_Handshaking => 2, - Is07816_T_0 => 4, - Is07816_T_1 => 6, - Irda => 8, - Lin_Master => 10, - Lin_Slave => 11, - Spi_Master => 14, - Spi_Slave => 15); + (NORMAL => 0, + RS485 => 1, + HW_HANDSHAKING => 2, + IS07816_T_0 => 4, + IS07816_T_1 => 6, + IRDA => 8, + LIN_MASTER => 10, + LIN_SLAVE => 11, + SPI_MASTER => 14, + SPI_SLAVE => 15); -- Clock Selection type MR_USCLKS_Field is (-- Master Clock MCK is selected - Mck, + MCK, -- Internal Clock Divided MCK/DIV (DIV=8) is selected - Div, + DIV, -- Serial Clock SLK is selected - Sck) + SCK) with Size => 2; for MR_USCLKS_Field use - (Mck => 0, - Div => 1, - Sck => 3); + (MCK => 0, + DIV => 1, + SCK => 3); -- Character Length. type MR_CHRL_Field is (-- Character length is 5 bits - Val_5_Bit, + Val_5_BIT, -- Character length is 6 bits - Val_6_Bit, + Val_6_BIT, -- Character length is 7 bits - Val_7_Bit, + Val_7_BIT, -- Character length is 8 bits - Val_8_Bit) + Val_8_BIT) with Size => 2; for MR_CHRL_Field use - (Val_5_Bit => 0, - Val_6_Bit => 1, - Val_7_Bit => 2, - Val_8_Bit => 3); + (Val_5_BIT => 0, + Val_6_BIT => 1, + Val_7_BIT => 2, + Val_8_BIT => 3); subtype USART0_MR_SYNC_Field is ATSAM3X8E.Bit; -- Parity Type type MR_PAR_Field is (-- Even parity - Even, + EVEN, -- Odd parity - Odd, + ODD, -- Parity forced to 0 (Space) - Space, + SPACE, -- Parity forced to 1 (Mark) - Mark, + MARK, -- No parity - No, + NO, -- Multidrop mode - Multidrop) + MULTIDROP) with Size => 3; for MR_PAR_Field use - (Even => 0, - Odd => 1, - Space => 2, - Mark => 3, - No => 4, - Multidrop => 6); + (EVEN => 0, + ODD => 1, + SPACE => 2, + MARK => 3, + NO => 4, + MULTIDROP => 6); -- Number of Stop Bits type MR_NBSTOP_Field is (-- 1 stop bit - Val_1_Bit, + Val_1_BIT, -- 1.5 stop bit (SYNC = 0) or reserved (SYNC = 1) - Val_1_5_Bit, + Val_1_5_BIT, -- 2 stop bits - Val_2_Bit) + Val_2_BIT) with Size => 2; for MR_NBSTOP_Field use - (Val_1_Bit => 0, - Val_1_5_Bit => 1, - Val_2_Bit => 2); + (Val_1_BIT => 0, + Val_1_5_BIT => 1, + Val_2_BIT => 2); -- Channel Mode type MR_CHMODE_Field is (-- Normal Mode - Normal, + NORMAL, -- Automatic Echo. Receiver input is connected to the TXD pin. - Automatic, + AUTOMATIC, -- Local Loopback. Transmitter output is connected to the Receiver Input. - Local_Loopback, + LOCAL_LOOPBACK, -- Remote Loopback. RXD pin is internally connected to the TXD pin. - Remote_Loopback) + REMOTE_LOOPBACK) with Size => 2; for MR_CHMODE_Field use - (Normal => 0, - Automatic => 1, - Local_Loopback => 2, - Remote_Loopback => 3); + (NORMAL => 0, + AUTOMATIC => 1, + LOCAL_LOOPBACK => 2, + REMOTE_LOOPBACK => 3); subtype USART0_MR_MSBF_Field is ATSAM3X8E.Bit; subtype USART0_MR_MODE9_Field is ATSAM3X8E.Bit; @@ -297,19 +296,19 @@ package ATSAM3X8E.USART is -- Mode Register type USART0_MR_Register is record -- USART Mode of Operation - USART_MODE : MR_USART_MODE_Field := ATSAM3X8E.USART.Normal; + USART_MODE : MR_USART_MODE_Field := ATSAM3X8E.USART.NORMAL; -- Clock Selection - USCLKS : MR_USCLKS_Field := ATSAM3X8E.USART.Mck; + USCLKS : MR_USCLKS_Field := ATSAM3X8E.USART.MCK; -- Character Length. - CHRL : MR_CHRL_Field := ATSAM3X8E.USART.Val_5_Bit; + CHRL : MR_CHRL_Field := ATSAM3X8E.USART.Val_5_BIT; -- Synchronous Mode Select SYNC : USART0_MR_SYNC_Field := 16#0#; -- Parity Type - PAR : MR_PAR_Field := ATSAM3X8E.USART.Even; + PAR : MR_PAR_Field := ATSAM3X8E.USART.EVEN; -- Number of Stop Bits - NBSTOP : MR_NBSTOP_Field := ATSAM3X8E.USART.Val_1_Bit; + NBSTOP : MR_NBSTOP_Field := ATSAM3X8E.USART.Val_1_BIT; -- Channel Mode - CHMODE : MR_CHMODE_Field := ATSAM3X8E.USART.Normal; + CHMODE : MR_CHMODE_Field := ATSAM3X8E.USART.NORMAL; -- Bit Order MSBF : USART0_MR_MSBF_Field := 16#0#; -- 9-bit Character Length @@ -368,41 +367,41 @@ package ATSAM3X8E.USART is -- USART Mode of Operation type MR_SPI_MODE_USART_MODE_Field is (-- Reset value for the field - Mr_Spi_Mode_Usart_Mode_Field_Reset, + MR_SPI_MODE_USART_MODE_Field_Reset, -- SPI Master - Spi_Master, + SPI_MASTER, -- SPI Slave - Spi_Slave) + SPI_SLAVE) with Size => 4; for MR_SPI_MODE_USART_MODE_Field use - (Mr_Spi_Mode_Usart_Mode_Field_Reset => 0, - Spi_Master => 14, - Spi_Slave => 15); + (MR_SPI_MODE_USART_MODE_Field_Reset => 0, + SPI_MASTER => 14, + SPI_SLAVE => 15); -- Clock Selection type MR_SPI_MODE_USCLKS_Field is (-- Master Clock MCK is selected - Mck, + MCK, -- Internal Clock Divided MCK/DIV (DIV=8) is selected - Div, + DIV, -- Serial Clock SLK is selected - Sck) + SCK) with Size => 2; for MR_SPI_MODE_USCLKS_Field use - (Mck => 0, - Div => 1, - Sck => 3); + (MCK => 0, + DIV => 1, + SCK => 3); -- Character Length. type MR_SPI_MODE_CHRL_Field is (-- Reset value for the field - Mr_Spi_Mode_Chrl_Field_Reset, + MR_SPI_MODE_CHRL_Field_Reset, -- Character length is 8 bits - Val_8_Bit) + Val_8_BIT) with Size => 2; for MR_SPI_MODE_CHRL_Field use - (Mr_Spi_Mode_Chrl_Field_Reset => 0, - Val_8_Bit => 3); + (MR_SPI_MODE_CHRL_Field_Reset => 0, + Val_8_BIT => 3); subtype USART0_MR_SPI_MODE_CPHA_Field is ATSAM3X8E.Bit; subtype USART0_MR_SPI_MODE_CPOL_Field is ATSAM3X8E.Bit; @@ -412,11 +411,11 @@ package ATSAM3X8E.USART is type USART0_MR_SPI_MODE_Register is record -- USART Mode of Operation USART_MODE : MR_SPI_MODE_USART_MODE_Field := - Mr_Spi_Mode_Usart_Mode_Field_Reset; + MR_SPI_MODE_USART_MODE_Field_Reset; -- Clock Selection - USCLKS : MR_SPI_MODE_USCLKS_Field := ATSAM3X8E.USART.Mck; + USCLKS : MR_SPI_MODE_USCLKS_Field := ATSAM3X8E.USART.MCK; -- Character Length. - CHRL : MR_SPI_MODE_CHRL_Field := Mr_Spi_Mode_Chrl_Field_Reset; + CHRL : MR_SPI_MODE_CHRL_Field := MR_SPI_MODE_CHRL_Field_Reset; -- SPI Clock Phase CPHA : USART0_MR_SPI_MODE_CPHA_Field := 16#0#; -- unspecified @@ -1425,19 +1424,19 @@ package ATSAM3X8E.USART is -- Transmitter Preamble Pattern type MAN_TX_PP_Field is (-- The preamble is composed of '1's - All_One, + ALL_ONE, -- The preamble is composed of '0's - All_Zero, + ALL_ZERO, -- The preamble is composed of '01's - Zero_One, + ZERO_ONE, -- The preamble is composed of '10's - One_Zero) + ONE_ZERO) with Size => 2; for MAN_TX_PP_Field use - (All_One => 0, - All_Zero => 1, - Zero_One => 2, - One_Zero => 3); + (ALL_ONE => 0, + ALL_ZERO => 1, + ZERO_ONE => 2, + ONE_ZERO => 3); subtype USART0_MAN_TX_MPOL_Field is ATSAM3X8E.Bit; subtype USART0_MAN_RX_PL_Field is ATSAM3X8E.UInt4; @@ -1445,19 +1444,19 @@ package ATSAM3X8E.USART is -- Receiver Preamble Pattern detected type MAN_RX_PP_Field is (-- The preamble is composed of '1's - All_One, + ALL_ONE, -- The preamble is composed of '0's - All_Zero, + ALL_ZERO, -- The preamble is composed of '01's - Zero_One, + ZERO_ONE, -- The preamble is composed of '10's - One_Zero) + ONE_ZERO) with Size => 2; for MAN_RX_PP_Field use - (All_One => 0, - All_Zero => 1, - Zero_One => 2, - One_Zero => 3); + (ALL_ONE => 0, + ALL_ZERO => 1, + ZERO_ONE => 2, + ONE_ZERO => 3); subtype USART0_MAN_RX_MPOL_Field is ATSAM3X8E.Bit; subtype USART0_MAN_ONE_Field is ATSAM3X8E.Bit; @@ -1470,7 +1469,7 @@ package ATSAM3X8E.USART is -- unspecified Reserved_4_7 : ATSAM3X8E.UInt4 := 16#0#; -- Transmitter Preamble Pattern - TX_PP : MAN_TX_PP_Field := ATSAM3X8E.USART.All_One; + TX_PP : MAN_TX_PP_Field := ATSAM3X8E.USART.ALL_ONE; -- unspecified Reserved_10_11 : ATSAM3X8E.UInt2 := 16#0#; -- Transmitter Manchester Polarity @@ -1482,7 +1481,7 @@ package ATSAM3X8E.USART is -- unspecified Reserved_20_23 : ATSAM3X8E.UInt4 := 16#0#; -- Receiver Preamble Pattern detected - RX_PP : MAN_RX_PP_Field := ATSAM3X8E.USART.All_One; + RX_PP : MAN_RX_PP_Field := ATSAM3X8E.USART.ALL_ONE; -- unspecified Reserved_26_27 : ATSAM3X8E.UInt2 := 16#0#; -- Receiver Manchester Polarity @@ -1516,16 +1515,16 @@ package ATSAM3X8E.USART is -- LIN Node Action type LINMR_NACT_Field is (-- The USART transmits the response. - Publish, + PUBLISH, -- The USART receives the response. - Subscribe, + SUBSCRIBE, -- The USART does not transmit and does not receive the response. - Ignore) + IGNORE) with Size => 2; for LINMR_NACT_Field use - (Publish => 0, - Subscribe => 1, - Ignore => 2); + (PUBLISH => 0, + SUBSCRIBE => 1, + IGNORE => 2); subtype USART0_LINMR_PARDIS_Field is ATSAM3X8E.Bit; subtype USART0_LINMR_CHKDIS_Field is ATSAM3X8E.Bit; @@ -1539,7 +1538,7 @@ package ATSAM3X8E.USART is -- LIN Mode Register type USART0_LINMR_Register is record -- LIN Node Action - NACT : LINMR_NACT_Field := ATSAM3X8E.USART.Publish; + NACT : LINMR_NACT_Field := ATSAM3X8E.USART.PUBLISH; -- Parity Disable PARDIS : USART0_LINMR_PARDIS_Field := 16#0#; -- Checksum Disable @@ -1757,8 +1756,8 @@ package ATSAM3X8E.USART is type USART0_Disc is (Default, - Spi_Mode, - Lin_Mode); + SPI_MODE, + LIN_MODE); -- Universal Synchronous Asynchronous Receiver Transmitter 0 type USART_Peripheral @@ -1849,7 +1848,7 @@ package ATSAM3X8E.USART is -- Channel Status Register CSR : aliased USART0_CSR_Register; pragma Volatile_Full_Access (CSR); - when Spi_Mode => + when SPI_MODE => -- Control Register CR_SPI_MODE : aliased USART0_CR_SPI_MODE_Register; pragma Volatile_Full_Access (CR_SPI_MODE); @@ -1868,7 +1867,7 @@ package ATSAM3X8E.USART is -- Channel Status Register CSR_SPI_MODE : aliased USART0_CSR_SPI_MODE_Register; pragma Volatile_Full_Access (CSR_SPI_MODE); - when Lin_Mode => + when LIN_MODE => -- Interrupt Enable Register IER_LIN_MODE : aliased USART0_IER_LIN_MODE_Register; pragma Volatile_Full_Access (IER_LIN_MODE); diff --git a/arduino-due/atsam3x8e/atsam3x8e.ads b/arduino-due/atsam3x8e/atsam3x8e.ads index 44dd4ee..8138631 100644 --- a/arduino-due/atsam3x8e/atsam3x8e.ads +++ b/arduino-due/atsam3x8e/atsam3x8e.ads @@ -1,4 +1,3 @@ -pragma Ada_2012; pragma Style_Checks (Off); -- This spec has been automatically generated from ATSAM3X8E.svd diff --git a/arduino-due/build_runtime.gpr b/arduino-due/build_runtime.gpr index 7339477..e277b61 100644 --- a/arduino-due/build_runtime.gpr +++ b/arduino-due/build_runtime.gpr @@ -1,4 +1,4 @@ --- Copyright (C) 2016-2018, 2020 Free Software Foundation, Inc. +-- Copyright (C) 2016-2021 Free Software Foundation, Inc. -- This file is part of the Cortex GNAT RTS package. -- @@ -21,7 +21,7 @@ with "../FreeRTOS"; library project Build_Runtime is - for Languages use ("Ada", "C"); + for Languages use ("Ada", "C", "ASM"); for Library_Auto_Init use "False"; for Library_Name use "gnat"; @@ -95,7 +95,7 @@ library project Build_Runtime is for Switches ("s-assert.adb") use ALL_ADAFLAGS & ("-g"); for Switches ("a-tags.adb") use ALL_ADAFLAGS & ("-g"); for Switches ("last_chance_handler.c") use ALL_CFLAGS & ("-g", "-O0"); - for Switches ("hardfault_handling.adb") use ALL_ADAFLAGS & ("-g", "-O0"); + for Switches ("s-harhan.adb") use ALL_ADAFLAGS & ("-g", "-O0"); end Compiler; package Install is diff --git a/microbit/adainclude/interrupt_vectors.s b/microbit/adainclude/interrupt_vectors.s new file mode 100644 index 0000000..e4f06c1 --- /dev/null +++ b/microbit/adainclude/interrupt_vectors.s @@ -0,0 +1,78 @@ + @ Copyright (C) 2021 Free Software Foundation, Inc. + + @ This file is part of the Cortex GNAT RTS project. This file is + @ free software; you can redistribute it and/or modify it under + @ terms of the GNU General Public License as published by the Free + @ Software Foundation; either version 3, or (at your option) any + @ later version. This file is distributed in the hope that it will + @ be useful, but WITHOUT ANY WARRANTY; without even the implied + @ warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. + + @ As a special exception under Section 7 of GPL version 3, you are + @ granted additional permissions described in the GCC Runtime + @ Library Exception, version 3.1, as published by the Free Software + @ Foundation. + + @ You should have received a copy of the GNU General Public License + @ and a copy of the GCC Runtime Library Exception along with this + @ program; see the files COPYING3 and COPYING.RUNTIME respectively. + @ If not, see . + + @ This is the Vector Table, described for M0 processors in e.g. + @ https://developer.arm.com/documentation/dui0497/a/the-cortex-m0-processor/exception-model/vector-table + + @ The capitalized handlers are defined in startup.adb, using + @ weak symbols (they can't be defined here, unlike _fault, or + @ the linker satisfies the requirement immediately). + + .syntax unified + .cpu cortex-m4 + .thumb + + .text + .section .isr_vector + .align 2 + .global _isr_vector + .type _isr_vector, %object + +_isr_vector: + /* Startup */ + .word _estack /* top of stack, from linker script. */ + .word program_initialization /* entry point */ + + /* Cortex-M core interrupts */ + .word _fault /* -14 NMI. */ + .word HardFault_Handler /* -13 Hard fault. */ + .word _fault /* -12 Mem manage. */ + .word _fault /* -11 Bus fault. */ + .word _fault /* -10 Usage fault. */ + .word _fault /* -9 reserved. */ + .word _fault /* -8 reserved. */ + .word _fault /* -7 reserved. */ + .word _fault /* -6 reserved. */ + .word SVC_Handler /* -5 SVCall. */ + .word _fault /* -4 Breakpoint. */ + .word _fault /* -3 reserved. */ + .word PendSV_Handler /* -2 PendSV. */ + .word SysTick_Handler /* -1 Systick. */ + + /* MCU interrupts */ + .rept 17 /* 0 .. 16, standard */ + .word IRQ_Handler + .endr + + .word RTC1_IRQHandler /* 17, for clock */ + + .rept 8 /* 18 .. 25, standard */ + .word IRQ_Handler + .endr + + .size _isr_vector, . - _isr_vector + + .section .text + + .thumb_func + .type _fault, %function +_fault: b _fault + .size _fault, . - _fault + diff --git a/microbit/adainclude/startup.adb b/microbit/adainclude/startup.adb index d2db2da..9fc089c 100644 --- a/microbit/adainclude/startup.adb +++ b/microbit/adainclude/startup.adb @@ -1,4 +1,4 @@ --- Copyright (C) 2016-2018 Free Software Foundation, Inc. +-- Copyright (C) 2016-2021 Free Software Foundation, Inc. -- -- This file is part of the Cortex GNAT RTS project. This file is -- free software; you can redistribute it and/or modify it under @@ -18,7 +18,6 @@ -- program; see the files COPYING3 and COPYING.RUNTIME respectively. -- If not, see . -with Ada.Interrupts; with Interfaces; with System.Machine_Code; with System.Parameters; @@ -67,11 +66,11 @@ package body Startup is -- _edata: the first address after read/write data in SRAM -- _sbss: the start of BSS (to be initialized to zero) -- _ebss: the first address after BSS. + -- + -- _isr_vector is set up in interrupt_vectors.s. use System.Storage_Elements; - -- ISR_Vector : Storage_Element - -- with Import, Convention => Asm, External_Name => "_isr_vector"; Sdata : Storage_Element with Import, Convention => Asm, External_Name => "_sdata"; Edata : Storage_Element @@ -95,45 +94,12 @@ package body Startup is Bss : Storage_Array (1 .. Bss_Size) with Import, Convention => Ada, External_Name => "_sbss"; - -- type CP_Access is (Denied, Privileged, Reserved, Full) - -- with - -- Size => 2; - -- pragma Unreferenced (Privileged, Reserved); - -- type CP_Accesses is array (0 .. 15) of CP_Access - -- with - -- Component_Size => 2, - -- Size => 32; - -- type SCB_Registers is record - -- VTOR : System.Address; - -- CPACR : CP_Accesses := (others => Denied); - -- end record - -- with - -- Volatile; - -- for SCB_Registers use record - -- VTOR at 16#08# range 0 .. 31; - -- CPACR at 16#88# range 0 .. 31; - -- end record; - - -- SCB : SCB_Registers - -- with - -- Import, - -- Convention => Ada, - -- Address => System'To_Address (16#E000_ED00#); - begin -- Copy data to SRAM Data_In_Sram := Data_In_Flash; -- Initialize BSS in SRAM Bss := (others => 0); - -- -- Enable FPU - -- SCB.CPACR := (10 => Full, 11 => Full, others => Denied); - -- -- Wait for store to complete, restart pipeline - -- System.Machine_Code.Asm ("dsb", Volatile => True); - -- System.Machine_Code.Asm ("isb", Volatile => True); - - -- SCB.VTOR := ISR_Vector'Address; - Set_Up_Heap; Set_Up_Clock; @@ -144,29 +110,19 @@ package body Startup is System.FreeRTOS.Tasks.Start_Scheduler; end Program_Initialization; - ------------------------- - -- Interrupt vectors -- - ------------------------- + -------------------------- + -- Interrupt Handlers -- + -------------------------- - -- Vector Table, STM32F4xxxx Reference Manual DocID018909 Rev 11 - -- Table 62. + -- The interrupt vector is set up in interrupt_vectors.s, using + -- the handlers defined here. - procedure Dummy_Handler; - procedure Dummy_Handler is - IPSR : Interfaces.Unsigned_32 - with Volatile; -- don't want it to be optimised away - begin - System.Machine_Code.Asm - ("mrs %0, ipsr", - Outputs => Interfaces.Unsigned_32'Asm_Output ("=r", IPSR), - Volatile => True); - loop - null; - end loop; - end Dummy_Handler; + -- These handlers are all defined as Weak so that they can be + -- replaced by real handlers at link time. - -- The remaining handlers are all defined as Weak so that they can - -- be replaced by real handlers at link time. + -- If we defined the weak handlers in interrupt_vectors.s, the + -- references would be satisfied internally and so couldn't be + -- replaced by the real handler. procedure HardFault_Handler with Export, Convention => Ada, External_Name => "HardFault_Handler"; @@ -178,6 +134,7 @@ package body Startup is end loop; end HardFault_Handler; + -- Provided by FreeRTOS. procedure SVC_Handler with Export, Convention => Ada, External_Name => "SVC_Handler"; pragma Weak_External (SVC_Handler); @@ -188,6 +145,7 @@ package body Startup is end loop; end SVC_Handler; + -- Provided by FreeRTOS. procedure PendSV_Handler with Export, Convention => Ada, External_Name => "PendSV_Handler"; pragma Weak_External (PendSV_Handler); @@ -198,6 +156,7 @@ package body Startup is end loop; end PendSV_Handler; + -- Provided by FreeRTOS. procedure SysTick_Handler with Export, Convention => Ada, External_Name => "SysTick_Handler"; pragma Weak_External (SysTick_Handler); @@ -236,26 +195,4 @@ package body Startup is end loop; end IRQ_Handler; - type Handler is access procedure; - - use type Ada.Interrupts.Interrupt_ID; - Vectors : array (-14 .. Ada.Interrupts.Interrupt_ID'Last) of Handler := - (-9 .. -6 | -4 .. -3 => null, -- reserved - -14 => Dummy_Handler'Access, -- NMI - -13 => HardFault_Handler'Access, -- HardFault - -12 => Dummy_Handler'Access, -- MemManagement - -11 => Dummy_Handler'Access, -- BusFault - -10 => Dummy_Handler'Access, -- UsageFault - -5 => SVC_Handler'Access, -- SVCall - -2 => PendSV_Handler'Access, -- PendSV - -1 => SysTick_Handler'Access, -- SysTick - 0 .. 16 => IRQ_Handler'Access, - 17 => RTC1_IRQHandler'Access, - others => IRQ_Handler'Access) - with - Export, - Convention => Ada, - External_Name => "isr_vector"; - pragma Linker_Section (Vectors, ".isr_vector"); - end Startup; diff --git a/microbit/adalib/nrf51.ld b/microbit/adalib/nrf51.ld index 0a48242..58ec19c 100644 --- a/microbit/adalib/nrf51.ld +++ b/microbit/adalib/nrf51.ld @@ -1,6 +1,7 @@ /* The MIT License * * Copyright (c) 2007, 2008, 2009, 2010 Dado Sutter and Bogdan Marinescu + * Copyright (c) 2018-2021 Simon Wright * * Permission is hereby granted, free of charge, to any person obtaining * a copy of this software and associated documentation files (the @@ -48,20 +49,12 @@ MEMORY SECTIONS { - .isr_vector : - { - . = ALIGN(4); - _isr_vector = .; - LONG(_estack) - LONG(program_initialization + 1) - KEEP(*(.isr_vector)) - } > flash - .text : { . = ALIGN(4); - /* _text = .; */ - /* PROVIDE(stext = .);*/ + *(.isr_vector) + . = ALIGN(512); + *(.text) *(.text.*) *(.gnu.linkonce.t.*) diff --git a/microbit/build_runtime.gpr b/microbit/build_runtime.gpr index 4cd6dc1..2d0a707 100644 --- a/microbit/build_runtime.gpr +++ b/microbit/build_runtime.gpr @@ -1,4 +1,4 @@ --- Copyright (C) 2016-2020 Free Software Foundation, Inc. +-- Copyright (C) 2016-2021 Free Software Foundation, Inc. -- This file is part of the Cortex GNAT RTS package. -- @@ -21,7 +21,7 @@ with "../FreeRTOS"; library project Build_Runtime is - for Languages use ("Ada", "C"); + for Languages use ("Ada", "C", "ASM"); for Library_Auto_Init use "False"; for Library_Name use "gnat"; @@ -33,7 +33,6 @@ library project Build_Runtime is for Source_Dirs use Common.Paths & ( "adainclude", - "nrf51", FreeRTOS.Source, FreeRTOS.Portable_Base & "ARM_CM0" ); @@ -95,7 +94,7 @@ library project Build_Runtime is for Switches ("s-assert.adb") use ALL_ADAFLAGS & ("-g"); for Switches ("a-tags.adb") use ALL_ADAFLAGS & ("-g"); for Switches ("last_chance_handler.c") use ALL_CFLAGS & ("-g", "-O0"); - for Switches ("hardfault_handling.adb") use ALL_ADAFLAGS & ("-g", "-O0"); + for Switches ("s-harhan.adb") use ALL_ADAFLAGS & ("-g", "-O0"); for Switches ("nrf51-swi.ads") use ALL_ADAFLAGS & ("-gnatwU"); end Compiler; diff --git a/microbit/runtime.xml b/microbit/runtime.xml index 96a4e85..fddc7ca 100644 --- a/microbit/runtime.xml +++ b/microbit/runtime.xml @@ -18,8 +18,11 @@ Common_Required_Switches; end Compiler; + -- Note, we have to force the link of _isr_vector, because in the m0 + -- it can't be relocated, so not referenced from startup.adb. package Linker is for Required_Switches use Linker'Required_Switches & + ("-Wl,--require-defined=_isr_vector") & ("${RUNTIME_DIR(ada)}/adalib/libgnat.a") & Compiler.Common_Required_Switches & ("-nostdlib", "-lm", "-lgcc", "-lc"); diff --git a/stm32f4/adalib/stm32f407-flash.ld b/stm32f4/adalib/stm32f407-flash.ld index 82e4cad..e8dc2b5 100644 --- a/stm32f4/adalib/stm32f407-flash.ld +++ b/stm32f4/adalib/stm32f407-flash.ld @@ -1,7 +1,7 @@ /* The MIT License * * Copyright (c) 2007, 2008, 2009, 2010 Dado Sutter and Bogdan Marinescu - * Copyright (c) 2012-2020 Simon Wright + * Copyright (c) 2012-2021 Simon Wright * * Permission is hereby granted, free of charge, to any person obtaining * a copy of this software and associated documentation files (the @@ -154,7 +154,7 @@ SECTIONS } >sram end = .; - PROVIDE( _estack = 0x20020000); + PROVIDE(_estack = ORIGIN(sram) + LENGTH(sram)); /DISCARD/ : { *(.note.GNU-stack) *(.gnu_debuglink) *(.gnu.lto_*) } diff --git a/stm32f4/build_runtime.gpr b/stm32f4/build_runtime.gpr index 671273e..a1503cf 100644 --- a/stm32f4/build_runtime.gpr +++ b/stm32f4/build_runtime.gpr @@ -94,7 +94,7 @@ library project Build_Runtime is for Switches ("s-assert.adb") use ALL_ADAFLAGS & ("-g"); for Switches ("a-tags.adb") use ALL_ADAFLAGS & ("-g"); for Switches ("last_chance_handler.c") use ALL_CFLAGS & ("-g", "-O0"); - for Switches ("hardfault_handling.adb") use ALL_ADAFLAGS & ("-g", "-O0"); + for Switches ("s-harhan.adb") use ALL_ADAFLAGS & ("-g", "-O0"); end Compiler; package Install is diff --git a/stm32f429i/adainclude/interrupt_vectors.s b/stm32f429i/adainclude/interrupt_vectors.s new file mode 100644 index 0000000..7855d65 --- /dev/null +++ b/stm32f429i/adainclude/interrupt_vectors.s @@ -0,0 +1,71 @@ + @ Copyright (C) 2021 Free Software Foundation, Inc. + + @ This file is part of the Cortex GNAT RTS project. This file is + @ free software; you can redistribute it and/or modify it under + @ terms of the GNU General Public License as published by the Free + @ Software Foundation; either version 3, or (at your option) any + @ later version. This file is distributed in the hope that it will + @ be useful, but WITHOUT ANY WARRANTY; without even the implied + @ warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. + + @ As a special exception under Section 7 of GPL version 3, you are + @ granted additional permissions described in the GCC Runtime + @ Library Exception, version 3.1, as published by the Free Software + @ Foundation. + + @ You should have received a copy of the GNU General Public License + @ and a copy of the GCC Runtime Library Exception along with this + @ program; see the files COPYING3 and COPYING.RUNTIME respectively. + @ If not, see . + + @ This is the Vector Table, described in STM32F4xxxx Reference + @ Manual DocID018909 Rev 11 Table 62. + + @ The capitalized handlers are defined in startup.adb, using + @ weak symbols (they can't be defined here, unlike _fault, or + @ the linker satisfies the requirement immediately). + + .syntax unified + .cpu cortex-m4 + .thumb + + .text + .section .isr_vector + .align 2 + .global _isr_vector + .type _isr_vector, %object + +_isr_vector: + /* Startup */ + .word _estack /* top of stack, from linker script. */ + .word program_initialization /* entry point */ + + /* Cortex-M core interrupts */ + .word _fault /* -14 NMI. */ + .word HardFault_Handler /* -13 Hard fault. */ + .word _fault /* -12 Mem manage. */ + .word _fault /* -11 Bus fault. */ + .word _fault /* -10 Usage fault. */ + .word _fault /* -9 reserved. */ + .word _fault /* -8 reserved. */ + .word _fault /* -7 reserved. */ + .word _fault /* -6 reserved. */ + .word SVC_Handler /* -5 SVCall. */ + .word _fault /* -4 Breakpoint. */ + .word _fault /* -3 reserved. */ + .word PendSV_Handler /* -2 PendSV. */ + .word SysTick_Handler /* -1 Systick. */ + + /* MCU interrupts, 0 .. 90 (to match System.Interrupts.Interrupt_ID */ + .rept 91 + .word IRQ_Handler + .endr + .size _isr_vector, . - _isr_vector + + .section .text + + .thumb_func + .type _fault, %function +_fault: b _fault + .size _fault, . - _fault + diff --git a/stm32f429i/adainclude/startup.adb b/stm32f429i/adainclude/startup.adb index 1683fbb..63fd891 100644 --- a/stm32f429i/adainclude/startup.adb +++ b/stm32f429i/adainclude/startup.adb @@ -1,4 +1,4 @@ --- Copyright (C) 2016-2018 Free Software Foundation, Inc. +-- Copyright (C) 2016-2021 Free Software Foundation, Inc. -- -- This file is part of the Cortex GNAT RTS project. This file is -- free software; you can redistribute it and/or modify it under @@ -18,7 +18,6 @@ -- program; see the files COPYING3 and COPYING.RUNTIME respectively. -- If not, see . -with Ada.Interrupts.Names; with Interfaces; with System.Machine_Code; with System.Parameters; @@ -67,6 +66,8 @@ package body Startup is -- _edata: the first address after read/write data in SRAM -- _sbss: the start of BSS (to be initialized to zero) -- _ebss: the first address after BSS. + -- + -- _isr_vector is set up in interrupt_vectors.s. use System.Storage_Elements; @@ -144,29 +145,19 @@ package body Startup is System.FreeRTOS.Tasks.Start_Scheduler; end Program_Initialization; - ------------------------- - -- Interrupt vectors -- - ------------------------- + -------------------------- + -- Interrupt Handlers -- + -------------------------- - -- Vector Table, STM32F4xxxx Reference Manual DocID018909 Rev 11 - -- Table 62. + -- The interrupt vector is set up in interrupt_vectors.s, using + -- the handlers defined here. - procedure Dummy_Handler; - procedure Dummy_Handler is - IPSR : Interfaces.Unsigned_32 - with Volatile; -- don't want it to be optimised away - begin - System.Machine_Code.Asm - ("mrs %0, ipsr", - Outputs => Interfaces.Unsigned_32'Asm_Output ("=r", IPSR), - Volatile => True); - loop - null; - end loop; - end Dummy_Handler; + -- These handlers are all defined as Weak so that they can be + -- replaced by real handlers at link time. - -- The remaining handlers are all defined as Weak so that they can - -- be replaced by real handlers at link time. + -- If we defined the weak handlers in interrupt_vectors.s, the + -- references would be satisfied internally and so couldn't be + -- replaced by the real handler. procedure HardFault_Handler with Export, Convention => Ada, External_Name => "HardFault_Handler"; @@ -178,6 +169,7 @@ package body Startup is end loop; end HardFault_Handler; + -- Provided by FreeRTOS. procedure SVC_Handler with Export, Convention => Ada, External_Name => "SVC_Handler"; pragma Weak_External (SVC_Handler); @@ -188,6 +180,7 @@ package body Startup is end loop; end SVC_Handler; + -- Provided by FreeRTOS. procedure PendSV_Handler with Export, Convention => Ada, External_Name => "PendSV_Handler"; pragma Weak_External (PendSV_Handler); @@ -198,6 +191,7 @@ package body Startup is end loop; end PendSV_Handler; + -- Provided by FreeRTOS. procedure SysTick_Handler with Export, Convention => Ada, External_Name => "SysTick_Handler"; pragma Weak_External (SysTick_Handler); @@ -226,24 +220,4 @@ package body Startup is end loop; end IRQ_Handler; - type Handler is access procedure; - - use type Ada.Interrupts.Interrupt_ID; - Vectors : array (-14 .. Ada.Interrupts.Names.DMA2D_IRQ) of Handler := - (-9 .. -6 | -4 .. -3 => null, -- reserved - -14 => Dummy_Handler'Access, -- NMI - -13 => HardFault_Handler'Access, -- HardFault - -12 => Dummy_Handler'Access, -- MemManagement - -11 => Dummy_Handler'Access, -- BusFault - -10 => Dummy_Handler'Access, -- UsageFault - -5 => SVC_Handler'Access, -- SVCall - -2 => PendSV_Handler'Access, -- PendSV - -1 => SysTick_Handler'Access, -- SysTick - others => IRQ_Handler'Access) - with - Export, - Convention => Ada, - External_Name => "isr_vector"; - pragma Linker_Section (Vectors, ".isr_vector"); - end Startup; diff --git a/stm32f429i/adalib/stm32f429i-flash.ld b/stm32f429i/adalib/stm32f429i-flash.ld index 9fd289c..cf8966f 100644 --- a/stm32f429i/adalib/stm32f429i-flash.ld +++ b/stm32f429i/adalib/stm32f429i-flash.ld @@ -1,6 +1,7 @@ /* The MIT License * * Copyright (c) 2007, 2008, 2009, 2010 Dado Sutter and Bogdan Marinescu + * Copyright (c) 2012-2021 Simon Wright * * Permission is hereby granted, free of charge, to any person obtaining * a copy of this software and associated documentation files (the @@ -49,20 +50,12 @@ MEMORY SECTIONS { - .isr_vector : - { - . = ALIGN(4); - _isr_vector = .; - LONG(_estack) - LONG(program_initialization + 1) - KEEP(*(.isr_vector)) - } > flash - .text : { . = ALIGN(4); - /* _text = .; */ - /* PROVIDE(stext = .);*/ + *(.isr_vector) + . = ALIGN(512); + *(.text) *(.text.*) *(.gnu.linkonce.t.*) @@ -148,7 +141,7 @@ SECTIONS } >sram end = .; - PROVIDE( _estack = 0x20030000); + PROVIDE(_estack = ORIGIN(sram) + LENGTH(sram)); /DISCARD/ : { *(.note.GNU-stack) *(.gnu_debuglink) *(.gnu.lto_*) } diff --git a/stm32f429i/build_runtime.gpr b/stm32f429i/build_runtime.gpr index ec7a0d6..3d7ebbf 100644 --- a/stm32f429i/build_runtime.gpr +++ b/stm32f429i/build_runtime.gpr @@ -21,7 +21,7 @@ with "../FreeRTOS"; library project Build_Runtime is - for Languages use ("Ada", "C"); + for Languages use ("Ada", "C", "ASM"); for Library_Auto_Init use "False"; for Library_Name use "gnat"; @@ -94,7 +94,7 @@ library project Build_Runtime is for Switches ("s-assert.adb") use ALL_ADAFLAGS & ("-g"); for Switches ("a-tags.adb") use ALL_ADAFLAGS & ("-g"); for Switches ("last_chance_handler.c") use ALL_CFLAGS & ("-g", "-O0"); - for Switches ("hardfault_handling.adb") use ALL_ADAFLAGS & ("-g", "-O0"); + for Switches ("s-harhan.adb") use ALL_ADAFLAGS & ("-g", "-O0"); end Compiler; package Install is From a39a65e9bb56a5dddfcf46c05c14bba83b5d56a1 Mon Sep 17 00:00:00 2001 From: Simon Wright Date: Sat, 27 Mar 2021 15:40:02 +0000 Subject: [PATCH 07/10] Eliminate warnings in micro:bit test files. * test-microbit/circle.adb: add warnings round System.HardFault_Handling. * test-microbit/events.adb: likewise. --- test-microbit/circle.adb | 8 +++++--- test-microbit/events.adb | 11 ++++++++--- 2 files changed, 13 insertions(+), 6 deletions(-) diff --git a/test-microbit/circle.adb b/test-microbit/circle.adb index cb0f8fe..9358aa5 100644 --- a/test-microbit/circle.adb +++ b/test-microbit/circle.adb @@ -1,4 +1,4 @@ --- Copyright (C) 2018,2020 Free Software Foundation, Inc. +-- Copyright (C) 2018-2021 Free Software Foundation, Inc. -- This file is part of the Cortex GNAT RTS package. -- @@ -16,8 +16,10 @@ -- along with this program; see the file COPYING3. If not, see -- . -with Hardfault_Handling; -pragma Unreferenced (Hardfault_Handling); +pragma Warnings (Off, "internal GNAT unit"); +with System.Hardfault_Handling; +pragma Warnings (On, "internal GNAT unit"); +pragma Unreferenced (System.Hardfault_Handling); with Lights; pragma Unreferenced (Lights); diff --git a/test-microbit/events.adb b/test-microbit/events.adb index dea22c9..02e5a29 100644 --- a/test-microbit/events.adb +++ b/test-microbit/events.adb @@ -1,4 +1,4 @@ --- Copyright (C) 2020 Free Software Foundation, Inc. +-- Copyright (C) 2020-2021 Free Software Foundation, Inc. -- This file is part of the Cortex GNAT RTS package. -- @@ -18,8 +18,12 @@ with Event_Support; with Ada.Real_Time.Timing_Events; --- with Hardfault_Handling; --- pragma Unreferenced (Hardfault_Handling); + +pragma Warnings (Off, "internal GNAT unit"); +with System.Hardfault_Handling; +pragma Warnings (On, "internal GNAT unit"); +pragma Unreferenced (System.Hardfault_Handling); + procedure Events is -- Environment_Task_Storage_Size : constant Natural := 1536 -- with @@ -36,5 +40,6 @@ begin (Ada.Real_Time.Timing_Events.Timing_Event (Event_Support.Slow)); Event_Support.Handler (Ada.Real_Time.Timing_Events.Timing_Event (Event_Support.Quick)); + delay until Ada.Real_Time.Time_Last; end Events; From 11e7225d6e57c349607d1c2bf85ef1dc448ffb15 Mon Sep 17 00:00:00 2001 From: Simon Wright Date: Tue, 30 Mar 2021 16:16:36 +0100 Subject: [PATCH 08/10] Workround for GCC PR 99802. Problem found in GCC 11.0.1, also in GNAT CE 2020, so keep change in case people are still on that compiler. * arduino-due/adainclude/startup-set_up_clock.adb: avoid writing aggregates to registers (they were being writtn component-by-component): instead, write to local variable, then write the variable to the register. Also, tidy up loops. * stm32f4/adainclude/startup-set_up_clock.adb: likewise. * stm32f429i/adainclude/startup-set_up_clock.adb: likewise. --- .../adainclude/startup-set_up_clock.adb | 57 ++++--- stm32f4/adainclude/startup-set_up_clock.adb | 148 +++++++----------- .../adainclude/startup-set_up_clock.adb | 148 +++++++----------- 3 files changed, 146 insertions(+), 207 deletions(-) diff --git a/arduino-due/adainclude/startup-set_up_clock.adb b/arduino-due/adainclude/startup-set_up_clock.adb index b3681b6..4f606da 100644 --- a/arduino-due/adainclude/startup-set_up_clock.adb +++ b/arduino-due/adainclude/startup-set_up_clock.adb @@ -1,4 +1,4 @@ --- Copyright (C) 2016, 2020 Free Software Foundation, Inc. +-- Copyright (C) 2016-2021 Free Software Foundation, Inc. -- -- This file is part of the Cortex GNAT RTS project. This file is -- free software; you can redistribute it and/or modify it under @@ -45,23 +45,27 @@ begin end; -- Select the Main Clock - PMC_Periph.CKGR_MOR := (KEY => 16#37#, - MOSCXTEN => 1, -- main crystal oscillator enable - MOSCRCEN => 1, -- main on-chip rc osc. enable - MOSCXTST => 8, -- startup time - others => <>); - -- XXX shouldn't this give 4 MHz, not 12? + declare + CKGR_MOR : constant CKGR_MOR_Register := + (KEY => 16#37#, + MOSCXTEN => 1, -- main crystal oscillator enable + MOSCRCEN => 1, -- main on-chip rc osc. enable + MOSCXTST => 8, -- startup time + others => <>); + -- XXX shouldn't this give 4 MHz, not 12? + begin + PMC_Periph.CKGR_MOR := CKGR_MOR; + end; -- Loop until stable loop - exit when PMC_Periph.PMC_SR.MOSCXTS /= 0; + exit when PMC_Periph.PMC_SR.MOSCXTS = 1; end loop; -- Select the Main oscillator declare - CKGR_MOR : CKGR_MOR_Register; + CKGR_MOR : CKGR_MOR_Register := PMC_Periph.CKGR_MOR; begin - CKGR_MOR := PMC_Periph.CKGR_MOR; CKGR_MOR.KEY := 16#37#; CKGR_MOR.MOSCSEL := 1; PMC_Periph.CKGR_MOR := CKGR_MOR; @@ -73,18 +77,28 @@ begin end loop; -- Disable PLLA (?hardware bugfix?) - PMC_Periph.CKGR_PLLAR := (ONE => 1, - MULA => 0, - DIVA => 0, - others => <>); + declare + CKGR_PLLAR : constant CKGR_PLLAR_Register := + (ONE => 1, + MULA => 0, + DIVA => 0, + others => <>); + begin + PMC_Periph.CKGR_PLLAR := CKGR_PLLAR; + end; -- Set PLLA to multiply by 14, count 16#3f#, divide by 1 (=> -- enable PLL); Main Clock is 12 MHz, => 168 Mhz - PMC_Periph.CKGR_PLLAR := (ONE => 1, - MULA => 13, -- multipler - 1 - PLLACOUNT => 16#3f#, - DIVA => 1, - others => <>); + declare + CKGR_PLLAR : constant CKGR_PLLAR_Register := + (ONE => 1, + MULA => 13, -- multipler - 1 + PLLACOUNT => 16#3f#, + DIVA => 1, + others => <>); + begin + PMC_Periph.CKGR_PLLAR := CKGR_PLLAR; + end; -- Loop until ready loop @@ -95,8 +109,9 @@ begin PMC_MCKR : PMC_MCKR_Register; begin -- Select Main Clock, PRES 0 (no prescaling) - PMC_Periph.PMC_MCKR := (CSS => MAIN_CLK, - others => <>); + PMC_MCKR := (CSS => MAIN_CLK, + others => <>); + PMC_Periph.PMC_MCKR := PMC_MCKR; -- Loop until ready loop exit when PMC_Periph.PMC_SR.MCKRDY /= 0; diff --git a/stm32f4/adainclude/startup-set_up_clock.adb b/stm32f4/adainclude/startup-set_up_clock.adb index 44cad87..384f7fd 100644 --- a/stm32f4/adainclude/startup-set_up_clock.adb +++ b/stm32f4/adainclude/startup-set_up_clock.adb @@ -1,4 +1,4 @@ --- Copyright (C) 2016 Free Software Foundation, Inc. +-- Copyright (C) 2016-2021 Free Software Foundation, Inc. -- -- This file is part of the Cortex GNAT RTS project. This file is -- free software; you can redistribute it and/or modify it under @@ -28,133 +28,95 @@ procedure Set_Up_Clock is begin -- Enable PWR clock - declare - APB1ENR : APB1ENR_Register; - begin - APB1ENR := RCC_Periph.APB1ENR; - APB1ENR.PWREN := 1; - RCC_Periph.APB1ENR := APB1ENR; - end; + RCC_Periph.APB1ENR.PWREN := 1; -- Set highest voltage for maximum frequency (168 MHz). -- DocID022152 Rev 6 Table 14. -- Postpone wait-until-ready until PLL is in use. - declare - CR : STM32F40x.PWR.CR_Register; - begin - CR := PWR_Periph.CR; - CR.VOS := 1; - PWR_Periph.CR := CR; - end; + PWR_Periph.CR.VOS := 1; -- Setup internal high-speed clock and wait for stabilisation. - declare - CR : STM32F40x.RCC.CR_Register; - begin - CR := RCC_Periph.CR; - CR.HSION := 1; - RCC_Periph.CR := CR; - loop - CR := RCC_Periph.CR; - exit when CR.HSIRDY = 1; - end loop; - end; + RCC_Periph.CR.HSION := 1; + loop + exit when RCC_Periph.CR.HSIRDY = 1; + end loop; -- Setup external high-speed clock and wait for stabilisation. - declare - CR : STM32F40x.RCC.CR_Register; - begin - CR := RCC_Periph.CR; - CR.HSEON := 1; - -- Don't set HSEBYP (i.e. don't bypass external oscillator) - RCC_Periph.CR := CR; - loop - CR := RCC_Periph.CR; - exit when CR.HSERDY = 1; - end loop; - end; + RCC_Periph.CR.HSEON := 1; + -- Don't set HSEBYP (i.e. don't bypass external oscillator) + loop + exit when RCC_Periph.CR.HSERDY = 1; + end loop; -- Setup internal low-speed clock and wait for stabilisation. - declare - CSR : STM32F40x.RCC.CSR_Register; - begin - CSR := RCC_Periph.CSR; - CSR.LSION := 1; - RCC_Periph.CSR := CSR; - loop - CSR := RCC_Periph.CSR; - exit when CSR.LSIRDY = 1; - end loop; - end; + RCC_Periph.CSR.LSION := 1; + loop + exit when RCC_Periph.CSR.LSIRDY = 1; + end loop; -- Activate the PLL at 168 MHz. -- See RM0090 5.1.4 for how to enter overdrive mode and enable -- SYSCLK of 180 MHz. declare - CR : STM32F40x.RCC.CR_Register; + PLLCFGR : constant PLLCFGR_Register + := (PLLM => 8, + PLLN => 336, -- no overdrive: 168 MHz + PLLP => 0, -- *2 + PLLSRC => 1, -- HSE + PLLQ => 7, + others => <>); begin - RCC_Periph.PLLCFGR := (PLLM => 8, - PLLN => 336, -- no overdrive: 168 MHz - PLLP => 0, -- *2 - PLLSRC => 1, -- HSE - PLLQ => 7, - others => <>); - CR := RCC_Periph.CR; - CR.PLLON := 1; - RCC_Periph.CR := CR; - loop - CR := RCC_Periph.CR; - exit when CR.PLLRDY = 1; - end loop; + RCC_Periph.PLLCFGR := PLLCFGR; end; + RCC_Periph.CR.PLLON := 1; + loop + exit when RCC_Periph.CR.PLLRDY = 1; + end loop; -- Wait until voltage supply scaling is ready (must be after PLL -- is ready). - declare - CSR : STM32F40x.PWR.CSR_Register; - begin - loop - CSR := PWR_Periph.CSR; - exit when CSR.VOSRDY = 1; - end loop; - end; + loop + exit when PWR_Periph.CSR.VOSRDY = 1; + end loop; -- Set flash latency to 5 wait states _before_ increasing the clock. declare - ACR : STM32F40x.FLASH.ACR_Register; + ACR : constant STM32F40x.FLASH.ACR_Register + := (LATENCY => 5, + PRFTEN => 1, + ICEN => 1, + DCEN => 1, + others => <>); use type STM32F40x.UInt3; begin - FLASH_Periph.ACR := (LATENCY => 5, - PRFTEN => 1, - ICEN => 1, - DCEN => 1, - others => <>); + FLASH_Periph.ACR := ACR; + -- Not sure we need to check this. loop - ACR := FLASH_Periph.ACR; - exit when ACR.LATENCY = 5; + exit when FLASH_Periph.ACR.LATENCY = 5; end loop; end; -- Configure clocks. - RCC_Periph.CFGR := - (SW => 2, -- clock source is PLL - HPRE => 0, -- AHB prescale = 1 - PPRE => (As_Array => True, - Arr => (5, -- APB lo speed prescale (PPRE1) = 4 - 4)), -- APB hi speed prescale (PPRE2) = 2 - MCO1 => 0, -- MCU clock output 1 HSI selected - MCO1PRE => 0, -- MCU clock output 1 prescale = 1 - MCO2 => 0, -- MCU clock output 2 SYSCLK selected - MCO2PRE => 7, -- MCU clock output 2 prescale = 5 - others => <>); declare - CFGR : STM32F40x.RCC.CFGR_Register; + CFGR : constant STM32F40x.RCC.CFGR_Register + := (SW => 2, -- clock source is PLL + HPRE => 0, -- AHB prescale = 1 + PPRE => (As_Array => True, + Arr => (5, -- APB lo speed prescale (PPRE1) = 4 + 4)), -- APB hi speed prescale (PPRE2) = 2 + MCO1 => 0, -- MCU clock output 1 HSI selected + MCO1PRE => 0, -- MCU clock output 1 prescale = 1 + MCO2 => 0, -- MCU clock output 2 SYSCLK selected + MCO2PRE => 7, -- MCU clock output 2 prescale = 5 + others => <>); use type STM32F40x.UInt2; begin + RCC_Periph.CFGR := CFGR; + + -- Wait until PLL running loop - CFGR := RCC_Periph.CFGR; - exit when CFGR.SWS = 2; -- PLL running + exit when RCC_Periph.CFGR.SWS = 2; end loop; end; diff --git a/stm32f429i/adainclude/startup-set_up_clock.adb b/stm32f429i/adainclude/startup-set_up_clock.adb index f45c9dd..abb5bbe 100644 --- a/stm32f429i/adainclude/startup-set_up_clock.adb +++ b/stm32f429i/adainclude/startup-set_up_clock.adb @@ -1,4 +1,4 @@ --- Copyright (C) 2016 Free Software Foundation, Inc. +-- Copyright (C) 2016-2021 Free Software Foundation, Inc. -- -- This file is part of the Cortex GNAT RTS project. This file is -- free software; you can redistribute it and/or modify it under @@ -28,134 +28,96 @@ procedure Set_Up_Clock is begin -- Enable PWR clock - declare - APB1ENR : APB1ENR_Register; - begin - APB1ENR := RCC_Periph.APB1ENR; - APB1ENR.PWREN := 1; - RCC_Periph.APB1ENR := APB1ENR; - end; + RCC_Periph.APB1ENR.PWREN := 1; -- Set highest voltage for maximum frequency (168 MHz, or 180 MHz -- w/ overdrive). -- DocID024030 Rev 4 Table 17 Row V12. -- Postpone wait-until-ready until PLL is in use. - declare - CR : STM32F429x.PWR.CR_Register; - begin - CR := PWR_Periph.CR; - CR.VOS := 3; - PWR_Periph.CR := CR; - end; + PWR_Periph.CR.VOS := 3; -- Setup internal high-speed clock and wait for stabilisation. - declare - CR : STM32F429x.RCC.CR_Register; - begin - CR := RCC_Periph.CR; - CR.HSION := 1; - RCC_Periph.CR := CR; - loop - CR := RCC_Periph.CR; - exit when CR.HSIRDY = 1; - end loop; - end; + RCC_Periph.CR.HSION := 1; + loop + exit when RCC_Periph.CR.HSIRDY = 1; + end loop; -- Setup external high-speed clock and wait for stabilisation. - declare - CR : STM32F429x.RCC.CR_Register; - begin - CR := RCC_Periph.CR; - CR.HSEON := 1; - -- Don't set HSEBYP (i.e. don't bypass external oscillator) - RCC_Periph.CR := CR; - loop - CR := RCC_Periph.CR; - exit when CR.HSERDY = 1; - end loop; - end; + RCC_Periph.CR.HSEON := 1; + -- Don't set HSEBYP (i.e. don't bypass external oscillator) + loop + exit when RCC_Periph.CR.HSERDY = 1; + end loop; -- Setup internal low-speed clock and wait for stabilisation. - declare - CSR : STM32F429x.RCC.CSR_Register; - begin - CSR := RCC_Periph.CSR; - CSR.LSION := 1; - RCC_Periph.CSR := CSR; - loop - CSR := RCC_Periph.CSR; - exit when CSR.LSIRDY = 1; - end loop; - end; + RCC_Periph.CSR.LSION := 1; + loop + exit when RCC_Periph.CSR.LSIRDY = 1; + end loop; -- Activate the PLL at 168 MHz. -- See RM0090 5.1.4 for how to enter overdrive mode and enable -- SYSCLK of 180 MHz. declare - CR : STM32F429x.RCC.CR_Register; + PLLCFGR : constant STM32F429x.RCC.PLLCFGR_Register + := (PLLM => 8, + PLLN => 336, -- no overdrive: 168 MHz + PLLP => 0, -- *2 + PLLSRC => 1, -- HSE + PLLQ => 7, + others => <>); begin - RCC_Periph.PLLCFGR := (PLLM => 8, - PLLN => 336, -- no overdrive: 168 MHz - PLLP => 0, -- *2 - PLLSRC => 1, -- HSE - PLLQ => 7, - others => <>); - CR := RCC_Periph.CR; - CR.PLLON := 1; - RCC_Periph.CR := CR; - loop - CR := RCC_Periph.CR; - exit when CR.PLLRDY = 1; - end loop; + RCC_Periph.PLLCFGR := PLLCFGR; end; + RCC_Periph.CR.PLLON := 1; + loop + exit when RCC_Periph.CR.PLLRDY = 1; + end loop; -- Wait until voltage supply scaling is ready (must be after PLL -- is ready). - declare - CSR : STM32F429x.PWR.CSR_Register; - begin - loop - CSR := PWR_Periph.CSR; - exit when CSR.VOSRDY = 1; - end loop; - end; + loop + exit when PWR_Periph.CSR.VOSRDY = 1; + end loop; -- Set flash latency to 5 wait states _before_ increasing the clock. declare - ACR : STM32F429x.FLASH.ACR_Register; + ACR : constant STM32F429x.FLASH.ACR_Register + := (LATENCY => 5, + PRFTEN => 1, + ICEN => 1, + DCEN => 1, + others => <>); use type STM32F429x.UInt3; begin - FLASH_Periph.ACR := (LATENCY => 5, - PRFTEN => 1, - ICEN => 1, - DCEN => 1, - others => <>); + FLASH_Periph.ACR := ACR; + -- Not sure we need to check this. loop - ACR := FLASH_Periph.ACR; - exit when ACR.LATENCY = 5; + exit when FLASH_Periph.ACR.LATENCY = 5; end loop; end; -- Configure clocks. - RCC_Periph.CFGR := - (SW => 2, -- clock source is PLL - HPRE => 0, -- AHB prescale = 1 - PPRE => (As_Array => True, - Arr => (5, -- APB lo speed prescale (PPRE1) = 4 - 4)), -- APB hi speed prescale (PPRE2) = 2 - MCO1 => 0, -- MCU clock output 1 HSI selected - MCO1PRE => 0, -- MCU clock output 1 prescale = 1 - MCO2 => 0, -- MCU clock output 2 SYSCLK selected - MCO2PRE => 7, -- MCU clock output 2 prescale = 5 - others => <>); declare - CFGR : STM32F429x.RCC.CFGR_Register; + CFGR : constant STM32F429x.RCC.CFGR_Register + := (SW => 2, -- clock source is PLL + HPRE => 0, -- AHB prescale = 1 + PPRE => (As_Array => True, + Arr => (5, -- APB lo speed prescale (PPRE1) = 4 + 4)), -- APB hi speed prescale (PPRE2) = 2 + MCO1 => 0, -- MCU clock output 1 HSI selected + MCO1PRE => 0, -- MCU clock output 1 prescale = 1 + MCO2 => 0, -- MCU clock output 2 SYSCLK selected + MCO2PRE => 7, -- MCU clock output 2 prescale = 5 + others => <>); use type STM32F429x.UInt2; begin + RCC_Periph.CFGR := CFGR; + + -- Wait until PLL running loop - CFGR := RCC_Periph.CFGR; - exit when CFGR.SWS = 2; -- PLL running + exit when RCC_Periph.CFGR.SWS = 2; end loop; end; From 69839dfde8c4dca9dbd01c8692c5d0e19faa2b7a Mon Sep 17 00:00:00 2001 From: Simon Wright Date: Sat, 10 Apr 2021 17:57:43 +0100 Subject: [PATCH 09/10] Remove extra linefeeds in README.md. --- README.md | 28 +++++----------------------- 1 file changed, 5 insertions(+), 23 deletions(-) diff --git a/README.md b/README.md index 88ba403..b330b2a 100644 --- a/README.md +++ b/README.md @@ -1,27 +1,10 @@ -This package includes GNAT Ada Run Time Systems (RTSs) based -on [FreeRTOS](http://www.freertos.org) and targeted at boards with -Cortex-M0, -M3, -M4, -M4F MCUs -(respectively -[BBC micro:bit](http://microbit.org), -[Arduino Due](https://www.arduino.cc), and the STM32F4-series evaluation -boards from [STMicroelectronics](https://www.st.com)). For discussions, -visit the dedicated -[Google Group](https://groups.google.com/forum/#!forum/cortex-gnat-rts). +This package includes GNAT Ada Run Time Systems (RTSs) based on [FreeRTOS](http://www.freertos.org) and targeted at boards with Cortex-M0, -M3, -M4, -M4F MCUs (respectively [BBC micro:bit](http://microbit.org), [Arduino Due](https://www.arduino.cc), and the STM32F4-series evaluation boards from [STMicroelectronics](https://www.st.com)). For discussions, visit the dedicated [Google Group](https://groups.google.com/forum/#!forum/cortex-gnat-rts). -The RTSs are all Ravenscar-based, with additional restrictions -`No_Exception_Propagation` and `No_Finalization`. -`No_Exception_Propagation` means that exceptions can't be caught -except in their immediate scope; instead, a `Last_Chance_Handler` is -called. +The RTSs are all Ravenscar-based, with additional restrictions `No_Exception_Propagation` and `No_Finalization`. `No_Exception_Propagation` means that exceptions can't be caught except in their immediate scope; instead, a `Last_Chance_Handler` is called. -In each case, the board support for the RTS (configuration for size -and location of Flash, RAM; clock initialization; interrupt naming) is -in `$RTS/adainclude`. Support for the on-chip peripherals is also -included, in Ada spec files generated by -[SVD2Ada](https://github.com/AdaCore/svd2ada). +In each case, the board support for the RTS (configuration for size and location of Flash, RAM; clock initialization; interrupt naming) is in `$RTS/adainclude`. Support for the on-chip peripherals is also included, in Ada spec files generated by [SVD2Ada](https://github.com/AdaCore/svd2ada). -The Ada source is either original or based on FSF GCC (mainly 4.9.1, -some later releases too). +The Ada source is either original or based on FSF GCC (mainly 4.9.1, some later releases too). The boards supported are @@ -45,8 +28,7 @@ The boards supported are * On-chip peripheral support in `stm32f429x/`. * Tests in `test-stm32f429i/`. -The standard packages included (there are more, implementation-specific, -ones) for all RTSs are: +The standard packages included (there are more, implementation-specific, ones) for all RTSs are: Ada Ada.Characters From 7882fb2fdbc912cd1845a454733a4015351442d4 Mon Sep 17 00:00:00 2001 From: Simon Wright Date: Tue, 4 May 2021 15:15:44 +0100 Subject: [PATCH 10/10] Further work for GCC 11. * INSTALL.md: Noted that RELEASE should be set to "gcc11" for GCC 11. * common/common.gpr (Compiler_Release): include "gcc11". (Release_Path): new, set to Release unless "gcc11", in which case set to "gnat-ce-2020". (Paths): use Release_Path. --- INSTALL.md | 2 +- common/common.gpr | 13 ++++++++++--- 2 files changed, 11 insertions(+), 4 deletions(-) diff --git a/INSTALL.md b/INSTALL.md index 0516d83..82a6d3f 100644 --- a/INSTALL.md +++ b/INSTALL.md @@ -30,7 +30,7 @@ Values for `RELEASE` are as below: | FSF GCC 8 | `gcc8` | | FSF GCC 9 | `gcc8` | | FSF GCC 10 | `gcc8` | -| FSF GCC 11 | `gnat-ce-2020` | +| FSF GCC 11 | `gcc11` | | GNAT GPL 2016 | `gcc6` | | GNAT GPL 2017 | `gnat-gpl-2017` | | GNAT CE 2018 | `gcc8` | diff --git a/common/common.gpr b/common/common.gpr index 0f219f5..a924e3a 100644 --- a/common/common.gpr +++ b/common/common.gpr @@ -1,4 +1,4 @@ --- Copyright (C) 2018, 2020 Free Software Foundation, Inc. +-- Copyright (C) 2018-2021 Free Software Foundation, Inc. -- This file is part of the Cortex GNAT RTS package. -- @@ -19,14 +19,21 @@ abstract project Common is type Compiler_Release is - ("gcc6", "gnat-gpl-2017", "gcc7", "gcc8", "gnat-ce-2020"); + ("gcc6", "gnat-gpl-2017", "gcc7", "gcc8", "gnat-ce-2020", "gcc11"); Release : Compiler_Release := external ("RELEASE", "gcc8"); + Release_Path := Release; + case Release is + when "gcc11" => + Release_Path := "gnat-ce-2020"; + when others => + null; + end case; type Install_Locally is ("yes", "no"); Local : Install_Locally := external ("INSTALL_LOCALLY", "yes"); Paths := (project'Project_Dir, project'Project_Dir & "math", - project'Project_Dir & Release); + project'Project_Dir & Release_Path); end Common;