diff --git a/INSTALL.md b/INSTALL.md index c484969..82a6d3f 100644 --- a/INSTALL.md +++ b/INSTALL.md @@ -29,6 +29,8 @@ Values for `RELEASE` are as below: | FSF GCC 7 | `gcc7` | | FSF GCC 8 | `gcc8` | | FSF GCC 9 | `gcc8` | +| FSF GCC 10 | `gcc8` | +| FSF GCC 11 | `gcc11` | | GNAT GPL 2016 | `gcc6` | | GNAT GPL 2017 | `gnat-gpl-2017` | | GNAT CE 2018 | `gcc8` | diff --git a/arduino-due/adainclude/_init.c b/arduino-due/adainclude/_init.c deleted file mode 100644 index 0e991aa..0000000 --- a/arduino-due/adainclude/_init.c +++ /dev/null @@ -1,37 +0,0 @@ -/* - * Copyright Simon Wright - * - * GNAT is free software; you can redistribute it and/or modify it - * under terms of the GNU General Public License as published by the - * Free Soft- ware Foundation; either version 3, or (at your option) - * any later ver- sion. GNAT is distributed in the hope that it will - * be useful, but WITH- OUT ANY WARRANTY; without even the implied - * warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. - * - * As a special exception under Section 7 of GPL version 3, you are - * granted additional permissions described in the GCC Runtime Library - * Exception, version 3.1, as published by the Free Software - * Foundation. - * - * You should have received a copy of the GNU General Public License - * and a copy of the GCC Runtime Library Exception along with this - * program; see the files COPYING3 and COPYING.RUNTIME respectively. - * If not, see . - */ - -#ifdef __cplusplus -extern "C" { -#endif - -/* - * This is needed because it's called by newlib's __libc_init_array, in init.c. - * A strong symbol will be provided in C++ code. - */ - -__attribute__((weak)) void _init(void) -{ -} - -#ifdef __cplusplus -} -#endif diff --git a/arduino-due/adainclude/interrupt_vectors.s b/arduino-due/adainclude/interrupt_vectors.s new file mode 100644 index 0000000..f04806f --- /dev/null +++ b/arduino-due/adainclude/interrupt_vectors.s @@ -0,0 +1,71 @@ + @ Copyright (C) 2021 Free Software Foundation, Inc. + + @ This file is part of the Cortex GNAT RTS project. This file is + @ free software; you can redistribute it and/or modify it under + @ terms of the GNU General Public License as published by the Free + @ Software Foundation; either version 3, or (at your option) any + @ later version. This file is distributed in the hope that it will + @ be useful, but WITHOUT ANY WARRANTY; without even the implied + @ warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. + + @ As a special exception under Section 7 of GPL version 3, you are + @ granted additional permissions described in the GCC Runtime + @ Library Exception, version 3.1, as published by the Free Software + @ Foundation. + + @ You should have received a copy of the GNU General Public License + @ and a copy of the GCC Runtime Library Exception along with this + @ program; see the files COPYING3 and COPYING.RUNTIME respectively. + @ If not, see . + + @ This is the Vector Table, described in 11057 23-mar-15, Chapter 10.6.4 + + @ The capitalized handlers are defined in startup.adb, using + @ weak symbols (they can't be defined here, unlike _fault, or + @ the linker satisfies the requirement immediately). + + .syntax unified + .cpu cortex-m4 + .thumb + + .text + .section .isr_vector + .align 2 + .global _isr_vector + .type _isr_vector, %object + +_isr_vector: + /* Startup */ + .word _estack /* top of stack, from linker script. */ + .word program_initialization /* entry point */ + + /* Cortex-M core interrupts */ + .word _fault /* -14 NMI. */ + .word HardFault_Handler /* -13 Hard fault. */ + .word _fault /* -12 Mem manage. */ + .word _fault /* -11 Bus fault. */ + .word _fault /* -10 Usage fault. */ + .word _fault /* -9 reserved. */ + .word _fault /* -8 reserved. */ + .word _fault /* -7 reserved. */ + .word _fault /* -6 reserved. */ + .word SVC_Handler /* -5 SVCall. */ + .word _fault /* -4 Breakpoint. */ + .word _fault /* -3 reserved. */ + .word PendSV_Handler /* -2 PendSV. */ + .word SysTick_Handler /* -1 Systick. */ + + /* MCU interrupts */ + .rept 45 /* 0 .. 44, standard */ + .word IRQ_Handler + .endr + + .size _isr_vector, . - _isr_vector + + .section .text + + .thumb_func + .type _fault, %function +_fault: b _fault + .size _fault, . - _fault + diff --git a/arduino-due/adainclude/startup-set_up_clock.adb b/arduino-due/adainclude/startup-set_up_clock.adb index 4deeba6..4f606da 100644 --- a/arduino-due/adainclude/startup-set_up_clock.adb +++ b/arduino-due/adainclude/startup-set_up_clock.adb @@ -1,4 +1,4 @@ --- Copyright (C) 2016, 2020 Free Software Foundation, Inc. +-- Copyright (C) 2016-2021 Free Software Foundation, Inc. -- -- This file is part of the Cortex GNAT RTS project. This file is -- free software; you can redistribute it and/or modify it under @@ -45,23 +45,27 @@ begin end; -- Select the Main Clock - PMC_Periph.CKGR_MOR := (KEY => 16#37#, - MOSCXTEN => 1, -- main crystal oscillator enable - MOSCRCEN => 1, -- main on-chip rc osc. enable - MOSCXTST => 8, -- startup time - others => <>); - -- XXX shouldn't this give 4 MHz, not 12? + declare + CKGR_MOR : constant CKGR_MOR_Register := + (KEY => 16#37#, + MOSCXTEN => 1, -- main crystal oscillator enable + MOSCRCEN => 1, -- main on-chip rc osc. enable + MOSCXTST => 8, -- startup time + others => <>); + -- XXX shouldn't this give 4 MHz, not 12? + begin + PMC_Periph.CKGR_MOR := CKGR_MOR; + end; -- Loop until stable loop - exit when PMC_Periph.PMC_SR.MOSCXTS /= 0; + exit when PMC_Periph.PMC_SR.MOSCXTS = 1; end loop; -- Select the Main oscillator declare - CKGR_MOR : CKGR_MOR_Register; + CKGR_MOR : CKGR_MOR_Register := PMC_Periph.CKGR_MOR; begin - CKGR_MOR := PMC_Periph.CKGR_MOR; CKGR_MOR.KEY := 16#37#; CKGR_MOR.MOSCSEL := 1; PMC_Periph.CKGR_MOR := CKGR_MOR; @@ -73,18 +77,28 @@ begin end loop; -- Disable PLLA (?hardware bugfix?) - PMC_Periph.CKGR_PLLAR := (ONE => 1, - MULA => 0, - DIVA => 0, - others => <>); + declare + CKGR_PLLAR : constant CKGR_PLLAR_Register := + (ONE => 1, + MULA => 0, + DIVA => 0, + others => <>); + begin + PMC_Periph.CKGR_PLLAR := CKGR_PLLAR; + end; -- Set PLLA to multiply by 14, count 16#3f#, divide by 1 (=> -- enable PLL); Main Clock is 12 MHz, => 168 Mhz - PMC_Periph.CKGR_PLLAR := (ONE => 1, - MULA => 13, -- multipler - 1 - PLLACOUNT => 16#3f#, - DIVA => 1, - others => <>); + declare + CKGR_PLLAR : constant CKGR_PLLAR_Register := + (ONE => 1, + MULA => 13, -- multipler - 1 + PLLACOUNT => 16#3f#, + DIVA => 1, + others => <>); + begin + PMC_Periph.CKGR_PLLAR := CKGR_PLLAR; + end; -- Loop until ready loop @@ -95,8 +109,9 @@ begin PMC_MCKR : PMC_MCKR_Register; begin -- Select Main Clock, PRES 0 (no prescaling) - PMC_Periph.PMC_MCKR := (CSS => Main_Clk, - others => <>); + PMC_MCKR := (CSS => MAIN_CLK, + others => <>); + PMC_Periph.PMC_MCKR := PMC_MCKR; -- Loop until ready loop exit when PMC_Periph.PMC_SR.MCKRDY /= 0; @@ -104,7 +119,7 @@ begin -- Set PRES 8 PMC_MCKR := PMC_Periph.PMC_MCKR; - PMC_MCKR.PRES := Clk_8; + PMC_MCKR.PRES := CLK_8; PMC_Periph.PMC_MCKR := PMC_MCKR; -- Loop until ready loop @@ -115,7 +130,7 @@ begin -- Main_Clock above, as recommended -- Set PRES PMC_MCKR := PMC_Periph.PMC_MCKR; - PMC_MCKR.PRES := Clk_2; + PMC_MCKR.PRES := CLK_2; PMC_Periph.PMC_MCKR := PMC_MCKR; -- Loop until ready loop @@ -124,7 +139,7 @@ begin -- Set CSS PMC_MCKR := PMC_Periph.PMC_MCKR; - PMC_MCKR.CSS := Plla_Clk; + PMC_MCKR.CSS := PLLA_CLK; PMC_Periph.PMC_MCKR := PMC_MCKR; -- Loop until ready loop diff --git a/arduino-due/adainclude/startup.adb b/arduino-due/adainclude/startup.adb index cce6eab..e8bb562 100644 --- a/arduino-due/adainclude/startup.adb +++ b/arduino-due/adainclude/startup.adb @@ -1,4 +1,4 @@ --- Copyright (C) 2016-2018 Free Software Foundation, Inc. +-- Copyright (C) 2016-2021 Free Software Foundation, Inc. -- -- This file is part of the Cortex GNAT RTS project. This file is -- free software; you can redistribute it and/or modify it under @@ -18,7 +18,6 @@ -- program; see the files COPYING3 and COPYING.RUNTIME respectively. -- If not, see . -with Ada.Interrupts.Names; with Interfaces; with System.Machine_Code; with System.Parameters; @@ -91,6 +90,8 @@ package body Startup is -- _edata: the first address after read/write data in SRAM -- _sbss: the start of BSS (to be initialized to zero) -- _ebss: the first address after BSS. + -- + -- _isr_vector is set up in interrupt_vectors.s. use System.Storage_Elements; @@ -154,28 +155,19 @@ package body Startup is System.FreeRTOS.Tasks.Start_Scheduler; end Program_Initialization; - ------------------------- - -- Interrupt vectors -- - ------------------------- + -------------------------- + -- Interrupt Handlers -- + -------------------------- - -- Vector Table, 11057 23-Mar-15, Chapter 10.6.4 + -- The interrupt vector is set up in interrupt_vectors.s, using + -- the handlers defined here. - procedure Dummy_Handler; - procedure Dummy_Handler is - IPSR : Interfaces.Unsigned_32 - with Volatile; -- don't want it to be optimised away - begin - System.Machine_Code.Asm - ("mrs %0, ipsr", - Outputs => Interfaces.Unsigned_32'Asm_Output ("=r", IPSR), - Volatile => True); - loop - null; - end loop; - end Dummy_Handler; + -- These handlers are all defined as Weak so that they can be + -- replaced by real handlers at link time. - -- The remaining handlers are all defined as Weak so that they can - -- be replaced by real handlers at link time. + -- If we defined the weak handlers in interrupt_vectors.s, the + -- references would be satisfied internally and so couldn't be + -- replaced by the real handler. procedure HardFault_Handler with Export, Convention => Ada, External_Name => "HardFault_Handler"; @@ -187,6 +179,7 @@ package body Startup is end loop; end HardFault_Handler; + -- Provided by FreeRTOS. procedure SVC_Handler with Export, Convention => Ada, External_Name => "SVC_Handler"; pragma Weak_External (SVC_Handler); @@ -197,6 +190,7 @@ package body Startup is end loop; end SVC_Handler; + -- Provided by FreeRTOS. procedure PendSV_Handler with Export, Convention => Ada, External_Name => "PendSV_Handler"; pragma Weak_External (PendSV_Handler); @@ -207,6 +201,7 @@ package body Startup is end loop; end PendSV_Handler; + -- Provided by FreeRTOS. procedure SysTick_Handler with Export, Convention => Ada, External_Name => "SysTick_Handler"; pragma Weak_External (SysTick_Handler); @@ -235,23 +230,4 @@ package body Startup is end loop; end IRQ_Handler; - type Handler is access procedure; - - Vectors : array (-14 .. Ada.Interrupts.Names.CAN1_IRQ) of Handler := - (-9 .. -6 | -4 .. -3 => null, -- reserved - -14 => Dummy_Handler'Access, -- NMI - -13 => HardFault_Handler'Access, -- HardFault - -12 => Dummy_Handler'Access, -- MemManagement - -11 => Dummy_Handler'Access, -- BusFault - -10 => Dummy_Handler'Access, -- UsageFault - -5 => SVC_Handler'Access, -- SVCall - -2 => PendSV_Handler'Access, -- PendSV - -1 => SysTick_Handler'Access, -- SysTick - others => IRQ_Handler'Access) - with - Export, - Convention => Ada, - External_Name => "isr_vector"; - pragma Linker_Section (Vectors, ".isr_vector"); - end Startup; diff --git a/arduino-due/adainclude/syscalls.c b/arduino-due/adainclude/syscalls.c deleted file mode 100644 index 2cd98ac..0000000 --- a/arduino-due/adainclude/syscalls.c +++ /dev/null @@ -1,139 +0,0 @@ -// Copyright Simon Wright -// -// This package is free software; you can redistribute it and/or -// modify it under terms of the GNU General Public License as -// published by the Free Software Foundation; either version 3, or (at -// your option) any later version. It is distributed in the hope that -// it will be useful, but WITHOUT ANY WARRANTY; without even the -// implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR -// PURPOSE. -// -// As a special exception under Section 7 of GPL version 3, you are -// granted additional permissions described in the GCC Runtime Library -// Exception, version 3.1, as published by the Free Software -// Foundation. -// -// You should have received a copy of the GNU General Public License -// and a copy of the GCC Runtime Library Exception along with this -// program; see the files COPYING3 and COPYING.RUNTIME respectively. -// If not, see . - -// System calls for newlib. -// -// _getpid() returns 1. -// _isatty() returns 0. -// All others return -1. -// _read() and _write() with a negative file descriptor set errno to EINVAL. -// _sbrk() sets errno to ENOMEM. -// In all other cases, errno is set to ENOTSUP (not supported). - -#include -#include -#include - -int _getpid(void) -{ - return 1; -} - -int _kill(int pid, int sig) -{ - errno = ENOTSUP; - return -1; -} - -void _exit (int status) -{ - _kill(status, -1); - while (1) {} -} - -int _read (int file, char *ptr, int len) -{ - errno = file < 0 ? EINVAL : ENOTSUP; - return -1; -} - -int _write(int file, char *ptr, int len) -{ - errno = file < 0 ? EINVAL : ENOTSUP; - return -1; -} - -caddr_t _sbrk(int incr) -{ - errno = ENOMEM; - return (caddr_t)-1; -} - -int _close(int file) -{ - errno = ENOTSUP; - return -1; -} - - -int _fstat(int file, struct stat *st) -{ - errno = ENOTSUP; - return -1; -} - -int _isatty(int file) -{ - return 0; -} - -int _lseek(int file, int ptr, int dir) -{ - errno = ENOTSUP; - return -1; -} - -int _open(char *path, int flags, ...) -{ - errno = ENOTSUP; - return -1; -} - -int _wait(int *status) -{ - errno = ENOTSUP; - return -1; -} - -int _unlink(char *name) -{ - errno = ENOTSUP; - return -1; -} - -int _times(struct tms *buf) -{ - errno = ENOTSUP; - return -1; -} - -int _stat(char *file, struct stat *st) -{ - errno = ENOTSUP; - return -1; -} - -int _link(char *old, char *new) -{ - errno = ENOTSUP; - return -1; -} - -int _fork(void) -{ - errno = ENOTSUP; - return -1; -} - -int _execve(char *name, char **argv, char **env) -{ - errno = ENOTSUP; - return -1; -} diff --git a/arduino-due/adalib/due-flash.ld b/arduino-due/adalib/due-flash.ld index ea8af20..b527a94 100644 --- a/arduino-due/adalib/due-flash.ld +++ b/arduino-due/adalib/due-flash.ld @@ -1,6 +1,7 @@ /* The MIT License * * Copyright (c) 2007, 2008, 2009, 2010 Dado Sutter and Bogdan Marinescu + * Copyright (c) 2012-2021 Simon Wright * * Permission is hereby granted, free of charge, to any person obtaining * a copy of this software and associated documentation files (the @@ -48,20 +49,12 @@ MEMORY SECTIONS { - .isr_vector : + .text : { . = ALIGN(4); - _isr_vector = .; - LONG(_estack) - LONG(program_initialization + 1) - KEEP(*(.isr_vector)) - } > flash + *(.isr_vector) + . = ALIGN(512); - .text 0x00080100: - { - . = ALIGN(4); - /* _text = .; */ - /* PROVIDE(stext = .);*/ *(.text) *(.text.*) *(.gnu.linkonce.t.*) @@ -147,7 +140,7 @@ SECTIONS } >sram end = .; - PROVIDE( _estack = 0x20088000); + PROVIDE(_estack = ORIGIN(sram) + LENGTH(sram)); /DISCARD/ : { *(.note.GNU-stack) *(.gnu_debuglink) *(.gnu.lto_*) } diff --git a/arduino-due/atsam3x8e/atsam3x8e-adc.ads b/arduino-due/atsam3x8e/atsam3x8e-adc.ads index f187671..a04b891 100644 --- a/arduino-due/atsam3x8e/atsam3x8e-adc.ads +++ b/arduino-due/atsam3x8e/atsam3x8e-adc.ads @@ -1,4 +1,3 @@ -pragma Ada_2012; pragma Style_Checks (Off); -- This spec has been automatically generated from ATSAM3X8E.svd @@ -39,168 +38,168 @@ package ATSAM3X8E.ADC is type MR_TRGEN_Field is (-- Hardware triggers are disabled. Starting a conversion is only possible by -- software. - Dis, + DIS, -- Hardware trigger selected by TRGSEL field is enabled. - En) + EN) with Size => 1; for MR_TRGEN_Field use - (Dis => 0, - En => 1); + (DIS => 0, + EN => 1); -- Trigger Selection type MR_TRGSEL_Field is (-- External : ADCTRG - Adc_Trig0, + ADC_TRIG0, -- TIOA Output of the Timer Counter Channel 0 - Adc_Trig1, + ADC_TRIG1, -- TIOA Output of the Timer Counter Channel 1 - Adc_Trig2, + ADC_TRIG2, -- TIOA Output of the Timer Counter Channel 2 - Adc_Trig3, + ADC_TRIG3, -- PWM Event Line 0 - Adc_Trig4, + ADC_TRIG4, -- PWM Event Line 0 - Adc_Trig5) + ADC_TRIG5) with Size => 3; for MR_TRGSEL_Field use - (Adc_Trig0 => 0, - Adc_Trig1 => 1, - Adc_Trig2 => 2, - Adc_Trig3 => 3, - Adc_Trig4 => 4, - Adc_Trig5 => 5); + (ADC_TRIG0 => 0, + ADC_TRIG1 => 1, + ADC_TRIG2 => 2, + ADC_TRIG3 => 3, + ADC_TRIG4 => 4, + ADC_TRIG5 => 5); -- Resolution type MR_LOWRES_Field is (-- 12-bit resolution - Bits_12, + BITS_12, -- 10-bit resolution - Bits_10) + BITS_10) with Size => 1; for MR_LOWRES_Field use - (Bits_12 => 0, - Bits_10 => 1); + (BITS_12 => 0, + BITS_10 => 1); -- Sleep Mode type MR_SLEEP_Field is (-- Normal Mode: The ADC Core and reference voltage circuitry are kept ON -- between conversions - Normal, + NORMAL, -- Sleep Mode: The ADC Core and reference voltage circuitry are OFF between -- conversions - Sleep) + SLEEP) with Size => 1; for MR_SLEEP_Field use - (Normal => 0, - Sleep => 1); + (NORMAL => 0, + SLEEP => 1); -- Fast Wake Up type MR_FWUP_Field is (-- Normal Sleep Mode: The sleep mode is defined by the SLEEP bit - Off, + OFF, -- Fast Wake Up Sleep Mode: The Voltage reference is ON between conversions -- and ADC Core is OFF - On) + ON) with Size => 1; for MR_FWUP_Field use - (Off => 0, - On => 1); + (OFF => 0, + ON => 1); -- Free Run Mode type MR_FREERUN_Field is (-- Normal Mode - Off, + OFF, -- Free Run Mode: Never wait for any trigger. - On) + ON) with Size => 1; for MR_FREERUN_Field use - (Off => 0, - On => 1); + (OFF => 0, + ON => 1); subtype ADC_MR_PRESCAL_Field is ATSAM3X8E.Byte; -- Start Up Time type MR_STARTUP_Field is (-- 0 periods of ADCClock - Sut0, + SUT0, -- 8 periods of ADCClock - Sut8, + SUT8, -- 16 periods of ADCClock - Sut16, + SUT16, -- 24 periods of ADCClock - Sut24, + SUT24, -- 64 periods of ADCClock - Sut64, + SUT64, -- 80 periods of ADCClock - Sut80, + SUT80, -- 96 periods of ADCClock - Sut96, + SUT96, -- 112 periods of ADCClock - Sut112, + SUT112, -- 512 periods of ADCClock - Sut512, + SUT512, -- 576 periods of ADCClock - Sut576, + SUT576, -- 640 periods of ADCClock - Sut640, + SUT640, -- 704 periods of ADCClock - Sut704, + SUT704, -- 768 periods of ADCClock - Sut768, + SUT768, -- 832 periods of ADCClock - Sut832, + SUT832, -- 896 periods of ADCClock - Sut896, + SUT896, -- 960 periods of ADCClock - Sut960) + SUT960) with Size => 4; for MR_STARTUP_Field use - (Sut0 => 0, - Sut8 => 1, - Sut16 => 2, - Sut24 => 3, - Sut64 => 4, - Sut80 => 5, - Sut96 => 6, - Sut112 => 7, - Sut512 => 8, - Sut576 => 9, - Sut640 => 10, - Sut704 => 11, - Sut768 => 12, - Sut832 => 13, - Sut896 => 14, - Sut960 => 15); + (SUT0 => 0, + SUT8 => 1, + SUT16 => 2, + SUT24 => 3, + SUT64 => 4, + SUT80 => 5, + SUT96 => 6, + SUT112 => 7, + SUT512 => 8, + SUT576 => 9, + SUT640 => 10, + SUT704 => 11, + SUT768 => 12, + SUT832 => 13, + SUT896 => 14, + SUT960 => 15); -- Analog Settling Time type MR_SETTLING_Field is (-- 3 periods of ADCClock - Ast3, + AST3, -- 5 periods of ADCClock - Ast5, + AST5, -- 9 periods of ADCClock - Ast9, + AST9, -- 17 periods of ADCClock - Ast17) + AST17) with Size => 2; for MR_SETTLING_Field use - (Ast3 => 0, - Ast5 => 1, - Ast9 => 2, - Ast17 => 3); + (AST3 => 0, + AST5 => 1, + AST9 => 2, + AST17 => 3); -- Analog Change type MR_ANACH_Field is (-- No analog change on channel switching: DIFF0, GAIN0 and OFF0 are used for -- all channels - None, + NONE, -- Allows different analog settings for each channel. See ADC_CGR and ADC_COR -- Registers - Allowed) + ALLOWED) with Size => 1; for MR_ANACH_Field use - (None => 0, - Allowed => 1); + (NONE => 0, + ALLOWED => 1); subtype ADC_MR_TRACKTIM_Field is ATSAM3X8E.UInt4; subtype ADC_MR_TRANSFER_Field is ATSAM3X8E.UInt2; @@ -208,39 +207,39 @@ package ATSAM3X8E.ADC is -- Use Sequence Enable type MR_USEQ_Field is (-- Normal Mode: The controller converts channels in a simple numeric order. - Num_Order, + NUM_ORDER, -- User Sequence Mode: The sequence respects what is defined in ADC_SEQR1 and -- ADC_SEQR2 registers. - Reg_Order) + REG_ORDER) with Size => 1; for MR_USEQ_Field use - (Num_Order => 0, - Reg_Order => 1); + (NUM_ORDER => 0, + REG_ORDER => 1); -- Mode Register type ADC_MR_Register is record -- Trigger Enable - TRGEN : MR_TRGEN_Field := ATSAM3X8E.ADC.Dis; + TRGEN : MR_TRGEN_Field := ATSAM3X8E.ADC.DIS; -- Trigger Selection - TRGSEL : MR_TRGSEL_Field := ATSAM3X8E.ADC.Adc_Trig0; + TRGSEL : MR_TRGSEL_Field := ATSAM3X8E.ADC.ADC_TRIG0; -- Resolution - LOWRES : MR_LOWRES_Field := ATSAM3X8E.ADC.Bits_12; + LOWRES : MR_LOWRES_Field := ATSAM3X8E.ADC.BITS_12; -- Sleep Mode - SLEEP : MR_SLEEP_Field := ATSAM3X8E.ADC.Normal; + SLEEP : MR_SLEEP_Field := ATSAM3X8E.ADC.NORMAL; -- Fast Wake Up - FWUP : MR_FWUP_Field := ATSAM3X8E.ADC.Off; + FWUP : MR_FWUP_Field := ATSAM3X8E.ADC.OFF; -- Free Run Mode - FREERUN : MR_FREERUN_Field := ATSAM3X8E.ADC.Off; + FREERUN : MR_FREERUN_Field := ATSAM3X8E.ADC.OFF; -- Prescaler Rate Selection PRESCAL : ADC_MR_PRESCAL_Field := 16#0#; -- Start Up Time - STARTUP : MR_STARTUP_Field := ATSAM3X8E.ADC.Sut0; + STARTUP : MR_STARTUP_Field := ATSAM3X8E.ADC.SUT0; -- Analog Settling Time - SETTLING : MR_SETTLING_Field := ATSAM3X8E.ADC.Ast3; + SETTLING : MR_SETTLING_Field := ATSAM3X8E.ADC.AST3; -- unspecified Reserved_22_22 : ATSAM3X8E.Bit := 16#0#; -- Analog Change - ANACH : MR_ANACH_Field := ATSAM3X8E.ADC.None; + ANACH : MR_ANACH_Field := ATSAM3X8E.ADC.NONE; -- Tracking Time TRACKTIM : ADC_MR_TRACKTIM_Field := 16#0#; -- Transfer Period @@ -248,7 +247,7 @@ package ATSAM3X8E.ADC is -- unspecified Reserved_30_30 : ATSAM3X8E.Bit := 16#0#; -- Use Sequence Enable - USEQ : MR_USEQ_Field := ATSAM3X8E.ADC.Num_Order; + USEQ : MR_USEQ_Field := ATSAM3X8E.ADC.NUM_ORDER; end record with Object_Size => 32, Bit_Order => System.Low_Order_First; @@ -776,20 +775,20 @@ package ATSAM3X8E.ADC is type EMR_CMPMODE_Field is (-- Generates an event when the converted data is lower than the low threshold -- of the window. - Low, + LOW, -- Generates an event when the converted data is higher than the high -- threshold of the window. - High, + HIGH, -- Generates an event when the converted data is in the comparison window. - In_k, + IN_k, -- Generates an event when the converted data is out of the comparison window. - Out_k) + OUT_k) with Size => 2; for EMR_CMPMODE_Field use - (Low => 0, - High => 1, - In_k => 2, - Out_k => 3); + (LOW => 0, + HIGH => 1, + IN_k => 2, + OUT_k => 3); subtype ADC_EMR_CMPSEL_Field is ATSAM3X8E.UInt4; subtype ADC_EMR_CMPALL_Field is ATSAM3X8E.Bit; @@ -799,7 +798,7 @@ package ATSAM3X8E.ADC is -- Extended Mode Register type ADC_EMR_Register is record -- Comparison Mode - CMPMODE : EMR_CMPMODE_Field := ATSAM3X8E.ADC.Low; + CMPMODE : EMR_CMPMODE_Field := ATSAM3X8E.ADC.LOW; -- unspecified Reserved_2_3 : ATSAM3X8E.UInt2 := 16#0#; -- Comparison Selected Channel diff --git a/arduino-due/atsam3x8e/atsam3x8e-can.ads b/arduino-due/atsam3x8e/atsam3x8e-can.ads index 88bd233..0ec1460 100644 --- a/arduino-due/atsam3x8e/atsam3x8e-can.ads +++ b/arduino-due/atsam3x8e/atsam3x8e-can.ads @@ -1,4 +1,3 @@ -pragma Ada_2012; pragma Style_Checks (Off); -- This spec has been automatically generated from ATSAM3X8E.svd @@ -26,20 +25,20 @@ package ATSAM3X8E.CAN is -- Reception Synchronization Stage (not readable) type MR_RXSYNC_Field is (-- Rx Signal with Double Synchro Stages (2 Positive Edges) - Double_Pp, + DOUBLE_PP, -- Rx Signal with Double Synchro Stages (One Positive Edge and One Negative -- Edge) - Double_Pn, + DOUBLE_PN, -- Rx Signal with Single Synchro Stage (Positive Edge) - Single_P, + SINGLE_P, -- Rx Signal with No Synchro Stage - None) + NONE) with Size => 3; for MR_RXSYNC_Field use - (Double_Pp => 0, - Double_Pn => 1, - Single_P => 2, - None => 3); + (DOUBLE_PP => 0, + DOUBLE_PN => 1, + SINGLE_P => 2, + NONE => 3); -- Mode Register type CAN0_MR_Register is record @@ -62,7 +61,7 @@ package ATSAM3X8E.CAN is -- unspecified Reserved_8_23 : ATSAM3X8E.UInt16 := 16#0#; -- Reception Synchronization Stage (not readable) - RXSYNC : MR_RXSYNC_Field := ATSAM3X8E.CAN.Double_Pp; + RXSYNC : MR_RXSYNC_Field := ATSAM3X8E.CAN.DOUBLE_PP; -- unspecified Reserved_27_31 : ATSAM3X8E.UInt5 := 16#0#; end record @@ -488,14 +487,14 @@ package ATSAM3X8E.CAN is -- Sampling Mode type BR_SMP_Field is (-- The incoming bit stream is sampled once at sample point. - Once, + ONCE, -- The incoming bit stream is sampled three times with a period of a MCK clock -- period, centered on sample point. - Three) + THREE) with Size => 1; for BR_SMP_Field use - (Once => 0, - Three => 1); + (ONCE => 0, + THREE => 1); -- Baudrate Register type CAN0_BR_Register is record @@ -520,7 +519,7 @@ package ATSAM3X8E.CAN is -- unspecified Reserved_23_23 : ATSAM3X8E.Bit := 16#0#; -- Sampling Mode - SMP : BR_SMP_Field := ATSAM3X8E.CAN.Once; + SMP : BR_SMP_Field := ATSAM3X8E.CAN.ONCE; -- unspecified Reserved_25_31 : ATSAM3X8E.UInt7 := 16#0#; end record @@ -733,31 +732,31 @@ package ATSAM3X8E.CAN is type MMR0_MOT_Field is (-- Mailbox is disabled. This prevents receiving or transmitting any messages -- with this mailbox. - Mb_Disabled, + MB_DISABLED, -- Reception Mailbox. Mailbox is configured for reception. If a message is -- received while the mailbox data register is full, it is discarded. - Mb_Rx, + MB_RX, -- Reception mailbox with overwrite. Mailbox is configured for reception. If a -- message is received while the mailbox is full, it overwrites the previous -- message. - Mb_Rx_Overwrite, + MB_RX_OVERWRITE, -- Transmit mailbox. Mailbox is configured for transmission. - Mb_Tx, + MB_TX, -- Consumer Mailbox. Mailbox is configured in reception but behaves as a -- Transmit Mailbox, i.e., it sends a remote frame and waits for an answer. - Mb_Consumer, + MB_CONSUMER, -- Producer Mailbox. Mailbox is configured in transmission but also behaves -- like a reception mailbox, i.e., it waits to receive a Remote Frame before -- sending its contents. - Mb_Producer) + MB_PRODUCER) with Size => 3; for MMR0_MOT_Field use - (Mb_Disabled => 0, - Mb_Rx => 1, - Mb_Rx_Overwrite => 2, - Mb_Tx => 3, - Mb_Consumer => 4, - Mb_Producer => 5); + (MB_DISABLED => 0, + MB_RX => 1, + MB_RX_OVERWRITE => 2, + MB_TX => 3, + MB_CONSUMER => 4, + MB_PRODUCER => 5); -- Mailbox Mode Register (MB = 0) type MMR_Register is record @@ -768,7 +767,7 @@ package ATSAM3X8E.CAN is -- unspecified Reserved_20_23 : ATSAM3X8E.UInt4 := 16#0#; -- Mailbox Object Type - MOT : MMR0_MOT_Field := ATSAM3X8E.CAN.Mb_Disabled; + MOT : MMR0_MOT_Field := ATSAM3X8E.CAN.MB_DISABLED; -- unspecified Reserved_27_31 : ATSAM3X8E.UInt5 := 16#0#; end record diff --git a/arduino-due/atsam3x8e/atsam3x8e-chipid.ads b/arduino-due/atsam3x8e/atsam3x8e-chipid.ads index 749c8e8..5eca3dc 100644 --- a/arduino-due/atsam3x8e/atsam3x8e-chipid.ads +++ b/arduino-due/atsam3x8e/atsam3x8e-chipid.ads @@ -1,4 +1,3 @@ -pragma Ada_2012; pragma Style_Checks (Off); -- This spec has been automatically generated from ATSAM3X8E.svd @@ -20,33 +19,33 @@ package ATSAM3X8E.CHIPID is -- Embedded Processor type CIDR_EPROC_Field is (-- ARM946ES - Arm946Es, + ARM946ES, -- ARM7TDMI - Arm7Tdmi, + ARM7TDMI, -- Cortex-M3 - Cm3, + CM3, -- ARM920T - Arm920T, + ARM920T, -- ARM926EJS - Arm926Ejs, + ARM926EJS, -- Cortex-A5 - Ca5, + CA5, -- Cortex-M4 - Cm4) + CM4) with Size => 3; for CIDR_EPROC_Field use - (Arm946Es => 1, - Arm7Tdmi => 2, - Cm3 => 3, - Arm920T => 4, - Arm926Ejs => 5, - Ca5 => 6, - Cm4 => 7); + (ARM946ES => 1, + ARM7TDMI => 2, + CM3 => 3, + ARM920T => 4, + ARM926EJS => 5, + CA5 => 6, + CM4 => 7); -- Nonvolatile Program Memory Size type CIDR_NVPSIZ_Field is (-- None - None, + NONE, -- 8K bytes Val_8K, -- 16K bytes @@ -67,7 +66,7 @@ package ATSAM3X8E.CHIPID is Val_2048K) with Size => 4; for CIDR_NVPSIZ_Field use - (None => 0, + (NONE => 0, Val_8K => 1, Val_16K => 2, Val_32K => 3, @@ -158,132 +157,132 @@ package ATSAM3X8E.CHIPID is -- Architecture Identifier type CIDR_ARCH_Field is (-- AT91SAM9xx Series - At91Sam9XX, + AT91SAM9xx, -- AT91SAM9XExx Series - At91Sam9Xexx, + AT91SAM9XExx, -- AT91x34 Series - At91X34, + AT91x34, -- CAP7 Series - Cap7, + CAP7, -- CAP9 Series - Cap9, + CAP9, -- CAP11 Series - Cap11, + CAP11, -- AT91x40 Series - At91X40, + AT91x40, -- AT91x42 Series - At91X42, + AT91x42, -- AT91x55 Series - At91X55, + AT91x55, -- AT91SAM7Axx Series - At91Sam7Axx, + AT91SAM7Axx, -- AT91SAM7AQxx Series - At91Sam7Aqxx, + AT91SAM7AQxx, -- AT91x63 Series - At91X63, + AT91x63, -- AT91SAM7Sxx Series - At91Sam7Sxx, + AT91SAM7Sxx, -- AT91SAM7XCxx Series - At91Sam7Xcxx, + AT91SAM7XCxx, -- AT91SAM7SExx Series - At91Sam7Sexx, + AT91SAM7SExx, -- AT91SAM7Lxx Series - At91Sam7Lxx, + AT91SAM7Lxx, -- AT91SAM7Xxx Series - At91Sam7Xxx, + AT91SAM7Xxx, -- AT91SAM7SLxx Series - At91Sam7Slxx, + AT91SAM7SLxx, -- SAM3UxC Series (100-pin version) - Sam3Uxc, + SAM3UxC, -- SAM3UxE Series (144-pin version) - Sam3Uxe, + SAM3UxE, -- SAM3AxC/SAM4AxC Series (100-pin version) - Sam3Axc_Sam4Axc, + SAM3AxC_SAM4AxC, -- SAM3XxC/SAM4XxC Series (100-pin version) - Sam3Xxc_Sam4Xxc, + SAM3XxC_SAM4XxC, -- SAM3XxE/SAM4XxE Series (144-pin version) - Sam3Xxe_Sam4Xxe, + SAM3XxE_SAM4XxE, -- SAM3XxG/SAM4XxG Series (208/217-pin version) - Sam3Xxg_Sam4Xxg, + SAM3XxG_SAM4XxG, -- SAM3SxA/SAM4SxA Series (48-pin version) - Sam3Sxa_Sam4Sxa, + SAM3SxA_SAM4SxA, -- SAM3SxB/SAM4SxB Series (64-pin version) - Sam3Sxb_Sam4Sxb, + SAM3SxB_SAM4SxB, -- SAM3SxC/SAM4SxC Series (100-pin version) - Sam3Sxc_Sam4Sxc, + SAM3SxC_SAM4SxC, -- AT91x92 Series - At91X92, + AT91x92, -- SAM3NxA Series (48-pin version) - Sam3Nxa, + SAM3NxA, -- SAM3NxB Series (64-pin version) - Sam3Nxb, + SAM3NxB, -- SAM3NxC Series (100-pin version) - Sam3Nxc, + SAM3NxC, -- SAM3SDxB Series (64-pin version) - Sam3Sdxb, + SAM3SDxB, -- SAM3SDxC Series (100-pin version) - Sam3Sdxc, + SAM3SDxC, -- SAM5A - Sam5A, + SAM5A, -- AT75Cxx Series - At75Cxx) + AT75Cxx) with Size => 8; for CIDR_ARCH_Field use - (At91Sam9XX => 25, - At91Sam9Xexx => 41, - At91X34 => 52, - Cap7 => 55, - Cap9 => 57, - Cap11 => 59, - At91X40 => 64, - At91X42 => 66, - At91X55 => 85, - At91Sam7Axx => 96, - At91Sam7Aqxx => 97, - At91X63 => 99, - At91Sam7Sxx => 112, - At91Sam7Xcxx => 113, - At91Sam7Sexx => 114, - At91Sam7Lxx => 115, - At91Sam7Xxx => 117, - At91Sam7Slxx => 118, - Sam3Uxc => 128, - Sam3Uxe => 129, - Sam3Axc_Sam4Axc => 131, - Sam3Xxc_Sam4Xxc => 132, - Sam3Xxe_Sam4Xxe => 133, - Sam3Xxg_Sam4Xxg => 134, - Sam3Sxa_Sam4Sxa => 136, - Sam3Sxb_Sam4Sxb => 137, - Sam3Sxc_Sam4Sxc => 138, - At91X92 => 146, - Sam3Nxa => 147, - Sam3Nxb => 148, - Sam3Nxc => 149, - Sam3Sdxb => 153, - Sam3Sdxc => 154, - Sam5A => 165, - At75Cxx => 240); + (AT91SAM9xx => 25, + AT91SAM9XExx => 41, + AT91x34 => 52, + CAP7 => 55, + CAP9 => 57, + CAP11 => 59, + AT91x40 => 64, + AT91x42 => 66, + AT91x55 => 85, + AT91SAM7Axx => 96, + AT91SAM7AQxx => 97, + AT91x63 => 99, + AT91SAM7Sxx => 112, + AT91SAM7XCxx => 113, + AT91SAM7SExx => 114, + AT91SAM7Lxx => 115, + AT91SAM7Xxx => 117, + AT91SAM7SLxx => 118, + SAM3UxC => 128, + SAM3UxE => 129, + SAM3AxC_SAM4AxC => 131, + SAM3XxC_SAM4XxC => 132, + SAM3XxE_SAM4XxE => 133, + SAM3XxG_SAM4XxG => 134, + SAM3SxA_SAM4SxA => 136, + SAM3SxB_SAM4SxB => 137, + SAM3SxC_SAM4SxC => 138, + AT91x92 => 146, + SAM3NxA => 147, + SAM3NxB => 148, + SAM3NxC => 149, + SAM3SDxB => 153, + SAM3SDxC => 154, + SAM5A => 165, + AT75Cxx => 240); -- Nonvolatile Program Memory Type type CIDR_NVPTYP_Field is (-- ROM - Rom, + ROM, -- ROMless or on-chip Flash - Romless, + ROMLESS, -- Embedded Flash Memory - Flash, + FLASH, -- ROM and Embedded Flash MemoryNVPSIZ is ROM size NVPSIZ2 is Flash size - Rom_Flash, + ROM_FLASH, -- SRAM emulating ROM - Sram) + SRAM) with Size => 3; for CIDR_NVPTYP_Field use - (Rom => 0, - Romless => 1, - Flash => 2, - Rom_Flash => 3, - Sram => 4); + (ROM => 0, + ROMLESS => 1, + FLASH => 2, + ROM_FLASH => 3, + SRAM => 4); subtype CHIPID_CIDR_EXT_Field is ATSAM3X8E.Bit; diff --git a/arduino-due/atsam3x8e/atsam3x8e-dacc.ads b/arduino-due/atsam3x8e/atsam3x8e-dacc.ads index bf905f3..e96b061 100644 --- a/arduino-due/atsam3x8e/atsam3x8e-dacc.ads +++ b/arduino-due/atsam3x8e/atsam3x8e-dacc.ads @@ -1,4 +1,3 @@ -pragma Ada_2012; pragma Style_Checks (Off); -- This spec has been automatically generated from ATSAM3X8E.svd @@ -34,26 +33,26 @@ package ATSAM3X8E.DACC is -- Trigger Enable type MR_TRGEN_Field is (-- External trigger mode disabled. DACC in free running mode. - Dis, + DIS, -- External trigger mode enabled. - En) + EN) with Size => 1; for MR_TRGEN_Field use - (Dis => 0, - En => 1); + (DIS => 0, + EN => 1); subtype DACC_MR_TRGSEL_Field is ATSAM3X8E.UInt3; -- Word Transfer type MR_WORD_Field is (-- Half-Word transfer - Half, + HALF, -- Word Transfer - Word) + WORD) with Size => 1; for MR_WORD_Field use - (Half => 0, - Word => 1); + (HALF => 0, + WORD => 1); subtype DACC_MR_SLEEP_Field is ATSAM3X8E.Bit; subtype DACC_MR_FASTWKUP_Field is ATSAM3X8E.Bit; @@ -62,36 +61,36 @@ package ATSAM3X8E.DACC is -- User Channel Selection type MR_USER_SEL_Field is (-- Channel 0 - Channel0, + CHANNEL0, -- Channel 1 - Channel1) + CHANNEL1) with Size => 2; for MR_USER_SEL_Field use - (Channel0 => 0, - Channel1 => 1); + (CHANNEL0 => 0, + CHANNEL1 => 1); -- Tag Selection Mode type MR_TAG_Field is (-- Tag selection mode disabled. Using USER_SEL to select the channel for the -- conversion. - Dis, + DIS, -- Tag selection mode enabled - En) + EN) with Size => 1; for MR_TAG_Field use - (Dis => 0, - En => 1); + (DIS => 0, + EN => 1); -- Max Speed Mode type MR_MAXS_Field is (-- Normal Mode - Normal, + NORMAL, -- Max Speed Mode enabled - Maximum) + MAXIMUM) with Size => 1; for MR_MAXS_Field use - (Normal => 0, - Maximum => 1); + (NORMAL => 0, + MAXIMUM => 1); -- Startup Time Selection type MR_STARTUP_Field is @@ -197,11 +196,11 @@ package ATSAM3X8E.DACC is -- Mode Register type DACC_MR_Register is record -- Trigger Enable - TRGEN : MR_TRGEN_Field := ATSAM3X8E.DACC.Dis; + TRGEN : MR_TRGEN_Field := ATSAM3X8E.DACC.DIS; -- Trigger Selection TRGSEL : DACC_MR_TRGSEL_Field := 16#0#; -- Word Transfer - WORD : MR_WORD_Field := ATSAM3X8E.DACC.Half; + WORD : MR_WORD_Field := ATSAM3X8E.DACC.HALF; -- Sleep Mode SLEEP : DACC_MR_SLEEP_Field := 16#0#; -- Fast Wake up Mode @@ -211,13 +210,13 @@ package ATSAM3X8E.DACC is -- Refresh Period REFRESH : DACC_MR_REFRESH_Field := 16#0#; -- User Channel Selection - USER_SEL : MR_USER_SEL_Field := ATSAM3X8E.DACC.Channel0; + USER_SEL : MR_USER_SEL_Field := ATSAM3X8E.DACC.CHANNEL0; -- unspecified Reserved_18_19 : ATSAM3X8E.UInt2 := 16#0#; -- Tag Selection Mode - TAG : MR_TAG_Field := ATSAM3X8E.DACC.Dis; + TAG : MR_TAG_Field := ATSAM3X8E.DACC.DIS; -- Max Speed Mode - MAXS : MR_MAXS_Field := ATSAM3X8E.DACC.Normal; + MAXS : MR_MAXS_Field := ATSAM3X8E.DACC.NORMAL; -- unspecified Reserved_22_23 : ATSAM3X8E.UInt2 := 16#0#; -- Startup Time Selection diff --git a/arduino-due/atsam3x8e/atsam3x8e-dmac.ads b/arduino-due/atsam3x8e/atsam3x8e-dmac.ads index f89733b..63c4bee 100644 --- a/arduino-due/atsam3x8e/atsam3x8e-dmac.ads +++ b/arduino-due/atsam3x8e/atsam3x8e-dmac.ads @@ -1,4 +1,3 @@ -pragma Ada_2012; pragma Style_Checks (Off); -- This spec has been automatically generated from ATSAM3X8E.svd @@ -18,20 +17,20 @@ package ATSAM3X8E.DMAC is -- Arbiter Configuration type GCFG_ARB_CFG_Field is (-- Fixed priority arbiter. - Fixed, + FIXED, -- Modified round robin arbiter. - Round_Robin) + ROUND_ROBIN) with Size => 1; for GCFG_ARB_CFG_Field use - (Fixed => 0, - Round_Robin => 1); + (FIXED => 0, + ROUND_ROBIN => 1); -- DMAC Global Configuration Register type DMAC_GCFG_Register is record -- unspecified Reserved_0_3 : ATSAM3X8E.UInt4 := 16#0#; -- Arbiter Configuration - ARB_CFG : GCFG_ARB_CFG_Field := ATSAM3X8E.DMAC.Round_Robin; + ARB_CFG : GCFG_ARB_CFG_Field := ATSAM3X8E.DMAC.ROUND_ROBIN; -- unspecified Reserved_5_31 : ATSAM3X8E.UInt27 := 16#0#; end record @@ -1040,88 +1039,88 @@ package ATSAM3X8E.DMAC is -- Source Chunk Transfer Size. type CTRLA0_SCSIZE_Field is (-- 1 data transferred - Chk_1, + CHK_1, -- 4 data transferred - Chk_4, + CHK_4, -- 8 data transferred - Chk_8, + CHK_8, -- 16 data transferred - Chk_16, + CHK_16, -- 32 data transferred - Chk_32, + CHK_32, -- 64 data transferred - Chk_64, + CHK_64, -- 128 data transferred - Chk_128, + CHK_128, -- 256 data transferred - Chk_256) + CHK_256) with Size => 3; for CTRLA0_SCSIZE_Field use - (Chk_1 => 0, - Chk_4 => 1, - Chk_8 => 2, - Chk_16 => 3, - Chk_32 => 4, - Chk_64 => 5, - Chk_128 => 6, - Chk_256 => 7); + (CHK_1 => 0, + CHK_4 => 1, + CHK_8 => 2, + CHK_16 => 3, + CHK_32 => 4, + CHK_64 => 5, + CHK_128 => 6, + CHK_256 => 7); -- Destination Chunk Transfer Size type CTRLA0_DCSIZE_Field is (-- 1 data transferred - Chk_1, + CHK_1, -- 4 data transferred - Chk_4, + CHK_4, -- 8 data transferred - Chk_8, + CHK_8, -- 16 data transferred - Chk_16, + CHK_16, -- 32 data transferred - Chk_32, + CHK_32, -- 64 data transferred - Chk_64, + CHK_64, -- 128 data transferred - Chk_128, + CHK_128, -- 256 data transferred - Chk_256) + CHK_256) with Size => 3; for CTRLA0_DCSIZE_Field use - (Chk_1 => 0, - Chk_4 => 1, - Chk_8 => 2, - Chk_16 => 3, - Chk_32 => 4, - Chk_64 => 5, - Chk_128 => 6, - Chk_256 => 7); + (CHK_1 => 0, + CHK_4 => 1, + CHK_8 => 2, + CHK_16 => 3, + CHK_32 => 4, + CHK_64 => 5, + CHK_128 => 6, + CHK_256 => 7); -- Transfer Width for the Source type CTRLA0_SRC_WIDTH_Field is (-- the transfer size is set to 8-bit width - Byte, + BYTE, -- the transfer size is set to 16-bit width - Half_Word, + HALF_WORD, -- the transfer size is set to 32-bit width - Word) + WORD) with Size => 2; for CTRLA0_SRC_WIDTH_Field use - (Byte => 0, - Half_Word => 1, - Word => 2); + (BYTE => 0, + HALF_WORD => 1, + WORD => 2); -- Transfer Width for the Destination type CTRLA0_DST_WIDTH_Field is (-- the transfer size is set to 8-bit width - Byte, + BYTE, -- the transfer size is set to 16-bit width - Half_Word, + HALF_WORD, -- the transfer size is set to 32-bit width - Word) + WORD) with Size => 2; for CTRLA0_DST_WIDTH_Field use - (Byte => 0, - Half_Word => 1, - Word => 2); + (BYTE => 0, + HALF_WORD => 1, + WORD => 2); subtype CTRLA_DONE_Field is ATSAM3X8E.Bit; @@ -1130,19 +1129,19 @@ package ATSAM3X8E.DMAC is -- Buffer Transfer Size BTSIZE : CTRLA_BTSIZE_Field := 16#0#; -- Source Chunk Transfer Size. - SCSIZE : CTRLA0_SCSIZE_Field := ATSAM3X8E.DMAC.Chk_1; + SCSIZE : CTRLA0_SCSIZE_Field := ATSAM3X8E.DMAC.CHK_1; -- unspecified Reserved_19_19 : ATSAM3X8E.Bit := 16#0#; -- Destination Chunk Transfer Size - DCSIZE : CTRLA0_DCSIZE_Field := ATSAM3X8E.DMAC.Chk_1; + DCSIZE : CTRLA0_DCSIZE_Field := ATSAM3X8E.DMAC.CHK_1; -- unspecified Reserved_23_23 : ATSAM3X8E.Bit := 16#0#; -- Transfer Width for the Source - SRC_WIDTH : CTRLA0_SRC_WIDTH_Field := ATSAM3X8E.DMAC.Byte; + SRC_WIDTH : CTRLA0_SRC_WIDTH_Field := ATSAM3X8E.DMAC.BYTE; -- unspecified Reserved_26_27 : ATSAM3X8E.UInt2 := 16#0#; -- Transfer Width for the Destination - DST_WIDTH : CTRLA0_DST_WIDTH_Field := ATSAM3X8E.DMAC.Byte; + DST_WIDTH : CTRLA0_DST_WIDTH_Field := ATSAM3X8E.DMAC.BYTE; -- unspecified Reserved_30_30 : ATSAM3X8E.Bit := 16#0#; DONE : CTRLA_DONE_Field := 16#0#; @@ -1165,70 +1164,70 @@ package ATSAM3X8E.DMAC is -- Source Address Descriptor type CTRLB0_SRC_DSCR_Field is (-- Source address is updated when the descriptor is fetched from the memory. - Fetch_From_Mem, + FETCH_FROM_MEM, -- Buffer Descriptor Fetch operation is disabled for the source. - Fetch_Disable) + FETCH_DISABLE) with Size => 1; for CTRLB0_SRC_DSCR_Field use - (Fetch_From_Mem => 0, - Fetch_Disable => 1); + (FETCH_FROM_MEM => 0, + FETCH_DISABLE => 1); -- Destination Address Descriptor type CTRLB0_DST_DSCR_Field is (-- Destination address is updated when the descriptor is fetched from the -- memory. - Fetch_From_Mem, + FETCH_FROM_MEM, -- Buffer Descriptor Fetch operation is disabled for the destination. - Fetch_Disable) + FETCH_DISABLE) with Size => 1; for CTRLB0_DST_DSCR_Field use - (Fetch_From_Mem => 0, - Fetch_Disable => 1); + (FETCH_FROM_MEM => 0, + FETCH_DISABLE => 1); -- Flow Control type CTRLB0_FC_Field is (-- Memory-to-Memory Transfer DMAC is flow controller - Mem2Mem_Dma_Fc, + MEM2MEM_DMA_FC, -- Memory-to-Peripheral Transfer DMAC is flow controller - Mem2Per_Dma_Fc, + MEM2PER_DMA_FC, -- Peripheral-to-Memory Transfer DMAC is flow controller - Per2Mem_Dma_Fc, + PER2MEM_DMA_FC, -- Peripheral-to-Peripheral Transfer DMAC is flow controller - Per2Per_Dma_Fc) + PER2PER_DMA_FC) with Size => 3; for CTRLB0_FC_Field use - (Mem2Mem_Dma_Fc => 0, - Mem2Per_Dma_Fc => 1, - Per2Mem_Dma_Fc => 2, - Per2Per_Dma_Fc => 3); + (MEM2MEM_DMA_FC => 0, + MEM2PER_DMA_FC => 1, + PER2MEM_DMA_FC => 2, + PER2PER_DMA_FC => 3); -- Incrementing, Decrementing or Fixed Address for the Source type CTRLB0_SRC_INCR_Field is (-- The source address is incremented - Incrementing, + INCREMENTING, -- The source address is decremented - Decrementing, + DECREMENTING, -- The source address remains unchanged - Fixed) + FIXED) with Size => 2; for CTRLB0_SRC_INCR_Field use - (Incrementing => 0, - Decrementing => 1, - Fixed => 2); + (INCREMENTING => 0, + DECREMENTING => 1, + FIXED => 2); -- Incrementing, Decrementing or Fixed Address for the Destination type CTRLB0_DST_INCR_Field is (-- The destination address is incremented - Incrementing, + INCREMENTING, -- The destination address is decremented - Decrementing, + DECREMENTING, -- The destination address remains unchanged - Fixed) + FIXED) with Size => 2; for CTRLB0_DST_INCR_Field use - (Incrementing => 0, - Decrementing => 1, - Fixed => 2); + (INCREMENTING => 0, + DECREMENTING => 1, + FIXED => 2); subtype CTRLB_IEN_Field is ATSAM3X8E.Bit; @@ -1237,19 +1236,19 @@ package ATSAM3X8E.DMAC is -- unspecified Reserved_0_15 : ATSAM3X8E.UInt16 := 16#0#; -- Source Address Descriptor - SRC_DSCR : CTRLB0_SRC_DSCR_Field := ATSAM3X8E.DMAC.Fetch_From_Mem; + SRC_DSCR : CTRLB0_SRC_DSCR_Field := ATSAM3X8E.DMAC.FETCH_FROM_MEM; -- unspecified Reserved_17_19 : ATSAM3X8E.UInt3 := 16#0#; -- Destination Address Descriptor - DST_DSCR : CTRLB0_DST_DSCR_Field := ATSAM3X8E.DMAC.Fetch_From_Mem; + DST_DSCR : CTRLB0_DST_DSCR_Field := ATSAM3X8E.DMAC.FETCH_FROM_MEM; -- Flow Control - FC : CTRLB0_FC_Field := ATSAM3X8E.DMAC.Mem2Mem_Dma_Fc; + FC : CTRLB0_FC_Field := ATSAM3X8E.DMAC.MEM2MEM_DMA_FC; -- Incrementing, Decrementing or Fixed Address for the Source - SRC_INCR : CTRLB0_SRC_INCR_Field := ATSAM3X8E.DMAC.Incrementing; + SRC_INCR : CTRLB0_SRC_INCR_Field := ATSAM3X8E.DMAC.INCREMENTING; -- unspecified Reserved_26_27 : ATSAM3X8E.UInt2 := 16#0#; -- Incrementing, Decrementing or Fixed Address for the Destination - DST_INCR : CTRLB0_DST_INCR_Field := ATSAM3X8E.DMAC.Incrementing; + DST_INCR : CTRLB0_DST_INCR_Field := ATSAM3X8E.DMAC.INCREMENTING; IEN : CTRLB_IEN_Field := 16#0#; -- unspecified Reserved_31_31 : ATSAM3X8E.Bit := 16#0#; @@ -1275,69 +1274,69 @@ package ATSAM3X8E.DMAC is -- Software or Hardware Selection for the Source type CFG0_SRC_H2SEL_Field is (-- Software handshaking interface is used to trigger a transfer request. - Sw, + SW, -- Hardware handshaking interface is used to trigger a transfer request. - Hw) + HW) with Size => 1; for CFG0_SRC_H2SEL_Field use - (Sw => 0, - Hw => 1); + (SW => 0, + HW => 1); -- Software or Hardware Selection for the Destination type CFG0_DST_H2SEL_Field is (-- Software handshaking interface is used to trigger a transfer request. - Sw, + SW, -- Hardware handshaking interface is used to trigger a transfer request. - Hw) + HW) with Size => 1; for CFG0_DST_H2SEL_Field use - (Sw => 0, - Hw => 1); + (SW => 0, + HW => 1); -- Stop On Done type CFG0_SOD_Field is (-- STOP ON DONE disabled, the descriptor fetch operation ignores DONE Field of -- CTRLA register. - Disable, + DISABLE, -- STOP ON DONE activated, the DMAC module is automatically disabled if DONE -- FIELD is set to 1. - Enable) + ENABLE) with Size => 1; for CFG0_SOD_Field use - (Disable => 0, - Enable => 1); + (DISABLE => 0, + ENABLE => 1); -- Interface Lock type CFG0_LOCK_IF_Field is (-- Interface Lock capability is disabled - Disable, + DISABLE, -- Interface Lock capability is enabled - Enable) + ENABLE) with Size => 1; for CFG0_LOCK_IF_Field use - (Disable => 0, - Enable => 1); + (DISABLE => 0, + ENABLE => 1); -- Bus Lock type CFG0_LOCK_B_Field is (-- AHB Bus Locking capability is disabled. - Disable) + DISABLE) with Size => 1; for CFG0_LOCK_B_Field use - (Disable => 0); + (DISABLE => 0); -- Master Interface Arbiter Lock type CFG0_LOCK_IF_L_Field is (-- The Master Interface Arbiter is locked by the channel x for a chunk -- transfer. - Chunk, + CHUNK, -- The Master Interface Arbiter is locked by the channel x for a buffer -- transfer. - Buffer) + BUFFER) with Size => 1; for CFG0_LOCK_IF_L_Field use - (Chunk => 0, - Buffer => 1); + (CHUNK => 0, + BUFFER => 1); subtype CFG_AHB_PROT_Field is ATSAM3X8E.UInt3; @@ -1345,18 +1344,18 @@ package ATSAM3X8E.DMAC is type CFG0_FIFOCFG_Field is (-- The largest defined length AHB burst is performed on the destination AHB -- interface. - Alap_Cfg, + ALAP_CFG, -- When half FIFO size is available/filled, a source/destination request is -- serviced. - Half_Cfg, + HALF_CFG, -- When there is enough space/data available to perform a single AHB access, -- then the request is serviced. - Asap_Cfg) + ASAP_CFG) with Size => 2; for CFG0_FIFOCFG_Field use - (Alap_Cfg => 0, - Half_Cfg => 1, - Asap_Cfg => 2); + (ALAP_CFG => 0, + HALF_CFG => 1, + ASAP_CFG => 2); -- DMAC Channel Configuration Register (ch_num = 0) type CFG_Register is record @@ -1367,23 +1366,23 @@ package ATSAM3X8E.DMAC is -- unspecified Reserved_8_8 : ATSAM3X8E.Bit := 16#0#; -- Software or Hardware Selection for the Source - SRC_H2SEL : CFG0_SRC_H2SEL_Field := ATSAM3X8E.DMAC.Sw; + SRC_H2SEL : CFG0_SRC_H2SEL_Field := ATSAM3X8E.DMAC.SW; -- unspecified Reserved_10_12 : ATSAM3X8E.UInt3 := 16#0#; -- Software or Hardware Selection for the Destination - DST_H2SEL : CFG0_DST_H2SEL_Field := ATSAM3X8E.DMAC.Sw; + DST_H2SEL : CFG0_DST_H2SEL_Field := ATSAM3X8E.DMAC.SW; -- unspecified Reserved_14_15 : ATSAM3X8E.UInt2 := 16#0#; -- Stop On Done - SOD : CFG0_SOD_Field := ATSAM3X8E.DMAC.Disable; + SOD : CFG0_SOD_Field := ATSAM3X8E.DMAC.DISABLE; -- unspecified Reserved_17_19 : ATSAM3X8E.UInt3 := 16#0#; -- Interface Lock - LOCK_IF : CFG0_LOCK_IF_Field := ATSAM3X8E.DMAC.Disable; + LOCK_IF : CFG0_LOCK_IF_Field := ATSAM3X8E.DMAC.DISABLE; -- Bus Lock - LOCK_B : CFG0_LOCK_B_Field := ATSAM3X8E.DMAC.Disable; + LOCK_B : CFG0_LOCK_B_Field := ATSAM3X8E.DMAC.DISABLE; -- Master Interface Arbiter Lock - LOCK_IF_L : CFG0_LOCK_IF_L_Field := ATSAM3X8E.DMAC.Chunk; + LOCK_IF_L : CFG0_LOCK_IF_L_Field := ATSAM3X8E.DMAC.CHUNK; -- unspecified Reserved_23_23 : ATSAM3X8E.Bit := 16#0#; -- AHB Protection @@ -1391,7 +1390,7 @@ package ATSAM3X8E.DMAC is -- unspecified Reserved_27_27 : ATSAM3X8E.Bit := 16#0#; -- FIFO Configuration - FIFOCFG : CFG0_FIFOCFG_Field := ATSAM3X8E.DMAC.Alap_Cfg; + FIFOCFG : CFG0_FIFOCFG_Field := ATSAM3X8E.DMAC.ALAP_CFG; -- unspecified Reserved_30_31 : ATSAM3X8E.UInt2 := 16#0#; end record diff --git a/arduino-due/atsam3x8e/atsam3x8e-ebi.ads b/arduino-due/atsam3x8e/atsam3x8e-ebi.ads index 3012413..d21cd6e 100644 --- a/arduino-due/atsam3x8e/atsam3x8e-ebi.ads +++ b/arduino-due/atsam3x8e/atsam3x8e-ebi.ads @@ -1,4 +1,3 @@ -pragma Ada_2012; pragma Style_Checks (Off); -- This spec has been automatically generated from ATSAM3X8E.svd @@ -16,19 +15,19 @@ package ATSAM3X8E.EBI is type CFG_PAGESIZE_Field is (-- Main area 512 Bytes + Spare area 16 Bytes = 528 Bytes - Ps512_16, + PS512_16, -- Main area 1024 Bytes + Spare area 32 Bytes = 1056 Bytes - Ps1024_32, + PS1024_32, -- Main area 2048 Bytes + Spare area 64 Bytes = 2112 Bytes - Ps2048_64, + PS2048_64, -- Main area 4096 Bytes + Spare area 128 Bytes = 4224 Bytes - Ps4096_128) + PS4096_128) with Size => 2; for CFG_PAGESIZE_Field use - (Ps512_16 => 0, - Ps1024_32 => 1, - Ps2048_64 => 2, - Ps4096_128 => 3); + (PS512_16 => 0, + PS1024_32 => 1, + PS2048_64 => 2, + PS4096_128 => 3); subtype SMC_CFG_WSPARE_Field is ATSAM3X8E.Bit; subtype SMC_CFG_RSPARE_Field is ATSAM3X8E.Bit; @@ -67,7 +66,7 @@ package ATSAM3X8E.EBI is -- SMC NFC Configuration Register type SMC_CFG_Register is record - PAGESIZE : CFG_PAGESIZE_Field := ATSAM3X8E.EBI.Ps512_16; + PAGESIZE : CFG_PAGESIZE_Field := ATSAM3X8E.EBI.PS512_16; -- unspecified Reserved_2_7 : ATSAM3X8E.UInt6 := 16#0#; -- Write Spare Area @@ -430,25 +429,25 @@ package ATSAM3X8E.EBI is -- ECC Page Size type ECC_MD_ECC_PAGESIZE_Field is (-- Main area 512 Bytes + Spare area 16 Bytes = 528 Bytes - Ps512_16, + PS512_16, -- Main area 1024 Bytes + Spare area 32 Bytes = 1056 Bytes - Ps1024_32, + PS1024_32, -- Main area 2048 Bytes + Spare area 64 Bytes = 2112 Bytes - Ps2048_64, + PS2048_64, -- Main area 4096 Bytes + Spare area 128 Bytes = 4224 Bytes - Ps4096_128) + PS4096_128) with Size => 2; for ECC_MD_ECC_PAGESIZE_Field use - (Ps512_16 => 0, - Ps1024_32 => 1, - Ps2048_64 => 2, - Ps4096_128 => 3); + (PS512_16 => 0, + PS1024_32 => 1, + PS2048_64 => 2, + PS4096_128 => 3); -- Type of Correction type ECC_MD_TYPCORREC_Field is (-- 1 bit correction for a page of 512/1024/2048/4096 Bytes (for 8 or 16-bit -- NAND Flash) - Cpage, + CPAGE, -- 1 bit correction for 256 Bytes of data for a page of 512/2048/4096 bytes -- (for 8-bit NAND Flash only) C256B, @@ -457,18 +456,18 @@ package ATSAM3X8E.EBI is C512B) with Size => 2; for ECC_MD_TYPCORREC_Field use - (Cpage => 0, + (CPAGE => 0, C256B => 1, C512B => 2); -- SMC ECC Mode Register type SMC_ECC_MD_Register is record -- ECC Page Size - ECC_PAGESIZE : ECC_MD_ECC_PAGESIZE_Field := ATSAM3X8E.EBI.Ps512_16; + ECC_PAGESIZE : ECC_MD_ECC_PAGESIZE_Field := ATSAM3X8E.EBI.PS512_16; -- unspecified Reserved_2_3 : ATSAM3X8E.UInt2 := 16#0#; -- Type of Correction - TYPCORREC : ECC_MD_TYPCORREC_Field := ATSAM3X8E.EBI.Cpage; + TYPCORREC : ECC_MD_TYPCORREC_Field := ATSAM3X8E.EBI.CPAGE; -- unspecified Reserved_6_31 : ATSAM3X8E.UInt26 := 16#0#; end record @@ -1255,62 +1254,62 @@ package ATSAM3X8E.EBI is type MODE0_READ_MODE_Field is (-- The Read operation is controlled by the NCS signal. - Ncs_Ctrl, + NCS_CTRL, -- The Read operation is controlled by the NRD signal. - Nrd_Ctrl) + NRD_CTRL) with Size => 1; for MODE0_READ_MODE_Field use - (Ncs_Ctrl => 0, - Nrd_Ctrl => 1); + (NCS_CTRL => 0, + NRD_CTRL => 1); type MODE0_WRITE_MODE_Field is (-- The Write operation is controller by the NCS signal. - Ncs_Ctrl, + NCS_CTRL, -- The Write operation is controlled by the NWE signal. - Nwe_Ctrl) + NWE_CTRL) with Size => 1; for MODE0_WRITE_MODE_Field use - (Ncs_Ctrl => 0, - Nwe_Ctrl => 1); + (NCS_CTRL => 0, + NWE_CTRL => 1); -- NWAIT Mode type MODE0_EXNW_MODE_Field is (-- Disabled - Disabled, + DISABLED, -- Frozen Mode - Frozen, + FROZEN, -- Ready Mode - Ready) + READY) with Size => 2; for MODE0_EXNW_MODE_Field use - (Disabled => 0, - Frozen => 2, - Ready => 3); + (DISABLED => 0, + FROZEN => 2, + READY => 3); subtype MODE_BAT_Field is ATSAM3X8E.Bit; -- Data Bus Width type MODE0_DBW_Field is (-- 8-bit bus - Bit_8, + BIT_8, -- 16-bit bus - Bit_16) + BIT_16) with Size => 1; for MODE0_DBW_Field use - (Bit_8 => 0, - Bit_16 => 1); + (BIT_8 => 0, + BIT_16 => 1); subtype MODE_TDF_CYCLES_Field is ATSAM3X8E.UInt4; subtype MODE_TDF_MODE_Field is ATSAM3X8E.Bit; -- SMC Mode Register (CS_number = 0) type MODE_Register is record - READ_MODE : MODE0_READ_MODE_Field := ATSAM3X8E.EBI.Nrd_Ctrl; - WRITE_MODE : MODE0_WRITE_MODE_Field := ATSAM3X8E.EBI.Nwe_Ctrl; + READ_MODE : MODE0_READ_MODE_Field := ATSAM3X8E.EBI.NRD_CTRL; + WRITE_MODE : MODE0_WRITE_MODE_Field := ATSAM3X8E.EBI.NWE_CTRL; -- unspecified Reserved_2_3 : ATSAM3X8E.UInt2 := 16#0#; -- NWAIT Mode - EXNW_MODE : MODE0_EXNW_MODE_Field := ATSAM3X8E.EBI.Disabled; + EXNW_MODE : MODE0_EXNW_MODE_Field := ATSAM3X8E.EBI.DISABLED; -- unspecified Reserved_6_7 : ATSAM3X8E.UInt2 := 16#0#; -- Byte Access Type @@ -1318,7 +1317,7 @@ package ATSAM3X8E.EBI is -- unspecified Reserved_9_11 : ATSAM3X8E.UInt3 := 16#0#; -- Data Bus Width - DBW : MODE0_DBW_Field := ATSAM3X8E.EBI.Bit_8; + DBW : MODE0_DBW_Field := ATSAM3X8E.EBI.BIT_8; -- unspecified Reserved_13_15 : ATSAM3X8E.UInt3 := 16#0#; -- Data Float Time @@ -1414,8 +1413,8 @@ package ATSAM3X8E.EBI is type SMC_Disc is (Default, - W9Bit, - W8Bit); + W9BIT, + W8BIT); -- Static Memory Controller type SMC_Peripheral @@ -1640,14 +1639,14 @@ package ATSAM3X8E.EBI is -- SMC ECC parity 7 Register ECC_PR7 : aliased ECC_PR_Register; pragma Volatile_Full_Access (ECC_PR7); - when W9Bit => + when W9BIT => -- SMC ECC Parity 0 Register ECC_PR0_W9BIT : aliased SMC_ECC_PR0_W9BIT_Register; pragma Volatile_Full_Access (ECC_PR0_W9BIT); -- SMC ECC parity 1 Register ECC_PR1_W9BIT : aliased SMC_ECC_PR1_W9BIT_Register; pragma Volatile_Full_Access (ECC_PR1_W9BIT); - when W8Bit => + when W8BIT => -- SMC ECC Parity 0 Register ECC_PR0_W8BIT : aliased SMC_ECC_PR0_W8BIT_Register; pragma Volatile_Full_Access (ECC_PR0_W8BIT); diff --git a/arduino-due/atsam3x8e/atsam3x8e-efc.ads b/arduino-due/atsam3x8e/atsam3x8e-efc.ads index 677e4e9..1cf5af4 100644 --- a/arduino-due/atsam3x8e/atsam3x8e-efc.ads +++ b/arduino-due/atsam3x8e/atsam3x8e-efc.ads @@ -1,4 +1,3 @@ -pragma Ada_2012; pragma Style_Checks (Off); -- This spec has been automatically generated from ATSAM3X8E.svd @@ -54,76 +53,76 @@ package ATSAM3X8E.EFC is -- Flash Command type FCR_FCMD_Field is (-- Get Flash Descriptor - Getd, + GETD, -- Write page - Wp, + WP, -- Write page and lock - Wpl, + WPL, -- Erase page and write page - Ewp, + EWP, -- Erase page and write page then lock - Ewpl, + EWPL, -- Erase all - Ea, + EA, -- Set Lock Bit - Slb, + SLB, -- Clear Lock Bit - Clb, + CLB, -- Get Lock Bit - Glb, + GLB, -- Set GPNVM Bit - Sgpb, + SGPB, -- Clear GPNVM Bit - Cgpb, + CGPB, -- Get GPNVM Bit - Ggpb, + GGPB, -- Start Read Unique Identifier - Stui, + STUI, -- Stop Read Unique Identifier - Spui, + SPUI, -- Get CALIB Bit - Gcalb) + GCALB) with Size => 8; for FCR_FCMD_Field use - (Getd => 0, - Wp => 1, - Wpl => 2, - Ewp => 3, - Ewpl => 4, - Ea => 5, - Slb => 8, - Clb => 9, - Glb => 10, - Sgpb => 11, - Cgpb => 12, - Ggpb => 13, - Stui => 14, - Spui => 15, - Gcalb => 16); + (GETD => 0, + WP => 1, + WPL => 2, + EWP => 3, + EWPL => 4, + EA => 5, + SLB => 8, + CLB => 9, + GLB => 10, + SGPB => 11, + CGPB => 12, + GGPB => 13, + STUI => 14, + SPUI => 15, + GCALB => 16); subtype EFC0_FCR_FARG_Field is ATSAM3X8E.UInt16; -- Flash Writing Protection Key type FCR_FKEY_Field is (-- Reset value for the field - Fcr_Fkey_Field_Reset, + FCR_FKEY_Field_Reset, -- The 0x5A value enables the command defined by the bits of the register. If -- the field is written with a different value, the write is not performed and -- no action is started. - Passwd) + PASSWD) with Size => 8; for FCR_FKEY_Field use - (Fcr_Fkey_Field_Reset => 0, - Passwd => 90); + (FCR_FKEY_Field_Reset => 0, + PASSWD => 90); -- EEFC Flash Command Register type EFC0_FCR_Register is record -- Write-only. Flash Command - FCMD : FCR_FCMD_Field := ATSAM3X8E.EFC.Getd; + FCMD : FCR_FCMD_Field := ATSAM3X8E.EFC.GETD; -- Write-only. Flash Command Argument FARG : EFC0_FCR_FARG_Field := 16#0#; -- Write-only. Flash Writing Protection Key - FKEY : FCR_FKEY_Field := Fcr_Fkey_Field_Reset; + FKEY : FCR_FKEY_Field := FCR_FKEY_Field_Reset; end record with Object_Size => 32, Bit_Order => System.Low_Order_First; diff --git a/arduino-due/atsam3x8e/atsam3x8e-emac.ads b/arduino-due/atsam3x8e/atsam3x8e-emac.ads index c3c695c..4aea5d8 100644 --- a/arduino-due/atsam3x8e/atsam3x8e-emac.ads +++ b/arduino-due/atsam3x8e/atsam3x8e-emac.ads @@ -1,4 +1,3 @@ -pragma Ada_2012; pragma Style_Checks (Off); -- This spec has been automatically generated from ATSAM3X8E.svd @@ -83,19 +82,19 @@ package ATSAM3X8E.EMAC is -- MDC clock divider type NCFGR_CLK_Field is (-- MCK divided by 8 (MCK up to 20 MHz). - Mck_8, + MCK_8, -- MCK divided by 16 (MCK up to 40 MHz). - Mck_16, + MCK_16, -- MCK divided by 32 (MCK up to 80 MHz). - Mck_32, + MCK_32, -- MCK divided by 64 (MCK up to 160 MHz). - Mck_64) + MCK_64) with Size => 2; for NCFGR_CLK_Field use - (Mck_8 => 0, - Mck_16 => 1, - Mck_32 => 2, - Mck_64 => 3); + (MCK_8 => 0, + MCK_16 => 1, + MCK_32 => 2, + MCK_64 => 3); subtype EMAC_NCFGR_RTY_Field is ATSAM3X8E.Bit; subtype EMAC_NCFGR_PAE_Field is ATSAM3X8E.Bit; @@ -103,19 +102,19 @@ package ATSAM3X8E.EMAC is -- Receive Buffer Offset type NCFGR_RBOF_Field is (-- No offset from start of receive buffer. - Offset_0, + OFFSET_0, -- One-byte offset from start of receive buffer. - Offset_1, + OFFSET_1, -- Two-byte offset from start of receive buffer. - Offset_2, + OFFSET_2, -- Three-byte offset from start of receive buffer. - Offset_3) + OFFSET_3) with Size => 2; for NCFGR_RBOF_Field use - (Offset_0 => 0, - Offset_1 => 1, - Offset_2 => 2, - Offset_3 => 3); + (OFFSET_0 => 0, + OFFSET_1 => 1, + OFFSET_2 => 2, + OFFSET_3 => 3); subtype EMAC_NCFGR_RLCE_Field is ATSAM3X8E.Bit; subtype EMAC_NCFGR_DRFCS_Field is ATSAM3X8E.Bit; @@ -145,13 +144,13 @@ package ATSAM3X8E.EMAC is -- unspecified Reserved_9_9 : ATSAM3X8E.Bit := 16#0#; -- MDC clock divider - CLK : NCFGR_CLK_Field := ATSAM3X8E.EMAC.Mck_32; + CLK : NCFGR_CLK_Field := ATSAM3X8E.EMAC.MCK_32; -- Retry test RTY : EMAC_NCFGR_RTY_Field := 16#0#; -- Pause Enable PAE : EMAC_NCFGR_PAE_Field := 16#0#; -- Receive Buffer Offset - RBOF : NCFGR_RBOF_Field := ATSAM3X8E.EMAC.Offset_0; + RBOF : NCFGR_RBOF_Field := ATSAM3X8E.EMAC.OFFSET_0; -- Receive Length field Checking Enable RLCE : EMAC_NCFGR_RLCE_Field := 16#0#; -- Discard Receive FCS diff --git a/arduino-due/atsam3x8e/atsam3x8e-hsmci.ads b/arduino-due/atsam3x8e/atsam3x8e-hsmci.ads index d5d3fb5..1755895 100644 --- a/arduino-due/atsam3x8e/atsam3x8e-hsmci.ads +++ b/arduino-due/atsam3x8e/atsam3x8e-hsmci.ads @@ -1,4 +1,3 @@ -pragma Ada_2012; pragma Style_Checks (Off); -- This spec has been automatically generated from ATSAM3X8E.svd @@ -135,19 +134,19 @@ package ATSAM3X8E.HSMCI is -- SDCard/SDIO Slot type SDCR_SDCSEL_Field is (-- Slot A is selected. - Slota, + SLOTA, -- SDCARD/SDIO Slot B selected - Slotb, + SLOTB, -- - - Slotc, + SLOTC, -- - - Slotd) + SLOTD) with Size => 2; for SDCR_SDCSEL_Field use - (Slota => 0, - Slotb => 1, - Slotc => 2, - Slotd => 3); + (SLOTA => 0, + SLOTB => 1, + SLOTC => 2, + SLOTD => 3); -- SDCard/SDIO Bus Width type SDCR_SDCBUS_Field is @@ -166,7 +165,7 @@ package ATSAM3X8E.HSMCI is -- SD/SDIO Card Register type HSMCI_SDCR_Register is record -- SDCard/SDIO Slot - SDCSEL : SDCR_SDCSEL_Field := ATSAM3X8E.HSMCI.Slota; + SDCSEL : SDCR_SDCSEL_Field := ATSAM3X8E.HSMCI.SLOTA; -- unspecified Reserved_2_5 : ATSAM3X8E.UInt4 := 16#0#; -- SDCard/SDIO Bus Width @@ -188,63 +187,63 @@ package ATSAM3X8E.HSMCI is -- Response Type type CMDR_RSPTYP_Field is (-- No response. - Noresp, + NORESP, -- 48-bit response. - Val_48_Bit, + Val_48_BIT, -- 136-bit response. - Val_136_Bit, + Val_136_BIT, -- R1b response type R1B) with Size => 2; for CMDR_RSPTYP_Field use - (Noresp => 0, - Val_48_Bit => 1, - Val_136_Bit => 2, + (NORESP => 0, + Val_48_BIT => 1, + Val_136_BIT => 2, R1B => 3); -- Special Command type CMDR_SPCMD_Field is (-- Not a special CMD. - Std, + STD, -- Initialization CMD: 74 clock cycles for initialization sequence. - Init, + INIT, -- Synchronized CMD: Wait for the end of the current data block transfer -- before sending the pending command. - Sync, + SYNC, -- CE-ATA Completion Signal disable Command. The host cancels the ability for -- the device to return a command completion signal on the command line. - Ce_Ata, + CE_ATA, -- Interrupt command: Corresponds to the Interrupt Mode (CMD40). - It_Cmd, + IT_CMD, -- Interrupt response: Corresponds to the Interrupt Mode (CMD40). - It_Resp, + IT_RESP, -- Boot Operation Request. Start a boot operation mode, the host processor can -- read boot data from the MMC device directly. - Bor, + BOR, -- End Boot Operation. This command allows the host processor to terminate the -- boot operation mode. - Ebo) + EBO) with Size => 3; for CMDR_SPCMD_Field use - (Std => 0, - Init => 1, - Sync => 2, - Ce_Ata => 3, - It_Cmd => 4, - It_Resp => 5, - Bor => 6, - Ebo => 7); + (STD => 0, + INIT => 1, + SYNC => 2, + CE_ATA => 3, + IT_CMD => 4, + IT_RESP => 5, + BOR => 6, + EBO => 7); -- Open Drain Command type CMDR_OPDCMD_Field is (-- Push pull command. - Pushpull, + PUSHPULL, -- Open drain command. - Opendrain) + OPENDRAIN) with Size => 1; for CMDR_OPDCMD_Field use - (Pushpull => 0, - Opendrain => 1); + (PUSHPULL => 0, + OPENDRAIN => 1); -- Max Latency for Command to Response type CMDR_MAXLAT_Field is @@ -260,73 +259,73 @@ package ATSAM3X8E.HSMCI is -- Transfer Command type CMDR_TRCMD_Field is (-- No data transfer - No_Data, + NO_DATA, -- Start data transfer - Start_Data, + START_DATA, -- Stop data transfer - Stop_Data) + STOP_DATA) with Size => 2; for CMDR_TRCMD_Field use - (No_Data => 0, - Start_Data => 1, - Stop_Data => 2); + (NO_DATA => 0, + START_DATA => 1, + STOP_DATA => 2); -- Transfer Direction type CMDR_TRDIR_Field is (-- Write. - Write, + WRITE, -- Read. - Read) + READ) with Size => 1; for CMDR_TRDIR_Field use - (Write => 0, - Read => 1); + (WRITE => 0, + READ => 1); -- Transfer Type type CMDR_TRTYP_Field is (-- MMC/SDCard Single Block - Single, + SINGLE, -- MMC/SDCard Multiple Block - Multiple, + MULTIPLE, -- MMC Stream - Stream, + STREAM, -- SDIO Byte - Byte, + BYTE, -- SDIO Block - Block) + BLOCK) with Size => 3; for CMDR_TRTYP_Field use - (Single => 0, - Multiple => 1, - Stream => 2, - Byte => 4, - Block => 5); + (SINGLE => 0, + MULTIPLE => 1, + STREAM => 2, + BYTE => 4, + BLOCK => 5); -- SDIO Special Command type CMDR_IOSPCMD_Field is (-- Not an SDIO Special Command - Std, + STD, -- SDIO Suspend Command - Suspend, + SUSPEND, -- SDIO Resume Command - Resume) + RESUME) with Size => 2; for CMDR_IOSPCMD_Field use - (Std => 0, - Suspend => 1, - Resume => 2); + (STD => 0, + SUSPEND => 1, + RESUME => 2); -- ATA with Command Completion Signal type CMDR_ATACS_Field is (-- Normal operation mode. - Normal, + NORMAL, -- This bit indicates that a completion signal is expected within a programmed -- amount of time (HSMCI_CSTOR). - Completion) + COMPLETION) with Size => 1; for CMDR_ATACS_Field use - (Normal => 0, - Completion => 1); + (NORMAL => 0, + COMPLETION => 1); subtype HSMCI_CMDR_BOOT_ACK_Field is ATSAM3X8E.Bit; @@ -335,27 +334,27 @@ package ATSAM3X8E.HSMCI is -- Write-only. Command Number CMDNB : HSMCI_CMDR_CMDNB_Field := 16#0#; -- Write-only. Response Type - RSPTYP : CMDR_RSPTYP_Field := ATSAM3X8E.HSMCI.Noresp; + RSPTYP : CMDR_RSPTYP_Field := ATSAM3X8E.HSMCI.NORESP; -- Write-only. Special Command - SPCMD : CMDR_SPCMD_Field := ATSAM3X8E.HSMCI.Std; + SPCMD : CMDR_SPCMD_Field := ATSAM3X8E.HSMCI.STD; -- Write-only. Open Drain Command - OPDCMD : CMDR_OPDCMD_Field := ATSAM3X8E.HSMCI.Pushpull; + OPDCMD : CMDR_OPDCMD_Field := ATSAM3X8E.HSMCI.PUSHPULL; -- Write-only. Max Latency for Command to Response MAXLAT : CMDR_MAXLAT_Field := ATSAM3X8E.HSMCI.Val_5; -- unspecified Reserved_13_15 : ATSAM3X8E.UInt3 := 16#0#; -- Write-only. Transfer Command - TRCMD : CMDR_TRCMD_Field := ATSAM3X8E.HSMCI.No_Data; + TRCMD : CMDR_TRCMD_Field := ATSAM3X8E.HSMCI.NO_DATA; -- Write-only. Transfer Direction - TRDIR : CMDR_TRDIR_Field := ATSAM3X8E.HSMCI.Write; + TRDIR : CMDR_TRDIR_Field := ATSAM3X8E.HSMCI.WRITE; -- Write-only. Transfer Type - TRTYP : CMDR_TRTYP_Field := ATSAM3X8E.HSMCI.Single; + TRTYP : CMDR_TRTYP_Field := ATSAM3X8E.HSMCI.SINGLE; -- unspecified Reserved_22_23 : ATSAM3X8E.UInt2 := 16#0#; -- Write-only. SDIO Special Command - IOSPCMD : CMDR_IOSPCMD_Field := ATSAM3X8E.HSMCI.Std; + IOSPCMD : CMDR_IOSPCMD_Field := ATSAM3X8E.HSMCI.STD; -- Write-only. ATA with Command Completion Signal - ATACS : CMDR_ATACS_Field := ATSAM3X8E.HSMCI.Normal; + ATACS : CMDR_ATACS_Field := ATSAM3X8E.HSMCI.NORMAL; -- Write-only. Boot Operation Acknowledge. BOOT_ACK : HSMCI_CMDR_BOOT_ACK_Field := 16#0#; -- unspecified @@ -384,25 +383,25 @@ package ATSAM3X8E.HSMCI is type BLKR_BCNT_Field is (-- MMC/SDCARD Multiple BlockFrom 1 to 65635: Value 0 corresponds to an -- infinite block transfer. - Multiple, + MULTIPLE, -- SDIO ByteFrom 1 to 512 bytes: Value 0 corresponds to a 512-byte -- transfer.Values from 0x200 to 0xFFFF are forbidden. - Byte, + BYTE, -- SDIO BlockFrom 1 to 511 blocks: Value 0 corresponds to an infinite block -- transfer.Values from 0x200 to 0xFFFF are forbidden. - Block) + BLOCK) with Size => 16; for BLKR_BCNT_Field use - (Multiple => 0, - Byte => 4, - Block => 5); + (MULTIPLE => 0, + BYTE => 4, + BLOCK => 5); subtype HSMCI_BLKR_BLKLEN_Field is ATSAM3X8E.UInt16; -- Block Register type HSMCI_BLKR_Register is record -- MMC/SDIO Block Count - SDIO Byte Count - BCNT : BLKR_BCNT_Field := ATSAM3X8E.HSMCI.Multiple; + BCNT : BLKR_BCNT_Field := ATSAM3X8E.HSMCI.MULTIPLE; -- Data Block Length BLKLEN : HSMCI_BLKR_BLKLEN_Field := 16#0#; end record @@ -1059,22 +1058,22 @@ package ATSAM3X8E.HSMCI is type WPSR_WP_VS_Field is (-- No Write Protection Violation occurred since the last read of this register -- (WP_SR) - None, + NONE, -- Write Protection detected unauthorized attempt to write a control register -- had occurred (since the last read.) - Write, + WRITE, -- Software reset had been performed while Write Protection was enabled (since -- the last read). - Reset, + RESET, -- Both Write Protection violation and software reset with Write Protection -- enabled have occurred since the last read. - Both) + BOTH) with Size => 4; for WPSR_WP_VS_Field use - (None => 0, - Write => 1, - Reset => 2, - Both => 3); + (NONE => 0, + WRITE => 1, + RESET => 2, + BOTH => 3); subtype HSMCI_WPSR_WP_VSRC_Field is ATSAM3X8E.UInt16; diff --git a/arduino-due/atsam3x8e/atsam3x8e-matrix.ads b/arduino-due/atsam3x8e/atsam3x8e-matrix.ads index 5ac8a1d..3fef7db 100644 --- a/arduino-due/atsam3x8e/atsam3x8e-matrix.ads +++ b/arduino-due/atsam3x8e/atsam3x8e-matrix.ads @@ -1,4 +1,3 @@ -pragma Ada_2012; pragma Style_Checks (Off); -- This spec has been automatically generated from ATSAM3X8E.svd diff --git a/arduino-due/atsam3x8e/atsam3x8e-pio.ads b/arduino-due/atsam3x8e/atsam3x8e-pio.ads index 49eb9b4..713288e 100644 --- a/arduino-due/atsam3x8e/atsam3x8e-pio.ads +++ b/arduino-due/atsam3x8e/atsam3x8e-pio.ads @@ -1,4 +1,3 @@ -pragma Ada_2012; pragma Style_Checks (Off); -- This spec has been automatically generated from ATSAM3X8E.svd diff --git a/arduino-due/atsam3x8e/atsam3x8e-pmc.ads b/arduino-due/atsam3x8e/atsam3x8e-pmc.ads index c4670c8..ca26253 100644 --- a/arduino-due/atsam3x8e/atsam3x8e-pmc.ads +++ b/arduino-due/atsam3x8e/atsam3x8e-pmc.ads @@ -1,4 +1,3 @@ -pragma Ada_2012; pragma Style_Checks (Off); -- This spec has been automatically generated from ATSAM3X8E.svd @@ -326,16 +325,16 @@ package ATSAM3X8E.PMC is -- Main On-Chip RC Oscillator Frequency Selection type CKGR_MOR_MOSCRCF_Field is (-- The Fast RC Oscillator Frequency is at 4 MHz (default) - Val_4_Mhz, + Val_4_MHz, -- The Fast RC Oscillator Frequency is at 8 MHz - Val_8_Mhz, + Val_8_MHz, -- The Fast RC Oscillator Frequency is at 12 MHz - Val_12_Mhz) + Val_12_MHz) with Size => 3; for CKGR_MOR_MOSCRCF_Field use - (Val_4_Mhz => 0, - Val_8_Mhz => 1, - Val_12_Mhz => 2); + (Val_4_MHz => 0, + Val_8_MHz => 1, + Val_12_MHz => 2); subtype CKGR_MOR_MOSCXTST_Field is ATSAM3X8E.Byte; subtype CKGR_MOR_KEY_Field is ATSAM3X8E.Byte; @@ -353,7 +352,7 @@ package ATSAM3X8E.PMC is -- Main On-Chip RC Oscillator Enable MOSCRCEN : CKGR_MOR_MOSCRCEN_Field := 16#0#; -- Main On-Chip RC Oscillator Frequency Selection - MOSCRCF : CKGR_MOR_MOSCRCF_Field := ATSAM3X8E.PMC.Val_4_Mhz; + MOSCRCF : CKGR_MOR_MOSCRCF_Field := ATSAM3X8E.PMC.Val_4_MHz; -- unspecified Reserved_7_7 : ATSAM3X8E.Bit := 16#0#; -- Main Crystal Oscillator Start-up Time @@ -440,48 +439,48 @@ package ATSAM3X8E.PMC is -- Master Clock Source Selection type PMC_MCKR_CSS_Field is (-- Slow Clock is selected - Slow_Clk, + SLOW_CLK, -- Main Clock is selected - Main_Clk, + MAIN_CLK, -- PLLA Clock is selected - Plla_Clk, + PLLA_CLK, -- UPLL Clock is selected - Upll_Clk) + UPLL_CLK) with Size => 2; for PMC_MCKR_CSS_Field use - (Slow_Clk => 0, - Main_Clk => 1, - Plla_Clk => 2, - Upll_Clk => 3); + (SLOW_CLK => 0, + MAIN_CLK => 1, + PLLA_CLK => 2, + UPLL_CLK => 3); -- Processor Clock Prescaler type PMC_MCKR_PRES_Field is (-- Selected clock - Clk_1, + CLK_1, -- Selected clock divided by 2 - Clk_2, + CLK_2, -- Selected clock divided by 4 - Clk_4, + CLK_4, -- Selected clock divided by 8 - Clk_8, + CLK_8, -- Selected clock divided by 16 - Clk_16, + CLK_16, -- Selected clock divided by 32 - Clk_32, + CLK_32, -- Selected clock divided by 64 - Clk_64, + CLK_64, -- Selected clock divided by 3 - Clk_3) + CLK_3) with Size => 3; for PMC_MCKR_PRES_Field use - (Clk_1 => 0, - Clk_2 => 1, - Clk_4 => 2, - Clk_8 => 3, - Clk_16 => 4, - Clk_32 => 5, - Clk_64 => 6, - Clk_3 => 7); + (CLK_1 => 0, + CLK_2 => 1, + CLK_4 => 2, + CLK_8 => 3, + CLK_16 => 4, + CLK_32 => 5, + CLK_64 => 6, + CLK_3 => 7); subtype PMC_MCKR_PLLADIV2_Field is ATSAM3X8E.Bit; subtype PMC_MCKR_UPLLDIV2_Field is ATSAM3X8E.Bit; @@ -489,11 +488,11 @@ package ATSAM3X8E.PMC is -- Master Clock Register type PMC_MCKR_Register is record -- Master Clock Source Selection - CSS : PMC_MCKR_CSS_Field := ATSAM3X8E.PMC.Main_Clk; + CSS : PMC_MCKR_CSS_Field := ATSAM3X8E.PMC.MAIN_CLK; -- unspecified Reserved_2_3 : ATSAM3X8E.UInt2 := 16#0#; -- Processor Clock Prescaler - PRES : PMC_MCKR_PRES_Field := ATSAM3X8E.PMC.Clk_1; + PRES : PMC_MCKR_PRES_Field := ATSAM3X8E.PMC.CLK_1; -- unspecified Reserved_7_11 : ATSAM3X8E.UInt5 := 16#0#; -- PLLA Divisor by 2 @@ -540,57 +539,57 @@ package ATSAM3X8E.PMC is -- Master Clock Source Selection type PMC_PCK_CSS_Field is (-- Slow Clock is selected - Slow_Clk, + SLOW_CLK, -- Main Clock is selected - Main_Clk, + MAIN_CLK, -- PLLA Clock is selected - Plla_Clk, + PLLA_CLK, -- UPLL Clock is selected - Upll_Clk, + UPLL_CLK, -- Master Clock is selected - Mck) + MCK) with Size => 3; for PMC_PCK_CSS_Field use - (Slow_Clk => 0, - Main_Clk => 1, - Plla_Clk => 2, - Upll_Clk => 3, - Mck => 4); + (SLOW_CLK => 0, + MAIN_CLK => 1, + PLLA_CLK => 2, + UPLL_CLK => 3, + MCK => 4); -- Programmable Clock Prescaler type PMC_PCK_PRES_Field is (-- Selected clock - Clk_1, + CLK_1, -- Selected clock divided by 2 - Clk_2, + CLK_2, -- Selected clock divided by 4 - Clk_4, + CLK_4, -- Selected clock divided by 8 - Clk_8, + CLK_8, -- Selected clock divided by 16 - Clk_16, + CLK_16, -- Selected clock divided by 32 - Clk_32, + CLK_32, -- Selected clock divided by 64 - Clk_64) + CLK_64) with Size => 3; for PMC_PCK_PRES_Field use - (Clk_1 => 0, - Clk_2 => 1, - Clk_4 => 2, - Clk_8 => 3, - Clk_16 => 4, - Clk_32 => 5, - Clk_64 => 6); + (CLK_1 => 0, + CLK_2 => 1, + CLK_4 => 2, + CLK_8 => 3, + CLK_16 => 4, + CLK_32 => 5, + CLK_64 => 6); -- Programmable Clock 0 Register type PMC_PCK_Register is record -- Master Clock Source Selection - CSS : PMC_PCK_CSS_Field := ATSAM3X8E.PMC.Slow_Clk; + CSS : PMC_PCK_CSS_Field := ATSAM3X8E.PMC.SLOW_CLK; -- unspecified Reserved_3_3 : ATSAM3X8E.Bit := 16#0#; -- Programmable Clock Prescaler - PRES : PMC_PCK_PRES_Field := ATSAM3X8E.PMC.Clk_1; + PRES : PMC_PCK_PRES_Field := ATSAM3X8E.PMC.CLK_1; -- unspecified Reserved_7_31 : ATSAM3X8E.UInt25 := 16#0#; end record @@ -1242,16 +1241,16 @@ package ATSAM3X8E.PMC is -- Divisor Value type PMC_PCR_DIV_Field is (-- Peripheral clock is MCK - Periph_Div_Mck, + PERIPH_DIV_MCK, -- Peripheral clock is MCK/2 - Periph_Div2_Mck, + PERIPH_DIV2_MCK, -- Peripheral clock is MCK/4 - Periph_Div4_Mck) + PERIPH_DIV4_MCK) with Size => 2; for PMC_PCR_DIV_Field use - (Periph_Div_Mck => 0, - Periph_Div2_Mck => 1, - Periph_Div4_Mck => 2); + (PERIPH_DIV_MCK => 0, + PERIPH_DIV2_MCK => 1, + PERIPH_DIV4_MCK => 2); subtype PMC_PCR_EN_Field is ATSAM3X8E.Bit; @@ -1266,7 +1265,7 @@ package ATSAM3X8E.PMC is -- unspecified Reserved_13_15 : ATSAM3X8E.UInt3 := 16#0#; -- Divisor Value - DIV : PMC_PCR_DIV_Field := ATSAM3X8E.PMC.Periph_Div_Mck; + DIV : PMC_PCR_DIV_Field := ATSAM3X8E.PMC.PERIPH_DIV_MCK; -- unspecified Reserved_18_27 : ATSAM3X8E.UInt10 := 16#0#; -- Enable diff --git a/arduino-due/atsam3x8e/atsam3x8e-pwm.ads b/arduino-due/atsam3x8e/atsam3x8e-pwm.ads index 6535c45..4238876 100644 --- a/arduino-due/atsam3x8e/atsam3x8e-pwm.ads +++ b/arduino-due/atsam3x8e/atsam3x8e-pwm.ads @@ -1,4 +1,3 @@ -pragma Ada_2012; pragma Style_Checks (Off); -- This spec has been automatically generated from ATSAM3X8E.svd @@ -504,18 +503,18 @@ package ATSAM3X8E.PWM is type SCM_UPDM_Field is (-- Manual write of double buffer registers and manual update of synchronous -- channels - Mode0, + MODE0, -- Manual write of double buffer registers and automatic update of synchronous -- channels - Mode1, + MODE1, -- Automatic write of duty-cycle update registers by the PDC and automatic -- update of synchronous channels - Mode2) + MODE2) with Size => 2; for SCM_UPDM_Field use - (Mode0 => 0, - Mode1 => 1, - Mode2 => 2); + (MODE0 => 0, + MODE1 => 1, + MODE2 => 2); subtype PWM_SCM_PTRM_Field is ATSAM3X8E.Bit; subtype PWM_SCM_PTRCS_Field is ATSAM3X8E.UInt3; @@ -528,7 +527,7 @@ package ATSAM3X8E.PWM is -- unspecified Reserved_8_15 : ATSAM3X8E.Byte := 16#0#; -- Synchronous Channels Update Mode - UPDM : SCM_UPDM_Field := ATSAM3X8E.PWM.Mode0; + UPDM : SCM_UPDM_Field := ATSAM3X8E.PWM.MODE0; -- unspecified Reserved_18_19 : ATSAM3X8E.UInt2 := 16#0#; -- PDC Transfer Request Mode @@ -2081,46 +2080,46 @@ package ATSAM3X8E.PWM is -- Channel Pre-scaler type CMR0_CPRE_Field is (-- Master clock - Mck, + MCK, -- Master clock/2 - Mck_Div_2, + MCK_DIV_2, -- Master clock/4 - Mck_Div_4, + MCK_DIV_4, -- Master clock/8 - Mck_Div_8, + MCK_DIV_8, -- Master clock/16 - Mck_Div_16, + MCK_DIV_16, -- Master clock/32 - Mck_Div_32, + MCK_DIV_32, -- Master clock/64 - Mck_Div_64, + MCK_DIV_64, -- Master clock/128 - Mck_Div_128, + MCK_DIV_128, -- Master clock/256 - Mck_Div_256, + MCK_DIV_256, -- Master clock/512 - Mck_Div_512, + MCK_DIV_512, -- Master clock/1024 - Mck_Div_1024, + MCK_DIV_1024, -- Clock A - Clka, + CLKA, -- Clock B - Clkb) + CLKB) with Size => 4; for CMR0_CPRE_Field use - (Mck => 0, - Mck_Div_2 => 1, - Mck_Div_4 => 2, - Mck_Div_8 => 3, - Mck_Div_16 => 4, - Mck_Div_32 => 5, - Mck_Div_64 => 6, - Mck_Div_128 => 7, - Mck_Div_256 => 8, - Mck_Div_512 => 9, - Mck_Div_1024 => 10, - Clka => 11, - Clkb => 12); + (MCK => 0, + MCK_DIV_2 => 1, + MCK_DIV_4 => 2, + MCK_DIV_8 => 3, + MCK_DIV_16 => 4, + MCK_DIV_32 => 5, + MCK_DIV_64 => 6, + MCK_DIV_128 => 7, + MCK_DIV_256 => 8, + MCK_DIV_512 => 9, + MCK_DIV_1024 => 10, + CLKA => 11, + CLKB => 12); subtype CMR_CALG_Field is ATSAM3X8E.Bit; subtype CMR_CPOL_Field is ATSAM3X8E.Bit; @@ -2132,7 +2131,7 @@ package ATSAM3X8E.PWM is -- PWM Channel Mode Register (ch_num = 0) type CMR_Register is record -- Channel Pre-scaler - CPRE : CMR0_CPRE_Field := ATSAM3X8E.PWM.Mck; + CPRE : CMR0_CPRE_Field := ATSAM3X8E.PWM.MCK; -- unspecified Reserved_4_7 : ATSAM3X8E.UInt4 := 16#0#; -- Channel Alignment diff --git a/arduino-due/atsam3x8e/atsam3x8e-spi.ads b/arduino-due/atsam3x8e/atsam3x8e-spi.ads index d362bb0..0ae9755 100644 --- a/arduino-due/atsam3x8e/atsam3x8e-spi.ads +++ b/arduino-due/atsam3x8e/atsam3x8e-spi.ads @@ -1,4 +1,3 @@ -pragma Ada_2012; pragma Style_Checks (Off); -- This spec has been automatically generated from ATSAM3X8E.svd @@ -335,34 +334,34 @@ package ATSAM3X8E.SPI is -- Bits Per Transfer type CSR_BITS_Field is (-- 8 bits for transfer - Val_8_Bit, + Val_8_BIT, -- 9 bits for transfer - Val_9_Bit, + Val_9_BIT, -- 10 bits for transfer - Val_10_Bit, + Val_10_BIT, -- 11 bits for transfer - Val_11_Bit, + Val_11_BIT, -- 12 bits for transfer - Val_12_Bit, + Val_12_BIT, -- 13 bits for transfer - Val_13_Bit, + Val_13_BIT, -- 14 bits for transfer - Val_14_Bit, + Val_14_BIT, -- 15 bits for transfer - Val_15_Bit, + Val_15_BIT, -- 16 bits for transfer - Val_16_Bit) + Val_16_BIT) with Size => 4; for CSR_BITS_Field use - (Val_8_Bit => 0, - Val_9_Bit => 1, - Val_10_Bit => 2, - Val_11_Bit => 3, - Val_12_Bit => 4, - Val_13_Bit => 5, - Val_14_Bit => 6, - Val_15_Bit => 7, - Val_16_Bit => 8); + (Val_8_BIT => 0, + Val_9_BIT => 1, + Val_10_BIT => 2, + Val_11_BIT => 3, + Val_12_BIT => 4, + Val_13_BIT => 5, + Val_14_BIT => 6, + Val_15_BIT => 7, + Val_16_BIT => 8); subtype SPI0_CSR_SCBR_Field is ATSAM3X8E.Byte; subtype SPI0_CSR_DLYBS_Field is ATSAM3X8E.Byte; @@ -379,7 +378,7 @@ package ATSAM3X8E.SPI is -- Chip Select Active After Transfer CSAAT : SPI0_CSR_CSAAT_Field := 16#0#; -- Bits Per Transfer - BITS : CSR_BITS_Field := ATSAM3X8E.SPI.Val_8_Bit; + BITS : CSR_BITS_Field := ATSAM3X8E.SPI.Val_8_BIT; -- Serial Clock Baud Rate SCBR : SPI0_CSR_SCBR_Field := 16#0#; -- Delay Before SPCK diff --git a/arduino-due/atsam3x8e/atsam3x8e-ssc.ads b/arduino-due/atsam3x8e/atsam3x8e-ssc.ads index 7a80e56..a5329de 100644 --- a/arduino-due/atsam3x8e/atsam3x8e-ssc.ads +++ b/arduino-due/atsam3x8e/atsam3x8e-ssc.ads @@ -1,4 +1,3 @@ -pragma Ada_2012; pragma Style_Checks (Off); -- This spec has been automatically generated from ATSAM3X8E.svd @@ -72,79 +71,79 @@ package ATSAM3X8E.SSC is -- Receive Clock Selection type RCMR_CKS_Field is (-- Divided Clock - Mck, + MCK, -- TK Clock signal - Tk, + TK, -- RK pin - Rk) + RK) with Size => 2; for RCMR_CKS_Field use - (Mck => 0, - Tk => 1, - Rk => 2); + (MCK => 0, + TK => 1, + RK => 2); -- Receive Clock Output Mode Selection type RCMR_CKO_Field is (-- None - None, + NONE, -- Continuous Receive Clock - Continuous, + CONTINUOUS, -- Receive Clock only during data transfers - Transfer) + TRANSFER) with Size => 3; for RCMR_CKO_Field use - (None => 0, - Continuous => 1, - Transfer => 2); + (NONE => 0, + CONTINUOUS => 1, + TRANSFER => 2); subtype SSC_RCMR_CKI_Field is ATSAM3X8E.Bit; -- Receive Clock Gating Selection type RCMR_CKG_Field is (-- None - None, + NONE, -- Continuous Receive Clock - Continuous, + CONTINUOUS, -- Receive Clock only during data transfers - Transfer) + TRANSFER) with Size => 2; for RCMR_CKG_Field use - (None => 0, - Continuous => 1, - Transfer => 2); + (NONE => 0, + CONTINUOUS => 1, + TRANSFER => 2); -- Receive Start Selection type RCMR_START_Field is (-- Continuous, as soon as the receiver is enabled, and immediately after the -- end of transfer of the previous data. - Continuous, + CONTINUOUS, -- Transmit start - Transmit, + TRANSMIT, -- Detection of a low level on RF signal - Rf_Low, + RF_LOW, -- Detection of a high level on RF signal - Rf_High, + RF_HIGH, -- Detection of a falling edge on RF signal - Rf_Falling, + RF_FALLING, -- Detection of a rising edge on RF signal - Rf_Rising, + RF_RISING, -- Detection of any level change on RF signal - Rf_Level, + RF_LEVEL, -- Detection of any edge on RF signal - Rf_Edge, + RF_EDGE, -- Compare 0 - Cmp_0) + CMP_0) with Size => 4; for RCMR_START_Field use - (Continuous => 0, - Transmit => 1, - Rf_Low => 2, - Rf_High => 3, - Rf_Falling => 4, - Rf_Rising => 5, - Rf_Level => 6, - Rf_Edge => 7, - Cmp_0 => 8); + (CONTINUOUS => 0, + TRANSMIT => 1, + RF_LOW => 2, + RF_HIGH => 3, + RF_FALLING => 4, + RF_RISING => 5, + RF_LEVEL => 6, + RF_EDGE => 7, + CMP_0 => 8); subtype SSC_RCMR_STOP_Field is ATSAM3X8E.Bit; subtype SSC_RCMR_STTDLY_Field is ATSAM3X8E.Byte; @@ -153,15 +152,15 @@ package ATSAM3X8E.SSC is -- Receive Clock Mode Register type SSC_RCMR_Register is record -- Receive Clock Selection - CKS : RCMR_CKS_Field := ATSAM3X8E.SSC.Mck; + CKS : RCMR_CKS_Field := ATSAM3X8E.SSC.MCK; -- Receive Clock Output Mode Selection - CKO : RCMR_CKO_Field := ATSAM3X8E.SSC.None; + CKO : RCMR_CKO_Field := ATSAM3X8E.SSC.NONE; -- Receive Clock Inversion CKI : SSC_RCMR_CKI_Field := 16#0#; -- Receive Clock Gating Selection - CKG : RCMR_CKG_Field := ATSAM3X8E.SSC.None; + CKG : RCMR_CKG_Field := ATSAM3X8E.SSC.NONE; -- Receive Start Selection - START : RCMR_START_Field := ATSAM3X8E.SSC.Continuous; + START : RCMR_START_Field := ATSAM3X8E.SSC.CONTINUOUS; -- Receive Stop Selection STOP : SSC_RCMR_STOP_Field := 16#0#; -- unspecified @@ -194,36 +193,36 @@ package ATSAM3X8E.SSC is -- Receive Frame Sync Output Selection type RFMR_FSOS_Field is (-- None - None, + NONE, -- Negative Pulse - Negative, + NEGATIVE, -- Positive Pulse - Positive, + POSITIVE, -- Driven Low during data transfer - Low, + LOW, -- Driven High during data transfer - High, + HIGH, -- Toggling at each start of data transfer - Toggling) + TOGGLING) with Size => 3; for RFMR_FSOS_Field use - (None => 0, - Negative => 1, - Positive => 2, - Low => 3, - High => 4, - Toggling => 5); + (NONE => 0, + NEGATIVE => 1, + POSITIVE => 2, + LOW => 3, + HIGH => 4, + TOGGLING => 5); -- Frame Sync Edge Detection type RFMR_FSEDGE_Field is (-- Positive Edge Detection - Positive, + POSITIVE, -- Negative Edge Detection - Negative) + NEGATIVE) with Size => 1; for RFMR_FSEDGE_Field use - (Positive => 0, - Negative => 1); + (POSITIVE => 0, + NEGATIVE => 1); subtype SSC_RFMR_FSLEN_EXT_Field is ATSAM3X8E.UInt4; @@ -244,11 +243,11 @@ package ATSAM3X8E.SSC is -- Receive Frame Sync Length FSLEN : SSC_RFMR_FSLEN_Field := 16#0#; -- Receive Frame Sync Output Selection - FSOS : RFMR_FSOS_Field := ATSAM3X8E.SSC.None; + FSOS : RFMR_FSOS_Field := ATSAM3X8E.SSC.NONE; -- unspecified Reserved_23_23 : ATSAM3X8E.Bit := 16#0#; -- Frame Sync Edge Detection - FSEDGE : RFMR_FSEDGE_Field := ATSAM3X8E.SSC.Positive; + FSEDGE : RFMR_FSEDGE_Field := ATSAM3X8E.SSC.POSITIVE; -- unspecified Reserved_25_27 : ATSAM3X8E.UInt3 := 16#0#; -- FSLEN Field Extension @@ -274,80 +273,80 @@ package ATSAM3X8E.SSC is -- Transmit Clock Selection type TCMR_CKS_Field is (-- Divided Clock - Mck, + MCK, -- TK Clock signal - Tk, + TK, -- RK pin - Rk) + RK) with Size => 2; for TCMR_CKS_Field use - (Mck => 0, - Tk => 1, - Rk => 2); + (MCK => 0, + TK => 1, + RK => 2); -- Transmit Clock Output Mode Selection type TCMR_CKO_Field is (-- None - None, + NONE, -- Continuous Receive Clock - Continuous, + CONTINUOUS, -- Transmit Clock only during data transfers - Transfer) + TRANSFER) with Size => 3; for TCMR_CKO_Field use - (None => 0, - Continuous => 1, - Transfer => 2); + (NONE => 0, + CONTINUOUS => 1, + TRANSFER => 2); subtype SSC_TCMR_CKI_Field is ATSAM3X8E.Bit; -- Transmit Clock Gating Selection type TCMR_CKG_Field is (-- None - None, + NONE, -- Transmit Clock enabled only if TF Low - Continuous, + CONTINUOUS, -- Transmit Clock enabled only if TF High - Transfer) + TRANSFER) with Size => 2; for TCMR_CKG_Field use - (None => 0, - Continuous => 1, - Transfer => 2); + (NONE => 0, + CONTINUOUS => 1, + TRANSFER => 2); -- Transmit Start Selection type TCMR_START_Field is (-- Continuous, as soon as a word is written in the SSC_THR Register (if -- Transmit is enabled), and immediately after the end of transfer of the -- previous data. - Continuous, + CONTINUOUS, -- Receive start - Receive, + RECEIVE, -- Detection of a low level on TF signal - Rf_Low, + RF_LOW, -- Detection of a high level on TF signal - Rf_High, + RF_HIGH, -- Detection of a falling edge on TF signal - Rf_Falling, + RF_FALLING, -- Detection of a rising edge on TF signal - Rf_Rising, + RF_RISING, -- Detection of any level change on TF signal - Rf_Level, + RF_LEVEL, -- Detection of any edge on TF signal - Rf_Edge, + RF_EDGE, -- Compare 0 - Cmp_0) + CMP_0) with Size => 4; for TCMR_START_Field use - (Continuous => 0, - Receive => 1, - Rf_Low => 2, - Rf_High => 3, - Rf_Falling => 4, - Rf_Rising => 5, - Rf_Level => 6, - Rf_Edge => 7, - Cmp_0 => 8); + (CONTINUOUS => 0, + RECEIVE => 1, + RF_LOW => 2, + RF_HIGH => 3, + RF_FALLING => 4, + RF_RISING => 5, + RF_LEVEL => 6, + RF_EDGE => 7, + CMP_0 => 8); subtype SSC_TCMR_STTDLY_Field is ATSAM3X8E.Byte; subtype SSC_TCMR_PERIOD_Field is ATSAM3X8E.Byte; @@ -355,15 +354,15 @@ package ATSAM3X8E.SSC is -- Transmit Clock Mode Register type SSC_TCMR_Register is record -- Transmit Clock Selection - CKS : TCMR_CKS_Field := ATSAM3X8E.SSC.Mck; + CKS : TCMR_CKS_Field := ATSAM3X8E.SSC.MCK; -- Transmit Clock Output Mode Selection - CKO : TCMR_CKO_Field := ATSAM3X8E.SSC.None; + CKO : TCMR_CKO_Field := ATSAM3X8E.SSC.NONE; -- Transmit Clock Inversion CKI : SSC_TCMR_CKI_Field := 16#0#; -- Transmit Clock Gating Selection - CKG : TCMR_CKG_Field := ATSAM3X8E.SSC.None; + CKG : TCMR_CKG_Field := ATSAM3X8E.SSC.NONE; -- Transmit Start Selection - START : TCMR_START_Field := ATSAM3X8E.SSC.Continuous; + START : TCMR_START_Field := ATSAM3X8E.SSC.CONTINUOUS; -- unspecified Reserved_12_15 : ATSAM3X8E.UInt4 := 16#0#; -- Transmit Start Delay @@ -393,38 +392,38 @@ package ATSAM3X8E.SSC is -- Transmit Frame Sync Output Selection type TFMR_FSOS_Field is (-- None - None, + NONE, -- Negative Pulse - Negative, + NEGATIVE, -- Positive Pulse - Positive, + POSITIVE, -- Driven Low during data transfer - Low, + LOW, -- Driven High during data transfer - High, + HIGH, -- Toggling at each start of data transfer - Toggling) + TOGGLING) with Size => 3; for TFMR_FSOS_Field use - (None => 0, - Negative => 1, - Positive => 2, - Low => 3, - High => 4, - Toggling => 5); + (NONE => 0, + NEGATIVE => 1, + POSITIVE => 2, + LOW => 3, + HIGH => 4, + TOGGLING => 5); subtype SSC_TFMR_FSDEN_Field is ATSAM3X8E.Bit; -- Frame Sync Edge Detection type TFMR_FSEDGE_Field is (-- Positive Edge Detection - Positive, + POSITIVE, -- Negative Edge Detection - Negative) + NEGATIVE) with Size => 1; for TFMR_FSEDGE_Field use - (Positive => 0, - Negative => 1); + (POSITIVE => 0, + NEGATIVE => 1); subtype SSC_TFMR_FSLEN_EXT_Field is ATSAM3X8E.UInt4; @@ -445,11 +444,11 @@ package ATSAM3X8E.SSC is -- Transmit Frame Sync Length FSLEN : SSC_TFMR_FSLEN_Field := 16#0#; -- Transmit Frame Sync Output Selection - FSOS : TFMR_FSOS_Field := ATSAM3X8E.SSC.None; + FSOS : TFMR_FSOS_Field := ATSAM3X8E.SSC.NONE; -- Frame Sync Data Enable FSDEN : SSC_TFMR_FSDEN_Field := 16#0#; -- Frame Sync Edge Detection - FSEDGE : TFMR_FSEDGE_Field := ATSAM3X8E.SSC.Positive; + FSEDGE : TFMR_FSEDGE_Field := ATSAM3X8E.SSC.POSITIVE; -- unspecified Reserved_25_27 : ATSAM3X8E.UInt3 := 16#0#; -- FSLEN Field Extension diff --git a/arduino-due/atsam3x8e/atsam3x8e-sysc.ads b/arduino-due/atsam3x8e/atsam3x8e-sysc.ads index 51b83f8..d09bd5c 100644 --- a/arduino-due/atsam3x8e/atsam3x8e-sysc.ads +++ b/arduino-due/atsam3x8e/atsam3x8e-sysc.ads @@ -1,4 +1,3 @@ -pragma Ada_2012; pragma Style_Checks (Off); -- This spec has been automatically generated from ATSAM3X8E.svd @@ -120,33 +119,33 @@ package ATSAM3X8E.SYSC is -- Time Event Selection type CR_TIMEVSEL_Field is (-- Minute change - Minute, + MINUTE, -- Hour change - Hour, + HOUR, -- Every day at midnight - Midnight, + MIDNIGHT, -- Every day at noon - Noon) + NOON) with Size => 2; for CR_TIMEVSEL_Field use - (Minute => 0, - Hour => 1, - Midnight => 2, - Noon => 3); + (MINUTE => 0, + HOUR => 1, + MIDNIGHT => 2, + NOON => 3); -- Calendar Event Selection type CR_CALEVSEL_Field is (-- Week change (every Monday at time 00:00:00) - Week, + WEEK, -- Month change (every 01 of each month at time 00:00:00) - Month, + MONTH, -- Year change (every January 1 at time 00:00:00) - Year) + YEAR) with Size => 2; for CR_CALEVSEL_Field use - (Week => 0, - Month => 1, - Year => 2); + (WEEK => 0, + MONTH => 1, + YEAR => 2); -- Control Register type RTC_CR_Register is record @@ -157,11 +156,11 @@ package ATSAM3X8E.SYSC is -- unspecified Reserved_2_7 : ATSAM3X8E.UInt6 := 16#0#; -- Time Event Selection - TIMEVSEL : CR_TIMEVSEL_Field := ATSAM3X8E.SYSC.Minute; + TIMEVSEL : CR_TIMEVSEL_Field := ATSAM3X8E.SYSC.MINUTE; -- unspecified Reserved_10_15 : ATSAM3X8E.UInt6 := 16#0#; -- Calendar Event Selection - CALEVSEL : CR_CALEVSEL_Field := ATSAM3X8E.SYSC.Week; + CALEVSEL : CR_CALEVSEL_Field := ATSAM3X8E.SYSC.WEEK; -- unspecified Reserved_18_31 : ATSAM3X8E.UInt14 := 16#0#; end record @@ -594,25 +593,25 @@ package ATSAM3X8E.SYSC is -- Voltage Regulator Off type CR_VROFF_Field is (-- no effect. - No_Effect, + NO_EFFECT, -- if KEY is correct, asserts vddcore_nreset and stops the voltage regulator. - Stop_Vreg) + STOP_VREG) with Size => 1; for CR_VROFF_Field use - (No_Effect => 0, - Stop_Vreg => 1); + (NO_EFFECT => 0, + STOP_VREG => 1); -- Crystal Oscillator Select type CR_XTALSEL_Field is (-- no effect. - No_Effect, + NO_EFFECT, -- if KEY is correct, switches the slow clock on the crystal oscillator -- output. - Crystal_Sel) + CRYSTAL_SEL) with Size => 1; for CR_XTALSEL_Field use - (No_Effect => 0, - Crystal_Sel => 1); + (NO_EFFECT => 0, + CRYSTAL_SEL => 1); subtype SUPC_CR_KEY_Field is ATSAM3X8E.Byte; @@ -621,9 +620,9 @@ package ATSAM3X8E.SYSC is -- unspecified Reserved_0_1 : ATSAM3X8E.UInt2 := 16#0#; -- Write-only. Voltage Regulator Off - VROFF : CR_VROFF_Field := ATSAM3X8E.SYSC.No_Effect; + VROFF : CR_VROFF_Field := ATSAM3X8E.SYSC.NO_EFFECT; -- Write-only. Crystal Oscillator Select - XTALSEL : CR_XTALSEL_Field := ATSAM3X8E.SYSC.No_Effect; + XTALSEL : CR_XTALSEL_Field := ATSAM3X8E.SYSC.NO_EFFECT; -- unspecified Reserved_4_23 : ATSAM3X8E.UInt20 := 16#0#; -- Write-only. Password @@ -695,48 +694,48 @@ package ATSAM3X8E.SYSC is -- Supply Monitor Sampling Period type SMMR_SMSMPL_Field is (-- Supply Monitor disabled - Smd, + SMD, -- Continuous Supply Monitor - Csm, + CSM, -- Supply Monitor enabled one SLCK period every 32 SLCK periods - Val_32Slck, + Val_32SLCK, -- Supply Monitor enabled one SLCK period every 256 SLCK periods - Val_256Slck, + Val_256SLCK, -- Supply Monitor enabled one SLCK period every 2,048 SLCK periods - Val_2048Slck) + Val_2048SLCK) with Size => 3; for SMMR_SMSMPL_Field use - (Smd => 0, - Csm => 1, - Val_32Slck => 2, - Val_256Slck => 3, - Val_2048Slck => 4); + (SMD => 0, + CSM => 1, + Val_32SLCK => 2, + Val_256SLCK => 3, + Val_2048SLCK => 4); -- Supply Monitor Reset Enable type SMMR_SMRSTEN_Field is (-- the core reset signal "vddcore_nreset" is not affected when a supply -- monitor detection occurs. - Not_Enable, + NOT_ENABLE, -- the core reset signal, vddcore_nreset is asserted when a supply monitor -- detection occurs. - Enable) + ENABLE) with Size => 1; for SMMR_SMRSTEN_Field use - (Not_Enable => 0, - Enable => 1); + (NOT_ENABLE => 0, + ENABLE => 1); -- Supply Monitor Interrupt Enable type SMMR_SMIEN_Field is (-- the SUPC interrupt signal is not affected when a supply monitor detection -- occurs. - Not_Enable, + NOT_ENABLE, -- the SUPC interrupt signal is asserted when a supply monitor detection -- occurs. - Enable) + ENABLE) with Size => 1; for SMMR_SMIEN_Field use - (Not_Enable => 0, - Enable => 1); + (NOT_ENABLE => 0, + ENABLE => 1); -- Supply Controller Supply Monitor Mode Register type SUPC_SMMR_Register is record @@ -745,13 +744,13 @@ package ATSAM3X8E.SYSC is -- unspecified Reserved_4_7 : ATSAM3X8E.UInt4 := 16#0#; -- Supply Monitor Sampling Period - SMSMPL : SMMR_SMSMPL_Field := ATSAM3X8E.SYSC.Smd; + SMSMPL : SMMR_SMSMPL_Field := ATSAM3X8E.SYSC.SMD; -- unspecified Reserved_11_11 : ATSAM3X8E.Bit := 16#0#; -- Supply Monitor Reset Enable - SMRSTEN : SMMR_SMRSTEN_Field := ATSAM3X8E.SYSC.Not_Enable; + SMRSTEN : SMMR_SMRSTEN_Field := ATSAM3X8E.SYSC.NOT_ENABLE; -- Supply Monitor Interrupt Enable - SMIEN : SMMR_SMIEN_Field := ATSAM3X8E.SYSC.Not_Enable; + SMIEN : SMMR_SMIEN_Field := ATSAM3X8E.SYSC.NOT_ENABLE; -- unspecified Reserved_14_31 : ATSAM3X8E.UInt18 := 16#0#; end record @@ -771,38 +770,38 @@ package ATSAM3X8E.SYSC is type MR_BODRSTEN_Field is (-- the core reset signal "vddcore_nreset" is not affected when a brownout -- detection occurs. - Not_Enable, + NOT_ENABLE, -- the core reset signal, vddcore_nreset is asserted when a brownout detection -- occurs. - Enable) + ENABLE) with Size => 1; for MR_BODRSTEN_Field use - (Not_Enable => 0, - Enable => 1); + (NOT_ENABLE => 0, + ENABLE => 1); -- Brownout Detector Disable type MR_BODDIS_Field is (-- the core brownout detector is enabled. - Enable, + ENABLE, -- the core brownout detector is disabled. - Disable) + DISABLE) with Size => 1; for MR_BODDIS_Field use - (Enable => 0, - Disable => 1); + (ENABLE => 0, + DISABLE => 1); subtype SUPC_MR_VDDIORDYONREG_Field is ATSAM3X8E.Bit; -- Oscillator Bypass type MR_OSCBYPASS_Field is (-- no effect. Clock selection depends on XTALSEL value. - No_Effect, + NO_EFFECT, -- the 32-KHz XTAL oscillator is selected and is put in bypass mode. - Bypass) + BYPASS) with Size => 1; for MR_OSCBYPASS_Field use - (No_Effect => 0, - Bypass => 1); + (NO_EFFECT => 0, + BYPASS => 1); subtype SUPC_MR_KEY_Field is ATSAM3X8E.Byte; @@ -811,14 +810,14 @@ package ATSAM3X8E.SYSC is -- unspecified Reserved_0_11 : ATSAM3X8E.UInt12 := 16#A00#; -- Brownout Detector Reset Enable - BODRSTEN : MR_BODRSTEN_Field := ATSAM3X8E.SYSC.Enable; + BODRSTEN : MR_BODRSTEN_Field := ATSAM3X8E.SYSC.ENABLE; -- Brownout Detector Disable - BODDIS : MR_BODDIS_Field := ATSAM3X8E.SYSC.Enable; + BODDIS : MR_BODDIS_Field := ATSAM3X8E.SYSC.ENABLE; VDDIORDYONREG : SUPC_MR_VDDIORDYONREG_Field := 16#1#; -- unspecified Reserved_15_19 : ATSAM3X8E.UInt5 := 16#0#; -- Oscillator Bypass - OSCBYPASS : MR_OSCBYPASS_Field := ATSAM3X8E.SYSC.No_Effect; + OSCBYPASS : MR_OSCBYPASS_Field := ATSAM3X8E.SYSC.NO_EFFECT; -- unspecified Reserved_21_23 : ATSAM3X8E.UInt3 := 16#0#; -- Password Key @@ -840,111 +839,111 @@ package ATSAM3X8E.SYSC is -- Force Wake Up Enable type WUMR_FWUPEN_Field is (-- the Force Wake Up pin has no wake up effect. - Not_Enable, + NOT_ENABLE, -- the Force Wake Up pin low forces the wake up of the core power supply. - Enable) + ENABLE) with Size => 1; for WUMR_FWUPEN_Field use - (Not_Enable => 0, - Enable => 1); + (NOT_ENABLE => 0, + ENABLE => 1); -- Supply Monitor Wake Up Enable type WUMR_SMEN_Field is (-- the supply monitor detection has no wake up effect. - Not_Enable, + NOT_ENABLE, -- the supply monitor detection forces the wake up of the core power supply. - Enable) + ENABLE) with Size => 1; for WUMR_SMEN_Field use - (Not_Enable => 0, - Enable => 1); + (NOT_ENABLE => 0, + ENABLE => 1); -- Real Time Timer Wake Up Enable type WUMR_RTTEN_Field is (-- the RTT alarm signal has no wake up effect. - Not_Enable, + NOT_ENABLE, -- the RTT alarm signal forces the wake up of the core power supply. - Enable) + ENABLE) with Size => 1; for WUMR_RTTEN_Field use - (Not_Enable => 0, - Enable => 1); + (NOT_ENABLE => 0, + ENABLE => 1); -- Real Time Clock Wake Up Enable type WUMR_RTCEN_Field is (-- the RTC alarm signal has no wake up effect. - Not_Enable, + NOT_ENABLE, -- the RTC alarm signal forces the wake up of the core power supply. - Enable) + ENABLE) with Size => 1; for WUMR_RTCEN_Field use - (Not_Enable => 0, - Enable => 1); + (NOT_ENABLE => 0, + ENABLE => 1); -- Force Wake Up Debouncer Period type WUMR_FWUPDBC_Field is (-- Immediate, no debouncing, detected active at least on one Slow Clock edge. - Immediate, + IMMEDIATE, -- FWUP shall be low for at least 3 SLCK periods - Val_3_Sclk, + Val_3_SCLK, -- FWUP shall be low for at least 32 SLCK periods - Val_32_Sclk, + Val_32_SCLK, -- FWUP shall be low for at least 512 SLCK periods - Val_512_Sclk, + Val_512_SCLK, -- FWUP shall be low for at least 4,096 SLCK periods - Val_4096_Sclk, + Val_4096_SCLK, -- FWUP shall be low for at least 32,768 SLCK periods - Val_32768_Sclk) + Val_32768_SCLK) with Size => 3; for WUMR_FWUPDBC_Field use - (Immediate => 0, - Val_3_Sclk => 1, - Val_32_Sclk => 2, - Val_512_Sclk => 3, - Val_4096_Sclk => 4, - Val_32768_Sclk => 5); + (IMMEDIATE => 0, + Val_3_SCLK => 1, + Val_32_SCLK => 2, + Val_512_SCLK => 3, + Val_4096_SCLK => 4, + Val_32768_SCLK => 5); -- Wake Up Inputs Debouncer Period type WUMR_WKUPDBC_Field is (-- Immediate, no debouncing, detected active at least on one Slow Clock edge. - Immediate, + IMMEDIATE, -- WKUPx shall be in its active state for at least 3 SLCK periods - Val_3_Sclk, + Val_3_SCLK, -- WKUPx shall be in its active state for at least 32 SLCK periods - Val_32_Sclk, + Val_32_SCLK, -- WKUPx shall be in its active state for at least 512 SLCK periods - Val_512_Sclk, + Val_512_SCLK, -- WKUPx shall be in its active state for at least 4,096 SLCK periods - Val_4096_Sclk, + Val_4096_SCLK, -- WKUPx shall be in its active state for at least 32,768 SLCK periods - Val_32768_Sclk) + Val_32768_SCLK) with Size => 3; for WUMR_WKUPDBC_Field use - (Immediate => 0, - Val_3_Sclk => 1, - Val_32_Sclk => 2, - Val_512_Sclk => 3, - Val_4096_Sclk => 4, - Val_32768_Sclk => 5); + (IMMEDIATE => 0, + Val_3_SCLK => 1, + Val_32_SCLK => 2, + Val_512_SCLK => 3, + Val_4096_SCLK => 4, + Val_32768_SCLK => 5); -- Supply Controller Wake Up Mode Register type SUPC_WUMR_Register is record -- Force Wake Up Enable - FWUPEN : WUMR_FWUPEN_Field := ATSAM3X8E.SYSC.Not_Enable; + FWUPEN : WUMR_FWUPEN_Field := ATSAM3X8E.SYSC.NOT_ENABLE; -- Supply Monitor Wake Up Enable - SMEN : WUMR_SMEN_Field := ATSAM3X8E.SYSC.Not_Enable; + SMEN : WUMR_SMEN_Field := ATSAM3X8E.SYSC.NOT_ENABLE; -- Real Time Timer Wake Up Enable - RTTEN : WUMR_RTTEN_Field := ATSAM3X8E.SYSC.Not_Enable; + RTTEN : WUMR_RTTEN_Field := ATSAM3X8E.SYSC.NOT_ENABLE; -- Real Time Clock Wake Up Enable - RTCEN : WUMR_RTCEN_Field := ATSAM3X8E.SYSC.Not_Enable; + RTCEN : WUMR_RTCEN_Field := ATSAM3X8E.SYSC.NOT_ENABLE; -- unspecified Reserved_4_7 : ATSAM3X8E.UInt4 := 16#0#; -- Force Wake Up Debouncer Period - FWUPDBC : WUMR_FWUPDBC_Field := ATSAM3X8E.SYSC.Immediate; + FWUPDBC : WUMR_FWUPDBC_Field := ATSAM3X8E.SYSC.IMMEDIATE; -- unspecified Reserved_11_11 : ATSAM3X8E.Bit := 16#0#; -- Wake Up Inputs Debouncer Period - WKUPDBC : WUMR_WKUPDBC_Field := ATSAM3X8E.SYSC.Immediate; + WKUPDBC : WUMR_WKUPDBC_Field := ATSAM3X8E.SYSC.IMMEDIATE; -- unspecified Reserved_15_31 : ATSAM3X8E.UInt17 := 16#0#; end record @@ -965,14 +964,14 @@ package ATSAM3X8E.SYSC is -- Wake Up Input Enable 0 type WUIR_WKUPEN0_Field is (-- the corresponding wake-up input has no wake up effect. - Disable, + DISABLE, -- the corresponding wake-up input forces the wake up of the core power -- supply. - Enable) + ENABLE) with Size => 1; for WUIR_WKUPEN0_Field use - (Disable => 0, - Enable => 1); + (DISABLE => 0, + ENABLE => 1); -- SUPC_WUIR_WKUPEN array type SUPC_WUIR_WKUPEN_Field_Array is array (0 .. 15) of WUIR_WKUPEN0_Field @@ -1002,14 +1001,14 @@ package ATSAM3X8E.SYSC is type WUIR_WKUPT0_Field is (-- a high to low level transition for a period defined by WKUPDBC on the -- corresponding wake-up input forces the wake up of the core power supply. - High_To_Low, + HIGH_TO_LOW, -- a low to high level transition for a period defined by WKUPDBC on the -- correspond-ing wake-up input forces the wake up of the core power supply. - Low_To_High) + LOW_TO_HIGH) with Size => 1; for WUIR_WKUPT0_Field use - (High_To_Low => 0, - Low_To_High => 1); + (HIGH_TO_LOW => 0, + LOW_TO_HIGH => 1); -- SUPC_WUIR_WKUPT array type SUPC_WUIR_WKUPT_Field_Array is array (0 .. 15) of WUIR_WKUPT0_Field @@ -1053,125 +1052,125 @@ package ATSAM3X8E.SYSC is type SR_FWUPS_Field is (-- no wake up due to the assertion of the FWUP pin has occurred since the last -- read of SUPC_SR. - No, + NO, -- at least one wake up due to the assertion of the FWUP pin has occurred -- since the last read of SUPC_SR. - Present) + PRESENT) with Size => 1; for SR_FWUPS_Field use - (No => 0, - Present => 1); + (NO => 0, + PRESENT => 1); -- WKUP Wake Up Status type SR_WKUPS_Field is (-- no wake up due to the assertion of the WKUP pins has occurred since the -- last read of SUPC_SR. - No, + NO, -- at least one wake up due to the assertion of the WKUP pins has occurred -- since the last read of SUPC_SR. - Present) + PRESENT) with Size => 1; for SR_WKUPS_Field use - (No => 0, - Present => 1); + (NO => 0, + PRESENT => 1); -- Supply Monitor Detection Wake Up Status type SR_SMWS_Field is (-- no wake up due to a supply monitor detection has occurred since the last -- read of SUPC_SR. - No, + NO, -- at least one wake up due to a supply monitor detection has occurred since -- the last read of SUPC_SR. - Present) + PRESENT) with Size => 1; for SR_SMWS_Field use - (No => 0, - Present => 1); + (NO => 0, + PRESENT => 1); -- Brownout Detector Reset Status type SR_BODRSTS_Field is (-- no core brownout rising edge event has been detected since the last read of -- the SUPC_SR. - No, + NO, -- at least one brownout output rising edge event has been detected since the -- last read of the SUPC_SR. - Present) + PRESENT) with Size => 1; for SR_BODRSTS_Field use - (No => 0, - Present => 1); + (NO => 0, + PRESENT => 1); -- Supply Monitor Reset Status type SR_SMRSTS_Field is (-- no supply monitor detection has generated a core reset since the last read -- of the SUPC_SR. - No, + NO, -- at least one supply monitor detection has generated a core reset since the -- last read of the SUPC_SR. - Present) + PRESENT) with Size => 1; for SR_SMRSTS_Field use - (No => 0, - Present => 1); + (NO => 0, + PRESENT => 1); -- Supply Monitor Status type SR_SMS_Field is (-- no supply monitor detection since the last read of SUPC_SR. - No, + NO, -- at least one supply monitor detection since the last read of SUPC_SR. - Present) + PRESENT) with Size => 1; for SR_SMS_Field use - (No => 0, - Present => 1); + (NO => 0, + PRESENT => 1); -- Supply Monitor Output Status type SR_SMOS_Field is (-- the supply monitor detected VDDUTMI higher than its threshold at its last -- measurement. - High, + HIGH, -- the supply monitor detected VDDUTMI lower than its threshold at its last -- measurement. - Low) + LOW) with Size => 1; for SR_SMOS_Field use - (High => 0, - Low => 1); + (HIGH => 0, + LOW => 1); -- 32-kHz Oscillator Selection Status type SR_OSCSEL_Field is (-- the slow clock, SLCK is generated by the embedded 32-kHz RC oscillator. - Rc, + RC, -- the slow clock, SLCK is generated by the 32-kHz crystal oscillator. - Cryst) + CRYST) with Size => 1; for SR_OSCSEL_Field use - (Rc => 0, - Cryst => 1); + (RC => 0, + CRYST => 1); -- FWUP Input Status type SR_FWUPIS_Field is (-- FWUP input is tied low. - Low, + LOW, -- FWUP input is tied high. - High) + HIGH) with Size => 1; for SR_FWUPIS_Field use - (Low => 0, - High => 1); + (LOW => 0, + HIGH => 1); -- WKUP Input Status 0 type SR_WKUPIS0_Field is (-- the corresponding wake-up input is disabled, or was inactive at the time -- the debouncer triggered a wake up event. - Dis, + DIS, -- the corresponding wake-up input was active at the time the debouncer -- triggered a wake up event. - En) + EN) with Size => 1; for SR_WKUPIS0_Field use - (Dis => 0, - En => 1); + (DIS => 0, + EN => 1); -- SUPC_SR_WKUPIS array type SUPC_SR_WKUPIS_Field_Array is array (0 .. 15) of SR_WKUPIS0_Field diff --git a/arduino-due/atsam3x8e/atsam3x8e-tc.ads b/arduino-due/atsam3x8e/atsam3x8e-tc.ads index c44b439..3295216 100644 --- a/arduino-due/atsam3x8e/atsam3x8e-tc.ads +++ b/arduino-due/atsam3x8e/atsam3x8e-tc.ads @@ -1,4 +1,3 @@ -pragma Ada_2012; pragma Style_Checks (Off); -- This spec has been automatically generated from ATSAM3X8E.svd @@ -41,50 +40,50 @@ package ATSAM3X8E.TC is -- Clock Selection type CMR0_TCCLKS_Field is (-- Clock selected: TCLK1 - Timer_Clock1, + TIMER_CLOCK1, -- Clock selected: TCLK2 - Timer_Clock2, + TIMER_CLOCK2, -- Clock selected: TCLK3 - Timer_Clock3, + TIMER_CLOCK3, -- Clock selected: TCLK4 - Timer_Clock4, + TIMER_CLOCK4, -- Clock selected: TCLK5 - Timer_Clock5, + TIMER_CLOCK5, -- Clock selected: XC0 - Xc0, + XC0, -- Clock selected: XC1 - Xc1, + XC1, -- Clock selected: XC2 - Xc2) + XC2) with Size => 3; for CMR0_TCCLKS_Field use - (Timer_Clock1 => 0, - Timer_Clock2 => 1, - Timer_Clock3 => 2, - Timer_Clock4 => 3, - Timer_Clock5 => 4, - Xc0 => 5, - Xc1 => 6, - Xc2 => 7); + (TIMER_CLOCK1 => 0, + TIMER_CLOCK2 => 1, + TIMER_CLOCK3 => 2, + TIMER_CLOCK4 => 3, + TIMER_CLOCK5 => 4, + XC0 => 5, + XC1 => 6, + XC2 => 7); subtype CMR_CLKI_Field is ATSAM3X8E.Bit; -- Burst Signal Selection type CMR0_BURST_Field is (-- The clock is not gated by an external signal. - None, + NONE, -- XC0 is ANDed with the selected clock. - Xc0, + XC0, -- XC1 is ANDed with the selected clock. - Xc1, + XC1, -- XC2 is ANDed with the selected clock. - Xc2) + XC2) with Size => 2; for CMR0_BURST_Field use - (None => 0, - Xc0 => 1, - Xc1 => 2, - Xc2 => 3); + (NONE => 0, + XC0 => 1, + XC1 => 2, + XC2 => 3); subtype CMR_LDBSTOP_Field is ATSAM3X8E.Bit; subtype CMR_LDBDIS_Field is ATSAM3X8E.Bit; @@ -92,19 +91,19 @@ package ATSAM3X8E.TC is -- External Trigger Edge Selection type CMR0_ETRGEDG_Field is (-- The clock is not gated by an external signal. - None, + NONE, -- Rising edge - Rising, + RISING, -- Falling edge - Falling, + FALLING, -- Each edge - Edge) + EDGE) with Size => 2; for CMR0_ETRGEDG_Field use - (None => 0, - Rising => 1, - Falling => 2, - Edge => 3); + (NONE => 0, + RISING => 1, + FALLING => 2, + EDGE => 3); subtype CMR_ABETRG_Field is ATSAM3X8E.Bit; subtype CMR_CPCTRG_Field is ATSAM3X8E.Bit; @@ -113,51 +112,51 @@ package ATSAM3X8E.TC is -- RA Loading Edge Selection type CMR0_LDRA_Field is (-- None - None, + NONE, -- Rising edge of TIOA - Rising, + RISING, -- Falling edge of TIOA - Falling, + FALLING, -- Each edge of TIOA - Edge) + EDGE) with Size => 2; for CMR0_LDRA_Field use - (None => 0, - Rising => 1, - Falling => 2, - Edge => 3); + (NONE => 0, + RISING => 1, + FALLING => 2, + EDGE => 3); -- RB Loading Edge Selection type CMR0_LDRB_Field is (-- None - None, + NONE, -- Rising edge of TIOA - Rising, + RISING, -- Falling edge of TIOA - Falling, + FALLING, -- Each edge of TIOA - Edge) + EDGE) with Size => 2; for CMR0_LDRB_Field use - (None => 0, - Rising => 1, - Falling => 2, - Edge => 3); + (NONE => 0, + RISING => 1, + FALLING => 2, + EDGE => 3); -- Channel Mode Register (channel = 0) type CMR_Register is record -- Clock Selection - TCCLKS : CMR0_TCCLKS_Field := ATSAM3X8E.TC.Timer_Clock1; + TCCLKS : CMR0_TCCLKS_Field := ATSAM3X8E.TC.TIMER_CLOCK1; -- Clock Invert CLKI : CMR_CLKI_Field := 16#0#; -- Burst Signal Selection - BURST : CMR0_BURST_Field := ATSAM3X8E.TC.None; + BURST : CMR0_BURST_Field := ATSAM3X8E.TC.NONE; -- Counter Clock Stopped with RB Loading LDBSTOP : CMR_LDBSTOP_Field := 16#0#; -- Counter Clock Disable with RB Loading LDBDIS : CMR_LDBDIS_Field := 16#0#; -- External Trigger Edge Selection - ETRGEDG : CMR0_ETRGEDG_Field := ATSAM3X8E.TC.None; + ETRGEDG : CMR0_ETRGEDG_Field := ATSAM3X8E.TC.NONE; -- TIOA or TIOB External Trigger Selection ABETRG : CMR_ABETRG_Field := 16#0#; -- unspecified @@ -167,9 +166,9 @@ package ATSAM3X8E.TC is -- Waveform Mode WAVE : CMR_WAVE_Field := 16#0#; -- RA Loading Edge Selection - LDRA : CMR0_LDRA_Field := ATSAM3X8E.TC.None; + LDRA : CMR0_LDRA_Field := ATSAM3X8E.TC.NONE; -- RB Loading Edge Selection - LDRB : CMR0_LDRB_Field := ATSAM3X8E.TC.None; + LDRB : CMR0_LDRB_Field := ATSAM3X8E.TC.NONE; -- unspecified Reserved_20_31 : ATSAM3X8E.UInt12 := 16#0#; end record @@ -194,50 +193,50 @@ package ATSAM3X8E.TC is -- Clock Selection type CMR0_WAVE_EQ_1_TCCLKS_Field is (-- Clock selected: TCLK1 - Timer_Clock1, + TIMER_CLOCK1, -- Clock selected: TCLK2 - Timer_Clock2, + TIMER_CLOCK2, -- Clock selected: TCLK3 - Timer_Clock3, + TIMER_CLOCK3, -- Clock selected: TCLK4 - Timer_Clock4, + TIMER_CLOCK4, -- Clock selected: TCLK5 - Timer_Clock5, + TIMER_CLOCK5, -- Clock selected: XC0 - Xc0, + XC0, -- Clock selected: XC1 - Xc1, + XC1, -- Clock selected: XC2 - Xc2) + XC2) with Size => 3; for CMR0_WAVE_EQ_1_TCCLKS_Field use - (Timer_Clock1 => 0, - Timer_Clock2 => 1, - Timer_Clock3 => 2, - Timer_Clock4 => 3, - Timer_Clock5 => 4, - Xc0 => 5, - Xc1 => 6, - Xc2 => 7); + (TIMER_CLOCK1 => 0, + TIMER_CLOCK2 => 1, + TIMER_CLOCK3 => 2, + TIMER_CLOCK4 => 3, + TIMER_CLOCK5 => 4, + XC0 => 5, + XC1 => 6, + XC2 => 7); subtype TC0_CMR0_WAVE_EQ_1_CLKI_Field is ATSAM3X8E.Bit; -- Burst Signal Selection type CMR0_WAVE_EQ_1_BURST_Field is (-- The clock is not gated by an external signal. - None, + NONE, -- XC0 is ANDed with the selected clock. - Xc0, + XC0, -- XC1 is ANDed with the selected clock. - Xc1, + XC1, -- XC2 is ANDed with the selected clock. - Xc2) + XC2) with Size => 2; for CMR0_WAVE_EQ_1_BURST_Field use - (None => 0, - Xc0 => 1, - Xc1 => 2, - Xc2 => 3); + (NONE => 0, + XC0 => 1, + XC1 => 2, + XC2 => 3); subtype TC0_CMR0_WAVE_EQ_1_CPCSTOP_Field is ATSAM3X8E.Bit; subtype TC0_CMR0_WAVE_EQ_1_CPCDIS_Field is ATSAM3X8E.Bit; @@ -245,232 +244,232 @@ package ATSAM3X8E.TC is -- External Event Edge Selection type CMR0_WAVE_EQ_1_EEVTEDG_Field is (-- None - None, + NONE, -- Rising edge - Rising, + RISING, -- Falling edge - Falling, + FALLING, -- Each edge - Edge) + EDGE) with Size => 2; for CMR0_WAVE_EQ_1_EEVTEDG_Field use - (None => 0, - Rising => 1, - Falling => 2, - Edge => 3); + (NONE => 0, + RISING => 1, + FALLING => 2, + EDGE => 3); -- External Event Selection type CMR0_WAVE_EQ_1_EEVT_Field is (-- TIOB - Tiob, + TIOB, -- XC0 - Xc0, + XC0, -- XC1 - Xc1, + XC1, -- XC2 - Xc2) + XC2) with Size => 2; for CMR0_WAVE_EQ_1_EEVT_Field use - (Tiob => 0, - Xc0 => 1, - Xc1 => 2, - Xc2 => 3); + (TIOB => 0, + XC0 => 1, + XC1 => 2, + XC2 => 3); subtype TC0_CMR0_WAVE_EQ_1_ENETRG_Field is ATSAM3X8E.Bit; -- Waveform Selection type CMR0_WAVE_EQ_1_WAVSEL_Field is (-- UP mode without automatic trigger on RC Compare - Up, + UP, -- UPDOWN mode without automatic trigger on RC Compare - Updown, + UPDOWN, -- UP mode with automatic trigger on RC Compare - Up_Rc, + UP_RC, -- UPDOWN mode with automatic trigger on RC Compare - Updown_Rc) + UPDOWN_RC) with Size => 2; for CMR0_WAVE_EQ_1_WAVSEL_Field use - (Up => 0, - Updown => 1, - Up_Rc => 2, - Updown_Rc => 3); + (UP => 0, + UPDOWN => 1, + UP_RC => 2, + UPDOWN_RC => 3); subtype TC0_CMR0_WAVE_EQ_1_WAVE_Field is ATSAM3X8E.Bit; -- RA Compare Effect on TIOA type CMR0_WAVE_EQ_1_ACPA_Field is (-- None - None, + NONE, -- Set - Set, + SET, -- Clear - Clear, + CLEAR, -- Toggle - Toggle) + TOGGLE) with Size => 2; for CMR0_WAVE_EQ_1_ACPA_Field use - (None => 0, - Set => 1, - Clear => 2, - Toggle => 3); + (NONE => 0, + SET => 1, + CLEAR => 2, + TOGGLE => 3); -- RC Compare Effect on TIOA type CMR0_WAVE_EQ_1_ACPC_Field is (-- None - None, + NONE, -- Set - Set, + SET, -- Clear - Clear, + CLEAR, -- Toggle - Toggle) + TOGGLE) with Size => 2; for CMR0_WAVE_EQ_1_ACPC_Field use - (None => 0, - Set => 1, - Clear => 2, - Toggle => 3); + (NONE => 0, + SET => 1, + CLEAR => 2, + TOGGLE => 3); -- External Event Effect on TIOA type CMR0_WAVE_EQ_1_AEEVT_Field is (-- None - None, + NONE, -- Set - Set, + SET, -- Clear - Clear, + CLEAR, -- Toggle - Toggle) + TOGGLE) with Size => 2; for CMR0_WAVE_EQ_1_AEEVT_Field use - (None => 0, - Set => 1, - Clear => 2, - Toggle => 3); + (NONE => 0, + SET => 1, + CLEAR => 2, + TOGGLE => 3); -- Software Trigger Effect on TIOA type CMR0_WAVE_EQ_1_ASWTRG_Field is (-- None - None, + NONE, -- Set - Set, + SET, -- Clear - Clear, + CLEAR, -- Toggle - Toggle) + TOGGLE) with Size => 2; for CMR0_WAVE_EQ_1_ASWTRG_Field use - (None => 0, - Set => 1, - Clear => 2, - Toggle => 3); + (NONE => 0, + SET => 1, + CLEAR => 2, + TOGGLE => 3); -- RB Compare Effect on TIOB type CMR0_WAVE_EQ_1_BCPB_Field is (-- None - None, + NONE, -- Set - Set, + SET, -- Clear - Clear, + CLEAR, -- Toggle - Toggle) + TOGGLE) with Size => 2; for CMR0_WAVE_EQ_1_BCPB_Field use - (None => 0, - Set => 1, - Clear => 2, - Toggle => 3); + (NONE => 0, + SET => 1, + CLEAR => 2, + TOGGLE => 3); -- RC Compare Effect on TIOB type CMR0_WAVE_EQ_1_BCPC_Field is (-- None - None, + NONE, -- Set - Set, + SET, -- Clear - Clear, + CLEAR, -- Toggle - Toggle) + TOGGLE) with Size => 2; for CMR0_WAVE_EQ_1_BCPC_Field use - (None => 0, - Set => 1, - Clear => 2, - Toggle => 3); + (NONE => 0, + SET => 1, + CLEAR => 2, + TOGGLE => 3); -- External Event Effect on TIOB type CMR0_WAVE_EQ_1_BEEVT_Field is (-- None - None, + NONE, -- Set - Set, + SET, -- Clear - Clear, + CLEAR, -- Toggle - Toggle) + TOGGLE) with Size => 2; for CMR0_WAVE_EQ_1_BEEVT_Field use - (None => 0, - Set => 1, - Clear => 2, - Toggle => 3); + (NONE => 0, + SET => 1, + CLEAR => 2, + TOGGLE => 3); -- Software Trigger Effect on TIOB type CMR0_WAVE_EQ_1_BSWTRG_Field is (-- None - None, + NONE, -- Set - Set, + SET, -- Clear - Clear, + CLEAR, -- Toggle - Toggle) + TOGGLE) with Size => 2; for CMR0_WAVE_EQ_1_BSWTRG_Field use - (None => 0, - Set => 1, - Clear => 2, - Toggle => 3); + (NONE => 0, + SET => 1, + CLEAR => 2, + TOGGLE => 3); -- Channel Mode Register (channel = 0) type TC0_CMR0_WAVE_EQ_1_Register is record -- Clock Selection - TCCLKS : CMR0_WAVE_EQ_1_TCCLKS_Field := ATSAM3X8E.TC.Timer_Clock1; + TCCLKS : CMR0_WAVE_EQ_1_TCCLKS_Field := ATSAM3X8E.TC.TIMER_CLOCK1; -- Clock Invert CLKI : TC0_CMR0_WAVE_EQ_1_CLKI_Field := 16#0#; -- Burst Signal Selection - BURST : CMR0_WAVE_EQ_1_BURST_Field := ATSAM3X8E.TC.None; + BURST : CMR0_WAVE_EQ_1_BURST_Field := ATSAM3X8E.TC.NONE; -- Counter Clock Stopped with RC Compare CPCSTOP : TC0_CMR0_WAVE_EQ_1_CPCSTOP_Field := 16#0#; -- Counter Clock Disable with RC Compare CPCDIS : TC0_CMR0_WAVE_EQ_1_CPCDIS_Field := 16#0#; -- External Event Edge Selection - EEVTEDG : CMR0_WAVE_EQ_1_EEVTEDG_Field := ATSAM3X8E.TC.None; + EEVTEDG : CMR0_WAVE_EQ_1_EEVTEDG_Field := ATSAM3X8E.TC.NONE; -- External Event Selection - EEVT : CMR0_WAVE_EQ_1_EEVT_Field := ATSAM3X8E.TC.Tiob; + EEVT : CMR0_WAVE_EQ_1_EEVT_Field := ATSAM3X8E.TC.TIOB; -- External Event Trigger Enable ENETRG : TC0_CMR0_WAVE_EQ_1_ENETRG_Field := 16#0#; -- Waveform Selection - WAVSEL : CMR0_WAVE_EQ_1_WAVSEL_Field := ATSAM3X8E.TC.Up; + WAVSEL : CMR0_WAVE_EQ_1_WAVSEL_Field := ATSAM3X8E.TC.UP; -- Waveform Mode WAVE : TC0_CMR0_WAVE_EQ_1_WAVE_Field := 16#0#; -- RA Compare Effect on TIOA - ACPA : CMR0_WAVE_EQ_1_ACPA_Field := ATSAM3X8E.TC.None; + ACPA : CMR0_WAVE_EQ_1_ACPA_Field := ATSAM3X8E.TC.NONE; -- RC Compare Effect on TIOA - ACPC : CMR0_WAVE_EQ_1_ACPC_Field := ATSAM3X8E.TC.None; + ACPC : CMR0_WAVE_EQ_1_ACPC_Field := ATSAM3X8E.TC.NONE; -- External Event Effect on TIOA - AEEVT : CMR0_WAVE_EQ_1_AEEVT_Field := ATSAM3X8E.TC.None; + AEEVT : CMR0_WAVE_EQ_1_AEEVT_Field := ATSAM3X8E.TC.NONE; -- Software Trigger Effect on TIOA - ASWTRG : CMR0_WAVE_EQ_1_ASWTRG_Field := ATSAM3X8E.TC.None; + ASWTRG : CMR0_WAVE_EQ_1_ASWTRG_Field := ATSAM3X8E.TC.NONE; -- RB Compare Effect on TIOB - BCPB : CMR0_WAVE_EQ_1_BCPB_Field := ATSAM3X8E.TC.None; + BCPB : CMR0_WAVE_EQ_1_BCPB_Field := ATSAM3X8E.TC.NONE; -- RC Compare Effect on TIOB - BCPC : CMR0_WAVE_EQ_1_BCPC_Field := ATSAM3X8E.TC.None; + BCPC : CMR0_WAVE_EQ_1_BCPC_Field := ATSAM3X8E.TC.NONE; -- External Event Effect on TIOB - BEEVT : CMR0_WAVE_EQ_1_BEEVT_Field := ATSAM3X8E.TC.None; + BEEVT : CMR0_WAVE_EQ_1_BEEVT_Field := ATSAM3X8E.TC.NONE; -- Software Trigger Effect on TIOB - BSWTRG : CMR0_WAVE_EQ_1_BSWTRG_Field := ATSAM3X8E.TC.None; + BSWTRG : CMR0_WAVE_EQ_1_BSWTRG_Field := ATSAM3X8E.TC.NONE; end record with Object_Size => 32, Bit_Order => System.Low_Order_First; @@ -709,50 +708,50 @@ package ATSAM3X8E.TC is -- Clock Selection type CMR1_WAVE_EQ_1_TCCLKS_Field is (-- Clock selected: TCLK1 - Timer_Clock1, + TIMER_CLOCK1, -- Clock selected: TCLK2 - Timer_Clock2, + TIMER_CLOCK2, -- Clock selected: TCLK3 - Timer_Clock3, + TIMER_CLOCK3, -- Clock selected: TCLK4 - Timer_Clock4, + TIMER_CLOCK4, -- Clock selected: TCLK5 - Timer_Clock5, + TIMER_CLOCK5, -- Clock selected: XC0 - Xc0, + XC0, -- Clock selected: XC1 - Xc1, + XC1, -- Clock selected: XC2 - Xc2) + XC2) with Size => 3; for CMR1_WAVE_EQ_1_TCCLKS_Field use - (Timer_Clock1 => 0, - Timer_Clock2 => 1, - Timer_Clock3 => 2, - Timer_Clock4 => 3, - Timer_Clock5 => 4, - Xc0 => 5, - Xc1 => 6, - Xc2 => 7); + (TIMER_CLOCK1 => 0, + TIMER_CLOCK2 => 1, + TIMER_CLOCK3 => 2, + TIMER_CLOCK4 => 3, + TIMER_CLOCK5 => 4, + XC0 => 5, + XC1 => 6, + XC2 => 7); subtype TC0_CMR1_WAVE_EQ_1_CLKI_Field is ATSAM3X8E.Bit; -- Burst Signal Selection type CMR1_WAVE_EQ_1_BURST_Field is (-- The clock is not gated by an external signal. - None, + NONE, -- XC0 is ANDed with the selected clock. - Xc0, + XC0, -- XC1 is ANDed with the selected clock. - Xc1, + XC1, -- XC2 is ANDed with the selected clock. - Xc2) + XC2) with Size => 2; for CMR1_WAVE_EQ_1_BURST_Field use - (None => 0, - Xc0 => 1, - Xc1 => 2, - Xc2 => 3); + (NONE => 0, + XC0 => 1, + XC1 => 2, + XC2 => 3); subtype TC0_CMR1_WAVE_EQ_1_CPCSTOP_Field is ATSAM3X8E.Bit; subtype TC0_CMR1_WAVE_EQ_1_CPCDIS_Field is ATSAM3X8E.Bit; @@ -760,232 +759,232 @@ package ATSAM3X8E.TC is -- External Event Edge Selection type CMR1_WAVE_EQ_1_EEVTEDG_Field is (-- None - None, + NONE, -- Rising edge - Rising, + RISING, -- Falling edge - Falling, + FALLING, -- Each edge - Edge) + EDGE) with Size => 2; for CMR1_WAVE_EQ_1_EEVTEDG_Field use - (None => 0, - Rising => 1, - Falling => 2, - Edge => 3); + (NONE => 0, + RISING => 1, + FALLING => 2, + EDGE => 3); -- External Event Selection type CMR1_WAVE_EQ_1_EEVT_Field is (-- TIOB - Tiob, + TIOB, -- XC0 - Xc0, + XC0, -- XC1 - Xc1, + XC1, -- XC2 - Xc2) + XC2) with Size => 2; for CMR1_WAVE_EQ_1_EEVT_Field use - (Tiob => 0, - Xc0 => 1, - Xc1 => 2, - Xc2 => 3); + (TIOB => 0, + XC0 => 1, + XC1 => 2, + XC2 => 3); subtype TC0_CMR1_WAVE_EQ_1_ENETRG_Field is ATSAM3X8E.Bit; -- Waveform Selection type CMR1_WAVE_EQ_1_WAVSEL_Field is (-- UP mode without automatic trigger on RC Compare - Up, + UP, -- UPDOWN mode without automatic trigger on RC Compare - Updown, + UPDOWN, -- UP mode with automatic trigger on RC Compare - Up_Rc, + UP_RC, -- UPDOWN mode with automatic trigger on RC Compare - Updown_Rc) + UPDOWN_RC) with Size => 2; for CMR1_WAVE_EQ_1_WAVSEL_Field use - (Up => 0, - Updown => 1, - Up_Rc => 2, - Updown_Rc => 3); + (UP => 0, + UPDOWN => 1, + UP_RC => 2, + UPDOWN_RC => 3); subtype TC0_CMR1_WAVE_EQ_1_WAVE_Field is ATSAM3X8E.Bit; -- RA Compare Effect on TIOA type CMR1_WAVE_EQ_1_ACPA_Field is (-- None - None, + NONE, -- Set - Set, + SET, -- Clear - Clear, + CLEAR, -- Toggle - Toggle) + TOGGLE) with Size => 2; for CMR1_WAVE_EQ_1_ACPA_Field use - (None => 0, - Set => 1, - Clear => 2, - Toggle => 3); + (NONE => 0, + SET => 1, + CLEAR => 2, + TOGGLE => 3); -- RC Compare Effect on TIOA type CMR1_WAVE_EQ_1_ACPC_Field is (-- None - None, + NONE, -- Set - Set, + SET, -- Clear - Clear, + CLEAR, -- Toggle - Toggle) + TOGGLE) with Size => 2; for CMR1_WAVE_EQ_1_ACPC_Field use - (None => 0, - Set => 1, - Clear => 2, - Toggle => 3); + (NONE => 0, + SET => 1, + CLEAR => 2, + TOGGLE => 3); -- External Event Effect on TIOA type CMR1_WAVE_EQ_1_AEEVT_Field is (-- None - None, + NONE, -- Set - Set, + SET, -- Clear - Clear, + CLEAR, -- Toggle - Toggle) + TOGGLE) with Size => 2; for CMR1_WAVE_EQ_1_AEEVT_Field use - (None => 0, - Set => 1, - Clear => 2, - Toggle => 3); + (NONE => 0, + SET => 1, + CLEAR => 2, + TOGGLE => 3); -- Software Trigger Effect on TIOA type CMR1_WAVE_EQ_1_ASWTRG_Field is (-- None - None, + NONE, -- Set - Set, + SET, -- Clear - Clear, + CLEAR, -- Toggle - Toggle) + TOGGLE) with Size => 2; for CMR1_WAVE_EQ_1_ASWTRG_Field use - (None => 0, - Set => 1, - Clear => 2, - Toggle => 3); + (NONE => 0, + SET => 1, + CLEAR => 2, + TOGGLE => 3); -- RB Compare Effect on TIOB type CMR1_WAVE_EQ_1_BCPB_Field is (-- None - None, + NONE, -- Set - Set, + SET, -- Clear - Clear, + CLEAR, -- Toggle - Toggle) + TOGGLE) with Size => 2; for CMR1_WAVE_EQ_1_BCPB_Field use - (None => 0, - Set => 1, - Clear => 2, - Toggle => 3); + (NONE => 0, + SET => 1, + CLEAR => 2, + TOGGLE => 3); -- RC Compare Effect on TIOB type CMR1_WAVE_EQ_1_BCPC_Field is (-- None - None, + NONE, -- Set - Set, + SET, -- Clear - Clear, + CLEAR, -- Toggle - Toggle) + TOGGLE) with Size => 2; for CMR1_WAVE_EQ_1_BCPC_Field use - (None => 0, - Set => 1, - Clear => 2, - Toggle => 3); + (NONE => 0, + SET => 1, + CLEAR => 2, + TOGGLE => 3); -- External Event Effect on TIOB type CMR1_WAVE_EQ_1_BEEVT_Field is (-- None - None, + NONE, -- Set - Set, + SET, -- Clear - Clear, + CLEAR, -- Toggle - Toggle) + TOGGLE) with Size => 2; for CMR1_WAVE_EQ_1_BEEVT_Field use - (None => 0, - Set => 1, - Clear => 2, - Toggle => 3); + (NONE => 0, + SET => 1, + CLEAR => 2, + TOGGLE => 3); -- Software Trigger Effect on TIOB type CMR1_WAVE_EQ_1_BSWTRG_Field is (-- None - None, + NONE, -- Set - Set, + SET, -- Clear - Clear, + CLEAR, -- Toggle - Toggle) + TOGGLE) with Size => 2; for CMR1_WAVE_EQ_1_BSWTRG_Field use - (None => 0, - Set => 1, - Clear => 2, - Toggle => 3); + (NONE => 0, + SET => 1, + CLEAR => 2, + TOGGLE => 3); -- Channel Mode Register (channel = 1) type TC0_CMR1_WAVE_EQ_1_Register is record -- Clock Selection - TCCLKS : CMR1_WAVE_EQ_1_TCCLKS_Field := ATSAM3X8E.TC.Timer_Clock1; + TCCLKS : CMR1_WAVE_EQ_1_TCCLKS_Field := ATSAM3X8E.TC.TIMER_CLOCK1; -- Clock Invert CLKI : TC0_CMR1_WAVE_EQ_1_CLKI_Field := 16#0#; -- Burst Signal Selection - BURST : CMR1_WAVE_EQ_1_BURST_Field := ATSAM3X8E.TC.None; + BURST : CMR1_WAVE_EQ_1_BURST_Field := ATSAM3X8E.TC.NONE; -- Counter Clock Stopped with RC Compare CPCSTOP : TC0_CMR1_WAVE_EQ_1_CPCSTOP_Field := 16#0#; -- Counter Clock Disable with RC Compare CPCDIS : TC0_CMR1_WAVE_EQ_1_CPCDIS_Field := 16#0#; -- External Event Edge Selection - EEVTEDG : CMR1_WAVE_EQ_1_EEVTEDG_Field := ATSAM3X8E.TC.None; + EEVTEDG : CMR1_WAVE_EQ_1_EEVTEDG_Field := ATSAM3X8E.TC.NONE; -- External Event Selection - EEVT : CMR1_WAVE_EQ_1_EEVT_Field := ATSAM3X8E.TC.Tiob; + EEVT : CMR1_WAVE_EQ_1_EEVT_Field := ATSAM3X8E.TC.TIOB; -- External Event Trigger Enable ENETRG : TC0_CMR1_WAVE_EQ_1_ENETRG_Field := 16#0#; -- Waveform Selection - WAVSEL : CMR1_WAVE_EQ_1_WAVSEL_Field := ATSAM3X8E.TC.Up; + WAVSEL : CMR1_WAVE_EQ_1_WAVSEL_Field := ATSAM3X8E.TC.UP; -- Waveform Mode WAVE : TC0_CMR1_WAVE_EQ_1_WAVE_Field := 16#0#; -- RA Compare Effect on TIOA - ACPA : CMR1_WAVE_EQ_1_ACPA_Field := ATSAM3X8E.TC.None; + ACPA : CMR1_WAVE_EQ_1_ACPA_Field := ATSAM3X8E.TC.NONE; -- RC Compare Effect on TIOA - ACPC : CMR1_WAVE_EQ_1_ACPC_Field := ATSAM3X8E.TC.None; + ACPC : CMR1_WAVE_EQ_1_ACPC_Field := ATSAM3X8E.TC.NONE; -- External Event Effect on TIOA - AEEVT : CMR1_WAVE_EQ_1_AEEVT_Field := ATSAM3X8E.TC.None; + AEEVT : CMR1_WAVE_EQ_1_AEEVT_Field := ATSAM3X8E.TC.NONE; -- Software Trigger Effect on TIOA - ASWTRG : CMR1_WAVE_EQ_1_ASWTRG_Field := ATSAM3X8E.TC.None; + ASWTRG : CMR1_WAVE_EQ_1_ASWTRG_Field := ATSAM3X8E.TC.NONE; -- RB Compare Effect on TIOB - BCPB : CMR1_WAVE_EQ_1_BCPB_Field := ATSAM3X8E.TC.None; + BCPB : CMR1_WAVE_EQ_1_BCPB_Field := ATSAM3X8E.TC.NONE; -- RC Compare Effect on TIOB - BCPC : CMR1_WAVE_EQ_1_BCPC_Field := ATSAM3X8E.TC.None; + BCPC : CMR1_WAVE_EQ_1_BCPC_Field := ATSAM3X8E.TC.NONE; -- External Event Effect on TIOB - BEEVT : CMR1_WAVE_EQ_1_BEEVT_Field := ATSAM3X8E.TC.None; + BEEVT : CMR1_WAVE_EQ_1_BEEVT_Field := ATSAM3X8E.TC.NONE; -- Software Trigger Effect on TIOB - BSWTRG : CMR1_WAVE_EQ_1_BSWTRG_Field := ATSAM3X8E.TC.None; + BSWTRG : CMR1_WAVE_EQ_1_BSWTRG_Field := ATSAM3X8E.TC.NONE; end record with Object_Size => 32, Bit_Order => System.Low_Order_First; @@ -1013,50 +1012,50 @@ package ATSAM3X8E.TC is -- Clock Selection type CMR2_WAVE_EQ_1_TCCLKS_Field is (-- Clock selected: TCLK1 - Timer_Clock1, + TIMER_CLOCK1, -- Clock selected: TCLK2 - Timer_Clock2, + TIMER_CLOCK2, -- Clock selected: TCLK3 - Timer_Clock3, + TIMER_CLOCK3, -- Clock selected: TCLK4 - Timer_Clock4, + TIMER_CLOCK4, -- Clock selected: TCLK5 - Timer_Clock5, + TIMER_CLOCK5, -- Clock selected: XC0 - Xc0, + XC0, -- Clock selected: XC1 - Xc1, + XC1, -- Clock selected: XC2 - Xc2) + XC2) with Size => 3; for CMR2_WAVE_EQ_1_TCCLKS_Field use - (Timer_Clock1 => 0, - Timer_Clock2 => 1, - Timer_Clock3 => 2, - Timer_Clock4 => 3, - Timer_Clock5 => 4, - Xc0 => 5, - Xc1 => 6, - Xc2 => 7); + (TIMER_CLOCK1 => 0, + TIMER_CLOCK2 => 1, + TIMER_CLOCK3 => 2, + TIMER_CLOCK4 => 3, + TIMER_CLOCK5 => 4, + XC0 => 5, + XC1 => 6, + XC2 => 7); subtype TC0_CMR2_WAVE_EQ_1_CLKI_Field is ATSAM3X8E.Bit; -- Burst Signal Selection type CMR2_WAVE_EQ_1_BURST_Field is (-- The clock is not gated by an external signal. - None, + NONE, -- XC0 is ANDed with the selected clock. - Xc0, + XC0, -- XC1 is ANDed with the selected clock. - Xc1, + XC1, -- XC2 is ANDed with the selected clock. - Xc2) + XC2) with Size => 2; for CMR2_WAVE_EQ_1_BURST_Field use - (None => 0, - Xc0 => 1, - Xc1 => 2, - Xc2 => 3); + (NONE => 0, + XC0 => 1, + XC1 => 2, + XC2 => 3); subtype TC0_CMR2_WAVE_EQ_1_CPCSTOP_Field is ATSAM3X8E.Bit; subtype TC0_CMR2_WAVE_EQ_1_CPCDIS_Field is ATSAM3X8E.Bit; @@ -1064,232 +1063,232 @@ package ATSAM3X8E.TC is -- External Event Edge Selection type CMR2_WAVE_EQ_1_EEVTEDG_Field is (-- None - None, + NONE, -- Rising edge - Rising, + RISING, -- Falling edge - Falling, + FALLING, -- Each edge - Edge) + EDGE) with Size => 2; for CMR2_WAVE_EQ_1_EEVTEDG_Field use - (None => 0, - Rising => 1, - Falling => 2, - Edge => 3); + (NONE => 0, + RISING => 1, + FALLING => 2, + EDGE => 3); -- External Event Selection type CMR2_WAVE_EQ_1_EEVT_Field is (-- TIOB - Tiob, + TIOB, -- XC0 - Xc0, + XC0, -- XC1 - Xc1, + XC1, -- XC2 - Xc2) + XC2) with Size => 2; for CMR2_WAVE_EQ_1_EEVT_Field use - (Tiob => 0, - Xc0 => 1, - Xc1 => 2, - Xc2 => 3); + (TIOB => 0, + XC0 => 1, + XC1 => 2, + XC2 => 3); subtype TC0_CMR2_WAVE_EQ_1_ENETRG_Field is ATSAM3X8E.Bit; -- Waveform Selection type CMR2_WAVE_EQ_1_WAVSEL_Field is (-- UP mode without automatic trigger on RC Compare - Up, + UP, -- UPDOWN mode without automatic trigger on RC Compare - Updown, + UPDOWN, -- UP mode with automatic trigger on RC Compare - Up_Rc, + UP_RC, -- UPDOWN mode with automatic trigger on RC Compare - Updown_Rc) + UPDOWN_RC) with Size => 2; for CMR2_WAVE_EQ_1_WAVSEL_Field use - (Up => 0, - Updown => 1, - Up_Rc => 2, - Updown_Rc => 3); + (UP => 0, + UPDOWN => 1, + UP_RC => 2, + UPDOWN_RC => 3); subtype TC0_CMR2_WAVE_EQ_1_WAVE_Field is ATSAM3X8E.Bit; -- RA Compare Effect on TIOA type CMR2_WAVE_EQ_1_ACPA_Field is (-- None - None, + NONE, -- Set - Set, + SET, -- Clear - Clear, + CLEAR, -- Toggle - Toggle) + TOGGLE) with Size => 2; for CMR2_WAVE_EQ_1_ACPA_Field use - (None => 0, - Set => 1, - Clear => 2, - Toggle => 3); + (NONE => 0, + SET => 1, + CLEAR => 2, + TOGGLE => 3); -- RC Compare Effect on TIOA type CMR2_WAVE_EQ_1_ACPC_Field is (-- None - None, + NONE, -- Set - Set, + SET, -- Clear - Clear, + CLEAR, -- Toggle - Toggle) + TOGGLE) with Size => 2; for CMR2_WAVE_EQ_1_ACPC_Field use - (None => 0, - Set => 1, - Clear => 2, - Toggle => 3); + (NONE => 0, + SET => 1, + CLEAR => 2, + TOGGLE => 3); -- External Event Effect on TIOA type CMR2_WAVE_EQ_1_AEEVT_Field is (-- None - None, + NONE, -- Set - Set, + SET, -- Clear - Clear, + CLEAR, -- Toggle - Toggle) + TOGGLE) with Size => 2; for CMR2_WAVE_EQ_1_AEEVT_Field use - (None => 0, - Set => 1, - Clear => 2, - Toggle => 3); + (NONE => 0, + SET => 1, + CLEAR => 2, + TOGGLE => 3); -- Software Trigger Effect on TIOA type CMR2_WAVE_EQ_1_ASWTRG_Field is (-- None - None, + NONE, -- Set - Set, + SET, -- Clear - Clear, + CLEAR, -- Toggle - Toggle) + TOGGLE) with Size => 2; for CMR2_WAVE_EQ_1_ASWTRG_Field use - (None => 0, - Set => 1, - Clear => 2, - Toggle => 3); + (NONE => 0, + SET => 1, + CLEAR => 2, + TOGGLE => 3); -- RB Compare Effect on TIOB type CMR2_WAVE_EQ_1_BCPB_Field is (-- None - None, + NONE, -- Set - Set, + SET, -- Clear - Clear, + CLEAR, -- Toggle - Toggle) + TOGGLE) with Size => 2; for CMR2_WAVE_EQ_1_BCPB_Field use - (None => 0, - Set => 1, - Clear => 2, - Toggle => 3); + (NONE => 0, + SET => 1, + CLEAR => 2, + TOGGLE => 3); -- RC Compare Effect on TIOB type CMR2_WAVE_EQ_1_BCPC_Field is (-- None - None, + NONE, -- Set - Set, + SET, -- Clear - Clear, + CLEAR, -- Toggle - Toggle) + TOGGLE) with Size => 2; for CMR2_WAVE_EQ_1_BCPC_Field use - (None => 0, - Set => 1, - Clear => 2, - Toggle => 3); + (NONE => 0, + SET => 1, + CLEAR => 2, + TOGGLE => 3); -- External Event Effect on TIOB type CMR2_WAVE_EQ_1_BEEVT_Field is (-- None - None, + NONE, -- Set - Set, + SET, -- Clear - Clear, + CLEAR, -- Toggle - Toggle) + TOGGLE) with Size => 2; for CMR2_WAVE_EQ_1_BEEVT_Field use - (None => 0, - Set => 1, - Clear => 2, - Toggle => 3); + (NONE => 0, + SET => 1, + CLEAR => 2, + TOGGLE => 3); -- Software Trigger Effect on TIOB type CMR2_WAVE_EQ_1_BSWTRG_Field is (-- None - None, + NONE, -- Set - Set, + SET, -- Clear - Clear, + CLEAR, -- Toggle - Toggle) + TOGGLE) with Size => 2; for CMR2_WAVE_EQ_1_BSWTRG_Field use - (None => 0, - Set => 1, - Clear => 2, - Toggle => 3); + (NONE => 0, + SET => 1, + CLEAR => 2, + TOGGLE => 3); -- Channel Mode Register (channel = 2) type TC0_CMR2_WAVE_EQ_1_Register is record -- Clock Selection - TCCLKS : CMR2_WAVE_EQ_1_TCCLKS_Field := ATSAM3X8E.TC.Timer_Clock1; + TCCLKS : CMR2_WAVE_EQ_1_TCCLKS_Field := ATSAM3X8E.TC.TIMER_CLOCK1; -- Clock Invert CLKI : TC0_CMR2_WAVE_EQ_1_CLKI_Field := 16#0#; -- Burst Signal Selection - BURST : CMR2_WAVE_EQ_1_BURST_Field := ATSAM3X8E.TC.None; + BURST : CMR2_WAVE_EQ_1_BURST_Field := ATSAM3X8E.TC.NONE; -- Counter Clock Stopped with RC Compare CPCSTOP : TC0_CMR2_WAVE_EQ_1_CPCSTOP_Field := 16#0#; -- Counter Clock Disable with RC Compare CPCDIS : TC0_CMR2_WAVE_EQ_1_CPCDIS_Field := 16#0#; -- External Event Edge Selection - EEVTEDG : CMR2_WAVE_EQ_1_EEVTEDG_Field := ATSAM3X8E.TC.None; + EEVTEDG : CMR2_WAVE_EQ_1_EEVTEDG_Field := ATSAM3X8E.TC.NONE; -- External Event Selection - EEVT : CMR2_WAVE_EQ_1_EEVT_Field := ATSAM3X8E.TC.Tiob; + EEVT : CMR2_WAVE_EQ_1_EEVT_Field := ATSAM3X8E.TC.TIOB; -- External Event Trigger Enable ENETRG : TC0_CMR2_WAVE_EQ_1_ENETRG_Field := 16#0#; -- Waveform Selection - WAVSEL : CMR2_WAVE_EQ_1_WAVSEL_Field := ATSAM3X8E.TC.Up; + WAVSEL : CMR2_WAVE_EQ_1_WAVSEL_Field := ATSAM3X8E.TC.UP; -- Waveform Mode WAVE : TC0_CMR2_WAVE_EQ_1_WAVE_Field := 16#0#; -- RA Compare Effect on TIOA - ACPA : CMR2_WAVE_EQ_1_ACPA_Field := ATSAM3X8E.TC.None; + ACPA : CMR2_WAVE_EQ_1_ACPA_Field := ATSAM3X8E.TC.NONE; -- RC Compare Effect on TIOA - ACPC : CMR2_WAVE_EQ_1_ACPC_Field := ATSAM3X8E.TC.None; + ACPC : CMR2_WAVE_EQ_1_ACPC_Field := ATSAM3X8E.TC.NONE; -- External Event Effect on TIOA - AEEVT : CMR2_WAVE_EQ_1_AEEVT_Field := ATSAM3X8E.TC.None; + AEEVT : CMR2_WAVE_EQ_1_AEEVT_Field := ATSAM3X8E.TC.NONE; -- Software Trigger Effect on TIOA - ASWTRG : CMR2_WAVE_EQ_1_ASWTRG_Field := ATSAM3X8E.TC.None; + ASWTRG : CMR2_WAVE_EQ_1_ASWTRG_Field := ATSAM3X8E.TC.NONE; -- RB Compare Effect on TIOB - BCPB : CMR2_WAVE_EQ_1_BCPB_Field := ATSAM3X8E.TC.None; + BCPB : CMR2_WAVE_EQ_1_BCPB_Field := ATSAM3X8E.TC.NONE; -- RC Compare Effect on TIOB - BCPC : CMR2_WAVE_EQ_1_BCPC_Field := ATSAM3X8E.TC.None; + BCPC : CMR2_WAVE_EQ_1_BCPC_Field := ATSAM3X8E.TC.NONE; -- External Event Effect on TIOB - BEEVT : CMR2_WAVE_EQ_1_BEEVT_Field := ATSAM3X8E.TC.None; + BEEVT : CMR2_WAVE_EQ_1_BEEVT_Field := ATSAM3X8E.TC.NONE; -- Software Trigger Effect on TIOB - BSWTRG : CMR2_WAVE_EQ_1_BSWTRG_Field := ATSAM3X8E.TC.None; + BSWTRG : CMR2_WAVE_EQ_1_BSWTRG_Field := ATSAM3X8E.TC.NONE; end record with Object_Size => 32, Bit_Order => System.Low_Order_First; @@ -1333,44 +1332,44 @@ package ATSAM3X8E.TC is -- External Clock Signal 0 Selection type BMR_TC0XC0S_Field is (-- Signal connected to XC0: TCLK0 - Tclk0, + TCLK0, -- Signal connected to XC0: TIOA1 - Tioa1, + TIOA1, -- Signal connected to XC0: TIOA2 - Tioa2) + TIOA2) with Size => 2; for BMR_TC0XC0S_Field use - (Tclk0 => 0, - Tioa1 => 2, - Tioa2 => 3); + (TCLK0 => 0, + TIOA1 => 2, + TIOA2 => 3); -- External Clock Signal 1 Selection type BMR_TC1XC1S_Field is (-- Signal connected to XC1: TCLK1 - Tclk1, + TCLK1, -- Signal connected to XC1: TIOA0 - Tioa0, + TIOA0, -- Signal connected to XC1: TIOA2 - Tioa2) + TIOA2) with Size => 2; for BMR_TC1XC1S_Field use - (Tclk1 => 0, - Tioa0 => 2, - Tioa2 => 3); + (TCLK1 => 0, + TIOA0 => 2, + TIOA2 => 3); -- External Clock Signal 2 Selection type BMR_TC2XC2S_Field is (-- Signal connected to XC2: TCLK2 - Tclk2, + TCLK2, -- Signal connected to XC2: TIOA1 - Tioa1, + TIOA1, -- Signal connected to XC2: TIOA2 - Tioa2) + TIOA2) with Size => 2; for BMR_TC2XC2S_Field use - (Tclk2 => 0, - Tioa1 => 2, - Tioa2 => 3); + (TCLK2 => 0, + TIOA1 => 2, + TIOA2 => 3); subtype TC0_BMR_QDEN_Field is ATSAM3X8E.Bit; subtype TC0_BMR_POSEN_Field is ATSAM3X8E.Bit; @@ -1388,11 +1387,11 @@ package ATSAM3X8E.TC is -- Block Mode Register type TC0_BMR_Register is record -- External Clock Signal 0 Selection - TC0XC0S : BMR_TC0XC0S_Field := ATSAM3X8E.TC.Tclk0; + TC0XC0S : BMR_TC0XC0S_Field := ATSAM3X8E.TC.TCLK0; -- External Clock Signal 1 Selection - TC1XC1S : BMR_TC1XC1S_Field := ATSAM3X8E.TC.Tclk1; + TC1XC1S : BMR_TC1XC1S_Field := ATSAM3X8E.TC.TCLK1; -- External Clock Signal 2 Selection - TC2XC2S : BMR_TC2XC2S_Field := ATSAM3X8E.TC.Tclk2; + TC2XC2S : BMR_TC2XC2S_Field := ATSAM3X8E.TC.TCLK2; -- unspecified Reserved_6_7 : ATSAM3X8E.UInt2 := 16#0#; -- Quadrature Decoder ENabled @@ -1616,7 +1615,7 @@ package ATSAM3X8E.TC is type TC0_Disc is (Default, - Wave_Eq_1); + WAVE_EQ_1); -- Timer Counter 0 type TC_Peripheral @@ -1735,7 +1734,7 @@ package ATSAM3X8E.TC is -- Channel Mode Register (channel = 2) CMR2 : aliased CMR_Register; pragma Volatile_Full_Access (CMR2); - when Wave_Eq_1 => + when WAVE_EQ_1 => -- Channel Mode Register (channel = 0) CMR0_WAVE_EQ_1 : aliased TC0_CMR0_WAVE_EQ_1_Register; pragma Volatile_Full_Access (CMR0_WAVE_EQ_1); diff --git a/arduino-due/atsam3x8e/atsam3x8e-trng.ads b/arduino-due/atsam3x8e/atsam3x8e-trng.ads index 9cda455..3b36ac8 100644 --- a/arduino-due/atsam3x8e/atsam3x8e-trng.ads +++ b/arduino-due/atsam3x8e/atsam3x8e-trng.ads @@ -1,4 +1,3 @@ -pragma Ada_2012; pragma Style_Checks (Off); -- This spec has been automatically generated from ATSAM3X8E.svd diff --git a/arduino-due/atsam3x8e/atsam3x8e-twi.ads b/arduino-due/atsam3x8e/atsam3x8e-twi.ads index f3fda91..735f714 100644 --- a/arduino-due/atsam3x8e/atsam3x8e-twi.ads +++ b/arduino-due/atsam3x8e/atsam3x8e-twi.ads @@ -1,4 +1,3 @@ -pragma Ada_2012; pragma Style_Checks (Off); -- This spec has been automatically generated from ATSAM3X8E.svd @@ -61,19 +60,19 @@ package ATSAM3X8E.TWI is -- Internal Device Address Size type MMR_IADRSZ_Field is (-- No internal device address - None, + NONE, -- One-byte internal device address - Val_1_Byte, + Val_1_BYTE, -- Two-byte internal device address - Val_2_Byte, + Val_2_BYTE, -- Three-byte internal device address - Val_3_Byte) + Val_3_BYTE) with Size => 2; for MMR_IADRSZ_Field use - (None => 0, - Val_1_Byte => 1, - Val_2_Byte => 2, - Val_3_Byte => 3); + (NONE => 0, + Val_1_BYTE => 1, + Val_2_BYTE => 2, + Val_3_BYTE => 3); subtype TWI0_MMR_MREAD_Field is ATSAM3X8E.Bit; subtype TWI0_MMR_DADR_Field is ATSAM3X8E.UInt7; @@ -83,7 +82,7 @@ package ATSAM3X8E.TWI is -- unspecified Reserved_0_7 : ATSAM3X8E.Byte := 16#0#; -- Internal Device Address Size - IADRSZ : MMR_IADRSZ_Field := ATSAM3X8E.TWI.None; + IADRSZ : MMR_IADRSZ_Field := ATSAM3X8E.TWI.NONE; -- unspecified Reserved_10_11 : ATSAM3X8E.UInt2 := 16#0#; -- Master Read Direction diff --git a/arduino-due/atsam3x8e/atsam3x8e-uart.ads b/arduino-due/atsam3x8e/atsam3x8e-uart.ads index 7f009bc..200c47c 100644 --- a/arduino-due/atsam3x8e/atsam3x8e-uart.ads +++ b/arduino-due/atsam3x8e/atsam3x8e-uart.ads @@ -1,4 +1,3 @@ -pragma Ada_2012; pragma Style_Checks (Off); -- This spec has been automatically generated from ATSAM3X8E.svd @@ -61,50 +60,50 @@ package ATSAM3X8E.UART is -- Parity Type type MR_PAR_Field is (-- Even parity - Even, + EVEN, -- Odd parity - Odd, + ODD, -- Space: parity forced to 0 - Space, + SPACE, -- Mark: parity forced to 1 - Mark, + MARK, -- No parity - No) + NO) with Size => 3; for MR_PAR_Field use - (Even => 0, - Odd => 1, - Space => 2, - Mark => 3, - No => 4); + (EVEN => 0, + ODD => 1, + SPACE => 2, + MARK => 3, + NO => 4); -- Channel Mode type MR_CHMODE_Field is (-- Normal Mode - Normal, + NORMAL, -- Automatic Echo - Automatic, + AUTOMATIC, -- Local Loopback - Local_Loopback, + LOCAL_LOOPBACK, -- Remote Loopback - Remote_Loopback) + REMOTE_LOOPBACK) with Size => 2; for MR_CHMODE_Field use - (Normal => 0, - Automatic => 1, - Local_Loopback => 2, - Remote_Loopback => 3); + (NORMAL => 0, + AUTOMATIC => 1, + LOCAL_LOOPBACK => 2, + REMOTE_LOOPBACK => 3); -- Mode Register type UART_MR_Register is record -- unspecified Reserved_0_8 : ATSAM3X8E.UInt9 := 16#0#; -- Parity Type - PAR : MR_PAR_Field := ATSAM3X8E.UART.Even; + PAR : MR_PAR_Field := ATSAM3X8E.UART.EVEN; -- unspecified Reserved_12_13 : ATSAM3X8E.UInt2 := 16#0#; -- Channel Mode - CHMODE : MR_CHMODE_Field := ATSAM3X8E.UART.Normal; + CHMODE : MR_CHMODE_Field := ATSAM3X8E.UART.NORMAL; -- unspecified Reserved_16_31 : ATSAM3X8E.UInt16 := 16#0#; end record diff --git a/arduino-due/atsam3x8e/atsam3x8e-uotghs.ads b/arduino-due/atsam3x8e/atsam3x8e-uotghs.ads index 947025a..4c44ae5 100644 --- a/arduino-due/atsam3x8e/atsam3x8e-uotghs.ads +++ b/arduino-due/atsam3x8e/atsam3x8e-uotghs.ads @@ -1,4 +1,3 @@ -pragma Ada_2012; pragma Style_Checks (Off); -- This spec has been automatically generated from ATSAM3X8E.svd @@ -24,20 +23,20 @@ package ATSAM3X8E.UOTGHS is type DEVCTRL_SPDCONF_Field is (-- The peripheral starts in full-speed mode and performs a high-speed reset to -- switch to the high-speed mode if the host is high-speed capable. - Normal, + NORMAL, -- For a better consumption, if high-speed is not needed. - Low_Power, + LOW_POWER, -- Forced high speed. - High_Speed, + HIGH_SPEED, -- The peripheral remains in full-speed mode whatever the host speed -- capability. - Forced_Fs) + FORCED_FS) with Size => 2; for DEVCTRL_SPDCONF_Field use - (Normal => 0, - Low_Power => 1, - High_Speed => 2, - Forced_Fs => 3); + (NORMAL => 0, + LOW_POWER => 1, + HIGH_SPEED => 2, + FORCED_FS => 3); subtype UOTGHS_DEVCTRL_LS_Field is ATSAM3X8E.Bit; subtype UOTGHS_DEVCTRL_TSTJ_Field is ATSAM3X8E.Bit; @@ -56,7 +55,7 @@ package ATSAM3X8E.UOTGHS is -- Remote Wake-Up RMWKUP : UOTGHS_DEVCTRL_RMWKUP_Field := 16#0#; -- Mode Configuration - SPDCONF : DEVCTRL_SPDCONF_Field := ATSAM3X8E.UOTGHS.Normal; + SPDCONF : DEVCTRL_SPDCONF_Field := ATSAM3X8E.UOTGHS.NORMAL; -- Low-Speed Mode Force LS : UOTGHS_DEVCTRL_LS_Field := 16#0#; -- Test mode J @@ -743,95 +742,95 @@ package ATSAM3X8E.UOTGHS is -- Endpoint Banks type DEVEPTCFG_EPBK_Field is (-- Single-bank endpoint - Val_1_Bank, + Val_1_BANK, -- Double-bank endpoint - Val_2_Bank, + Val_2_BANK, -- Triple-bank endpoint - Val_3_Bank) + Val_3_BANK) with Size => 2; for DEVEPTCFG_EPBK_Field use - (Val_1_Bank => 0, - Val_2_Bank => 1, - Val_3_Bank => 2); + (Val_1_BANK => 0, + Val_2_BANK => 1, + Val_3_BANK => 2); -- Endpoint Size type DEVEPTCFG_EPSIZE_Field is (-- 8 bytes - Val_8_Byte, + Val_8_BYTE, -- 16 bytes - Val_16_Byte, + Val_16_BYTE, -- 32 bytes - Val_32_Byte, + Val_32_BYTE, -- 64 bytes - Val_64_Byte, + Val_64_BYTE, -- 128 bytes - Val_128_Byte, + Val_128_BYTE, -- 256 bytes - Val_256_Byte, + Val_256_BYTE, -- 512 bytes - Val_512_Byte, + Val_512_BYTE, -- 1024 bytes - Val_1024_Byte) + Val_1024_BYTE) with Size => 3; for DEVEPTCFG_EPSIZE_Field use - (Val_8_Byte => 0, - Val_16_Byte => 1, - Val_32_Byte => 2, - Val_64_Byte => 3, - Val_128_Byte => 4, - Val_256_Byte => 5, - Val_512_Byte => 6, - Val_1024_Byte => 7); + (Val_8_BYTE => 0, + Val_16_BYTE => 1, + Val_32_BYTE => 2, + Val_64_BYTE => 3, + Val_128_BYTE => 4, + Val_256_BYTE => 5, + Val_512_BYTE => 6, + Val_1024_BYTE => 7); -- Endpoint Direction type DEVEPTCFG_EPDIR_Field is (-- The endpoint direction is OUT. - Out_k, + OUT_k, -- The endpoint direction is IN (nor for control endpoints). - In_k) + IN_k) with Size => 1; for DEVEPTCFG_EPDIR_Field use - (Out_k => 0, - In_k => 1); + (OUT_k => 0, + IN_k => 1); subtype UOTGHS_DEVEPTCFG_AUTOSW_Field is ATSAM3X8E.Bit; -- Endpoint Type type DEVEPTCFG_EPTYPE_Field is (-- Control - Ctrl, + CTRL, -- Isochronous - Iso, + ISO, -- Bulk - Blk, + BLK, -- Interrupt - Intrpt) + INTRPT) with Size => 2; for DEVEPTCFG_EPTYPE_Field use - (Ctrl => 0, - Iso => 1, - Blk => 2, - Intrpt => 3); + (CTRL => 0, + ISO => 1, + BLK => 2, + INTRPT => 3); -- Number of transaction per microframe for isochronous endpoint type DEVEPTCFG_NBTRANS_Field is (-- reserved to endpoint that does not have the high-bandwidth isochronous -- capability. - Val_0_Trans, + Val_0_TRANS, -- default value: one transaction per micro-frame. - Val_1_Trans, + Val_1_TRANS, -- 2 transactions per micro-frame. This endpoint should be configured as -- double-bank. - Val_2_Trans, + Val_2_TRANS, -- 3 transactions per micro-frame. This endpoint should be configured as -- triple-bank. - Val_3_Trans) + Val_3_TRANS) with Size => 2; for DEVEPTCFG_NBTRANS_Field use - (Val_0_Trans => 0, - Val_1_Trans => 1, - Val_2_Trans => 2, - Val_3_Trans => 3); + (Val_0_TRANS => 0, + Val_1_TRANS => 1, + Val_2_TRANS => 2, + Val_3_TRANS => 3); -- Device Endpoint Configuration Register (n = 0) type UOTGHS_DEVEPTCFG_Register is record @@ -840,22 +839,22 @@ package ATSAM3X8E.UOTGHS is -- Endpoint Memory Allocate ALLOC : UOTGHS_DEVEPTCFG_ALLOC_Field := 16#0#; -- Endpoint Banks - EPBK : DEVEPTCFG_EPBK_Field := ATSAM3X8E.UOTGHS.Val_1_Bank; + EPBK : DEVEPTCFG_EPBK_Field := ATSAM3X8E.UOTGHS.Val_1_BANK; -- Endpoint Size - EPSIZE : DEVEPTCFG_EPSIZE_Field := ATSAM3X8E.UOTGHS.Val_8_Byte; + EPSIZE : DEVEPTCFG_EPSIZE_Field := ATSAM3X8E.UOTGHS.Val_8_BYTE; -- unspecified Reserved_7_7 : ATSAM3X8E.Bit := 16#0#; -- Endpoint Direction - EPDIR : DEVEPTCFG_EPDIR_Field := ATSAM3X8E.UOTGHS.Out_k; + EPDIR : DEVEPTCFG_EPDIR_Field := ATSAM3X8E.UOTGHS.OUT_k; -- Automatic Switch AUTOSW : UOTGHS_DEVEPTCFG_AUTOSW_Field := 16#0#; -- unspecified Reserved_10_10 : ATSAM3X8E.Bit := 16#0#; -- Endpoint Type - EPTYPE : DEVEPTCFG_EPTYPE_Field := ATSAM3X8E.UOTGHS.Ctrl; + EPTYPE : DEVEPTCFG_EPTYPE_Field := ATSAM3X8E.UOTGHS.CTRL; -- Number of transaction per microframe for isochronous endpoint NBTRANS : DEVEPTCFG_NBTRANS_Field := - ATSAM3X8E.UOTGHS.Val_0_Trans; + ATSAM3X8E.UOTGHS.Val_0_TRANS; -- unspecified Reserved_15_31 : ATSAM3X8E.UInt17 := 16#0#; end record @@ -887,50 +886,50 @@ package ATSAM3X8E.UOTGHS is -- Data Toggle Sequence type DEVEPTISR_DTSEQ_Field is (-- Data0 toggle sequence - Data0, + DATA0, -- Data1 toggle sequence - Data1, + DATA1, -- Reserved for high-bandwidth isochronous endpoint - Data2, + DATA2, -- Reserved for high-bandwidth isochronous endpoint - Mdata) + MDATA) with Size => 2; for DEVEPTISR_DTSEQ_Field use - (Data0 => 0, - Data1 => 1, - Data2 => 2, - Mdata => 3); + (DATA0 => 0, + DATA1 => 1, + DATA2 => 2, + MDATA => 3); -- Number of Busy Banks type DEVEPTISR_NBUSYBK_Field is (-- 0 busy bank (all banks free) - Val_0_Busy, + Val_0_BUSY, -- 1 busy bank - Val_1_Busy, + Val_1_BUSY, -- 2 busy banks - Val_2_Busy, + Val_2_BUSY, -- 3 busy banks - Val_3_Busy) + Val_3_BUSY) with Size => 2; for DEVEPTISR_NBUSYBK_Field use - (Val_0_Busy => 0, - Val_1_Busy => 1, - Val_2_Busy => 2, - Val_3_Busy => 3); + (Val_0_BUSY => 0, + Val_1_BUSY => 1, + Val_2_BUSY => 2, + Val_3_BUSY => 3); -- Current Bank type DEVEPTISR_CURRBK_Field is (-- Current bank is bank0 - Bank0, + BANK0, -- Current bank is bank1 - Bank1, + BANK1, -- Current bank is bank2 - Bank2) + BANK2) with Size => 2; for DEVEPTISR_CURRBK_Field use - (Bank0 => 0, - Bank1 => 1, - Bank2 => 2); + (BANK0 => 0, + BANK1 => 1, + BANK2 => 2); subtype UOTGHS_DEVEPTISR_RWALL_Field is ATSAM3X8E.Bit; subtype UOTGHS_DEVEPTISR_CTRLDIR_Field is ATSAM3X8E.Bit; @@ -1422,20 +1421,20 @@ package ATSAM3X8E.UOTGHS is (-- The host starts in full-speed mode and performs a high-speed reset to -- switch to the high-speed mode if the downstream peripheral is high-speed -- capable. - Normal, + NORMAL, -- For a better consumption, if high-speed is not needed. - Low_Power, + LOW_POWER, -- Forced high speed. - High_Speed, + HIGH_SPEED, -- The host remains to full-speed mode whatever the peripheral speed -- capability. - Forced_Fs) + FORCED_FS) with Size => 2; for HSTCTRL_SPDCONF_Field use - (Normal => 0, - Low_Power => 1, - High_Speed => 2, - Forced_Fs => 3); + (NORMAL => 0, + LOW_POWER => 1, + HIGH_SPEED => 2, + FORCED_FS => 3); -- Host General Control Register type UOTGHS_HSTCTRL_Register is record @@ -1450,7 +1449,7 @@ package ATSAM3X8E.UOTGHS is -- unspecified Reserved_11_11 : ATSAM3X8E.Bit := 16#0#; -- Mode Configuration - SPDCONF : HSTCTRL_SPDCONF_Field := ATSAM3X8E.UOTGHS.Normal; + SPDCONF : HSTCTRL_SPDCONF_Field := ATSAM3X8E.UOTGHS.NORMAL; -- unspecified Reserved_14_31 : ATSAM3X8E.UInt18 := 16#0#; end record @@ -2220,78 +2219,78 @@ package ATSAM3X8E.UOTGHS is -- Pipe Banks type HSTPIPCFG_PBK_Field is (-- Single-bank pipe - Val_1_Bank, + Val_1_BANK, -- Double-bank pipe - Val_2_Bank, + Val_2_BANK, -- Triple-bank pipe - Val_3_Bank) + Val_3_BANK) with Size => 2; for HSTPIPCFG_PBK_Field use - (Val_1_Bank => 0, - Val_2_Bank => 1, - Val_3_Bank => 2); + (Val_1_BANK => 0, + Val_2_BANK => 1, + Val_3_BANK => 2); -- Pipe Size type HSTPIPCFG_PSIZE_Field is (-- 8 bytes - Val_8_Byte, + Val_8_BYTE, -- 16 bytes - Val_16_Byte, + Val_16_BYTE, -- 32 bytes - Val_32_Byte, + Val_32_BYTE, -- 64 bytes - Val_64_Byte, + Val_64_BYTE, -- 128 bytes - Val_128_Byte, + Val_128_BYTE, -- 256 bytes - Val_256_Byte, + Val_256_BYTE, -- 512 bytes - Val_512_Byte, + Val_512_BYTE, -- 1024 bytes - Val_1024_Byte) + Val_1024_BYTE) with Size => 3; for HSTPIPCFG_PSIZE_Field use - (Val_8_Byte => 0, - Val_16_Byte => 1, - Val_32_Byte => 2, - Val_64_Byte => 3, - Val_128_Byte => 4, - Val_256_Byte => 5, - Val_512_Byte => 6, - Val_1024_Byte => 7); + (Val_8_BYTE => 0, + Val_16_BYTE => 1, + Val_32_BYTE => 2, + Val_64_BYTE => 3, + Val_128_BYTE => 4, + Val_256_BYTE => 5, + Val_512_BYTE => 6, + Val_1024_BYTE => 7); -- Pipe Token type HSTPIPCFG_PTOKEN_Field is (-- SETUP - Setup, + SETUP, -- IN - In_k, + IN_k, -- OUT - Out_k) + OUT_k) with Size => 2; for HSTPIPCFG_PTOKEN_Field use - (Setup => 0, - In_k => 1, - Out_k => 2); + (SETUP => 0, + IN_k => 1, + OUT_k => 2); subtype UOTGHS_HSTPIPCFG_AUTOSW_Field is ATSAM3X8E.Bit; -- Pipe Type type HSTPIPCFG_PTYPE_Field is (-- Control - Ctrl, + CTRL, -- Isochronous - Iso, + ISO, -- Bulk - Blk, + BLK, -- Interrupt - Intrpt) + INTRPT) with Size => 2; for HSTPIPCFG_PTYPE_Field use - (Ctrl => 0, - Iso => 1, - Blk => 2, - Intrpt => 3); + (CTRL => 0, + ISO => 1, + BLK => 2, + INTRPT => 3); subtype UOTGHS_HSTPIPCFG_PEPNUM_Field is ATSAM3X8E.UInt4; subtype UOTGHS_HSTPIPCFG_INTFRQ_Field is ATSAM3X8E.Byte; @@ -2303,19 +2302,19 @@ package ATSAM3X8E.UOTGHS is -- Pipe Memory Allocate ALLOC : UOTGHS_HSTPIPCFG_ALLOC_Field := 16#0#; -- Pipe Banks - PBK : HSTPIPCFG_PBK_Field := ATSAM3X8E.UOTGHS.Val_1_Bank; + PBK : HSTPIPCFG_PBK_Field := ATSAM3X8E.UOTGHS.Val_1_BANK; -- Pipe Size - PSIZE : HSTPIPCFG_PSIZE_Field := ATSAM3X8E.UOTGHS.Val_8_Byte; + PSIZE : HSTPIPCFG_PSIZE_Field := ATSAM3X8E.UOTGHS.Val_8_BYTE; -- unspecified Reserved_7_7 : ATSAM3X8E.Bit := 16#0#; -- Pipe Token - PTOKEN : HSTPIPCFG_PTOKEN_Field := ATSAM3X8E.UOTGHS.Setup; + PTOKEN : HSTPIPCFG_PTOKEN_Field := ATSAM3X8E.UOTGHS.SETUP; -- Automatic Switch AUTOSW : UOTGHS_HSTPIPCFG_AUTOSW_Field := 16#0#; -- unspecified Reserved_11_11 : ATSAM3X8E.Bit := 16#0#; -- Pipe Type - PTYPE : HSTPIPCFG_PTYPE_Field := ATSAM3X8E.UOTGHS.Ctrl; + PTYPE : HSTPIPCFG_PTYPE_Field := ATSAM3X8E.UOTGHS.CTRL; -- unspecified Reserved_14_15 : ATSAM3X8E.UInt2 := 16#0#; -- Pipe Endpoint Number @@ -2355,44 +2354,44 @@ package ATSAM3X8E.UOTGHS is -- Data Toggle Sequence type HSTPIPISR_DTSEQ_Field is (-- Data0 toggle sequence - Data0, + DATA0, -- Data1 toggle sequence - Data1) + DATA1) with Size => 2; for HSTPIPISR_DTSEQ_Field use - (Data0 => 0, - Data1 => 1); + (DATA0 => 0, + DATA1 => 1); -- Number of Busy Banks type HSTPIPISR_NBUSYBK_Field is (-- 0 busy bank (all banks free) - Val_0_Busy, + Val_0_BUSY, -- 1 busy bank - Val_1_Busy, + Val_1_BUSY, -- 2 busy banks - Val_2_Busy, + Val_2_BUSY, -- 3 busy banks - Val_3_Busy) + Val_3_BUSY) with Size => 2; for HSTPIPISR_NBUSYBK_Field use - (Val_0_Busy => 0, - Val_1_Busy => 1, - Val_2_Busy => 2, - Val_3_Busy => 3); + (Val_0_BUSY => 0, + Val_1_BUSY => 1, + Val_2_BUSY => 2, + Val_3_BUSY => 3); -- Current Bank type HSTPIPISR_CURRBK_Field is (-- Current bank is bank0 - Bank0, + BANK0, -- Current bank is bank1 - Bank1, + BANK1, -- Current bank is bank2 - Bank2) + BANK2) with Size => 2; for HSTPIPISR_CURRBK_Field use - (Bank0 => 0, - Bank1 => 1, - Bank2 => 2); + (BANK0 => 0, + BANK1 => 1, + BANK2 => 2); subtype UOTGHS_HSTPIPISR_RWALL_Field is ATSAM3X8E.Bit; subtype UOTGHS_HSTPIPISR_CFGOK_Field is ATSAM3X8E.Bit; @@ -2928,24 +2927,24 @@ package ATSAM3X8E.UOTGHS is -- UOTGID Pin Enable type CTRL_UIDE_Field is (-- The USB mode (device/host) is selected from the UIMOD bit. - Uimod, + UIMOD, -- The USB mode (device/host) is selected from the UOTGID input pin. - Uotgid) + UOTGID) with Size => 1; for CTRL_UIDE_Field use - (Uimod => 0, - Uotgid => 1); + (UIMOD => 0, + UOTGID => 1); -- UOTGHS Mode type CTRL_UIMOD_Field is (-- The module is in USB host mode. - Host, + HOST, -- The module is in USB device mode. - Device) + DEVICE) with Size => 1; for CTRL_UIMOD_Field use - (Host => 0, - Device => 1); + (HOST => 0, + DEVICE => 1); -- General Control Register type UOTGHS_CTRL_Register is record @@ -2992,9 +2991,9 @@ package ATSAM3X8E.UOTGHS is -- unspecified Reserved_23_23 : ATSAM3X8E.Bit := 16#0#; -- UOTGID Pin Enable - UIDE : CTRL_UIDE_Field := ATSAM3X8E.UOTGHS.Uotgid; + UIDE : CTRL_UIDE_Field := ATSAM3X8E.UOTGHS.UOTGID; -- UOTGHS Mode - UIMOD : CTRL_UIMOD_Field := ATSAM3X8E.UOTGHS.Device; + UIMOD : CTRL_UIMOD_Field := ATSAM3X8E.UOTGHS.DEVICE; -- unspecified Reserved_26_31 : ATSAM3X8E.UInt6 := 16#0#; end record @@ -3042,16 +3041,16 @@ package ATSAM3X8E.UOTGHS is -- Speed Status type SR_SPEED_Field is (-- Full-Speed mode - Full_Speed, + FULL_SPEED, -- High-Speed mode - High_Speed, + HIGH_SPEED, -- Low-Speed mode - Low_Speed) + LOW_SPEED) with Size => 2; for SR_SPEED_Field use - (Full_Speed => 0, - High_Speed => 1, - Low_Speed => 2); + (FULL_SPEED => 0, + HIGH_SPEED => 1, + LOW_SPEED => 2); subtype UOTGHS_SR_CLKUSABLE_Field is ATSAM3X8E.Bit; @@ -3213,63 +3212,63 @@ package ATSAM3X8E.UOTGHS is -- Dual Role Device State type FSM_DRDSTATE_Field is (-- This is the start state for A-devices (when the ID pin is 0) - A_Idlestate, + A_IDLESTATE, -- In this state, the A-device waits for the voltage on VBus to rise above the -- A-device VBus Valid threshold (4.4 V). - A_Wait_Vrise, + A_WAIT_VRISE, -- In this state, the A-device waits for the B-device to signal a connection. - A_Wait_Bcon, + A_WAIT_BCON, -- In this state, the A-device that operates in Host mode is operational. - A_Host, + A_HOST, -- The A-device operating as a host is in the suspend mode. - A_Suspend, + A_SUSPEND, -- The A-device operates as a peripheral. - A_Peripheral, + A_PERIPHERAL, -- In this state, the A-device waits for the voltage on VBus to drop below the -- A-device Session Valid threshold (1.4 V). - A_Wait_Vfall, + A_WAIT_VFALL, -- In this state, the A-device waits for recovery of the over-current -- condition that caused it to enter this state. - A_Vbus_Err, + A_VBUS_ERR, -- In this state, the A-device waits for the data USB line to discharge (100 -- us). - A_Wait_Discharge, + A_WAIT_DISCHARGE, -- This is the start state for B-device (when the ID pin is 1). - B_Idle, + B_IDLE, -- In this state, the B-device acts as the peripheral. - B_Peripheral, + B_PERIPHERAL, -- In this state, the B-device is in suspend mode and waits until 3 ms before -- initiating the HNP protocol if requested. - B_Wait_Begin_Hnp, + B_WAIT_BEGIN_HNP, -- In this state, the B-device waits for the data USB line to discharge (100 -- us) before becoming Host. - B_Wait_Discharge, + B_WAIT_DISCHARGE, -- In this state, the B-device waits for the A-device to signal a connect -- before becoming B-Host. - B_Wait_Acon, + B_WAIT_ACON, -- In this state, the B-device acts as the Host. - B_Host, + B_HOST, -- In this state, the B-device attempts to start a session using the SRP -- protocol. - B_Srp_Init) + B_SRP_INIT) with Size => 4; for FSM_DRDSTATE_Field use - (A_Idlestate => 0, - A_Wait_Vrise => 1, - A_Wait_Bcon => 2, - A_Host => 3, - A_Suspend => 4, - A_Peripheral => 5, - A_Wait_Vfall => 6, - A_Vbus_Err => 7, - A_Wait_Discharge => 8, - B_Idle => 9, - B_Peripheral => 10, - B_Wait_Begin_Hnp => 11, - B_Wait_Discharge => 12, - B_Wait_Acon => 13, - B_Host => 14, - B_Srp_Init => 15); + (A_IDLESTATE => 0, + A_WAIT_VRISE => 1, + A_WAIT_BCON => 2, + A_HOST => 3, + A_SUSPEND => 4, + A_PERIPHERAL => 5, + A_WAIT_VFALL => 6, + A_VBUS_ERR => 7, + A_WAIT_DISCHARGE => 8, + B_IDLE => 9, + B_PERIPHERAL => 10, + B_WAIT_BEGIN_HNP => 11, + B_WAIT_DISCHARGE => 12, + B_WAIT_ACON => 13, + B_HOST => 14, + B_SRP_INIT => 15); -- General Finite State Machine Register type UOTGHS_FSM_Register is record diff --git a/arduino-due/atsam3x8e/atsam3x8e-usart.ads b/arduino-due/atsam3x8e/atsam3x8e-usart.ads index 8379af3..c98e8b4 100644 --- a/arduino-due/atsam3x8e/atsam3x8e-usart.ads +++ b/arduino-due/atsam3x8e/atsam3x8e-usart.ads @@ -1,4 +1,3 @@ -pragma Ada_2012; pragma Style_Checks (Off); -- This spec has been automatically generated from ATSAM3X8E.svd @@ -161,124 +160,124 @@ package ATSAM3X8E.USART is -- USART Mode of Operation type MR_USART_MODE_Field is (-- Normal mode - Normal, + NORMAL, -- RS485 - Rs485, + RS485, -- Hardware Handshaking - Hw_Handshaking, + HW_HANDSHAKING, -- IS07816 Protocol: T = 0 - Is07816_T_0, + IS07816_T_0, -- IS07816 Protocol: T = 1 - Is07816_T_1, + IS07816_T_1, -- IrDA - Irda, + IRDA, -- LIN Master - Lin_Master, + LIN_MASTER, -- LIN Slave - Lin_Slave, + LIN_SLAVE, -- SPI Master - Spi_Master, + SPI_MASTER, -- SPI Slave - Spi_Slave) + SPI_SLAVE) with Size => 4; for MR_USART_MODE_Field use - (Normal => 0, - Rs485 => 1, - Hw_Handshaking => 2, - Is07816_T_0 => 4, - Is07816_T_1 => 6, - Irda => 8, - Lin_Master => 10, - Lin_Slave => 11, - Spi_Master => 14, - Spi_Slave => 15); + (NORMAL => 0, + RS485 => 1, + HW_HANDSHAKING => 2, + IS07816_T_0 => 4, + IS07816_T_1 => 6, + IRDA => 8, + LIN_MASTER => 10, + LIN_SLAVE => 11, + SPI_MASTER => 14, + SPI_SLAVE => 15); -- Clock Selection type MR_USCLKS_Field is (-- Master Clock MCK is selected - Mck, + MCK, -- Internal Clock Divided MCK/DIV (DIV=8) is selected - Div, + DIV, -- Serial Clock SLK is selected - Sck) + SCK) with Size => 2; for MR_USCLKS_Field use - (Mck => 0, - Div => 1, - Sck => 3); + (MCK => 0, + DIV => 1, + SCK => 3); -- Character Length. type MR_CHRL_Field is (-- Character length is 5 bits - Val_5_Bit, + Val_5_BIT, -- Character length is 6 bits - Val_6_Bit, + Val_6_BIT, -- Character length is 7 bits - Val_7_Bit, + Val_7_BIT, -- Character length is 8 bits - Val_8_Bit) + Val_8_BIT) with Size => 2; for MR_CHRL_Field use - (Val_5_Bit => 0, - Val_6_Bit => 1, - Val_7_Bit => 2, - Val_8_Bit => 3); + (Val_5_BIT => 0, + Val_6_BIT => 1, + Val_7_BIT => 2, + Val_8_BIT => 3); subtype USART0_MR_SYNC_Field is ATSAM3X8E.Bit; -- Parity Type type MR_PAR_Field is (-- Even parity - Even, + EVEN, -- Odd parity - Odd, + ODD, -- Parity forced to 0 (Space) - Space, + SPACE, -- Parity forced to 1 (Mark) - Mark, + MARK, -- No parity - No, + NO, -- Multidrop mode - Multidrop) + MULTIDROP) with Size => 3; for MR_PAR_Field use - (Even => 0, - Odd => 1, - Space => 2, - Mark => 3, - No => 4, - Multidrop => 6); + (EVEN => 0, + ODD => 1, + SPACE => 2, + MARK => 3, + NO => 4, + MULTIDROP => 6); -- Number of Stop Bits type MR_NBSTOP_Field is (-- 1 stop bit - Val_1_Bit, + Val_1_BIT, -- 1.5 stop bit (SYNC = 0) or reserved (SYNC = 1) - Val_1_5_Bit, + Val_1_5_BIT, -- 2 stop bits - Val_2_Bit) + Val_2_BIT) with Size => 2; for MR_NBSTOP_Field use - (Val_1_Bit => 0, - Val_1_5_Bit => 1, - Val_2_Bit => 2); + (Val_1_BIT => 0, + Val_1_5_BIT => 1, + Val_2_BIT => 2); -- Channel Mode type MR_CHMODE_Field is (-- Normal Mode - Normal, + NORMAL, -- Automatic Echo. Receiver input is connected to the TXD pin. - Automatic, + AUTOMATIC, -- Local Loopback. Transmitter output is connected to the Receiver Input. - Local_Loopback, + LOCAL_LOOPBACK, -- Remote Loopback. RXD pin is internally connected to the TXD pin. - Remote_Loopback) + REMOTE_LOOPBACK) with Size => 2; for MR_CHMODE_Field use - (Normal => 0, - Automatic => 1, - Local_Loopback => 2, - Remote_Loopback => 3); + (NORMAL => 0, + AUTOMATIC => 1, + LOCAL_LOOPBACK => 2, + REMOTE_LOOPBACK => 3); subtype USART0_MR_MSBF_Field is ATSAM3X8E.Bit; subtype USART0_MR_MODE9_Field is ATSAM3X8E.Bit; @@ -297,19 +296,19 @@ package ATSAM3X8E.USART is -- Mode Register type USART0_MR_Register is record -- USART Mode of Operation - USART_MODE : MR_USART_MODE_Field := ATSAM3X8E.USART.Normal; + USART_MODE : MR_USART_MODE_Field := ATSAM3X8E.USART.NORMAL; -- Clock Selection - USCLKS : MR_USCLKS_Field := ATSAM3X8E.USART.Mck; + USCLKS : MR_USCLKS_Field := ATSAM3X8E.USART.MCK; -- Character Length. - CHRL : MR_CHRL_Field := ATSAM3X8E.USART.Val_5_Bit; + CHRL : MR_CHRL_Field := ATSAM3X8E.USART.Val_5_BIT; -- Synchronous Mode Select SYNC : USART0_MR_SYNC_Field := 16#0#; -- Parity Type - PAR : MR_PAR_Field := ATSAM3X8E.USART.Even; + PAR : MR_PAR_Field := ATSAM3X8E.USART.EVEN; -- Number of Stop Bits - NBSTOP : MR_NBSTOP_Field := ATSAM3X8E.USART.Val_1_Bit; + NBSTOP : MR_NBSTOP_Field := ATSAM3X8E.USART.Val_1_BIT; -- Channel Mode - CHMODE : MR_CHMODE_Field := ATSAM3X8E.USART.Normal; + CHMODE : MR_CHMODE_Field := ATSAM3X8E.USART.NORMAL; -- Bit Order MSBF : USART0_MR_MSBF_Field := 16#0#; -- 9-bit Character Length @@ -368,41 +367,41 @@ package ATSAM3X8E.USART is -- USART Mode of Operation type MR_SPI_MODE_USART_MODE_Field is (-- Reset value for the field - Mr_Spi_Mode_Usart_Mode_Field_Reset, + MR_SPI_MODE_USART_MODE_Field_Reset, -- SPI Master - Spi_Master, + SPI_MASTER, -- SPI Slave - Spi_Slave) + SPI_SLAVE) with Size => 4; for MR_SPI_MODE_USART_MODE_Field use - (Mr_Spi_Mode_Usart_Mode_Field_Reset => 0, - Spi_Master => 14, - Spi_Slave => 15); + (MR_SPI_MODE_USART_MODE_Field_Reset => 0, + SPI_MASTER => 14, + SPI_SLAVE => 15); -- Clock Selection type MR_SPI_MODE_USCLKS_Field is (-- Master Clock MCK is selected - Mck, + MCK, -- Internal Clock Divided MCK/DIV (DIV=8) is selected - Div, + DIV, -- Serial Clock SLK is selected - Sck) + SCK) with Size => 2; for MR_SPI_MODE_USCLKS_Field use - (Mck => 0, - Div => 1, - Sck => 3); + (MCK => 0, + DIV => 1, + SCK => 3); -- Character Length. type MR_SPI_MODE_CHRL_Field is (-- Reset value for the field - Mr_Spi_Mode_Chrl_Field_Reset, + MR_SPI_MODE_CHRL_Field_Reset, -- Character length is 8 bits - Val_8_Bit) + Val_8_BIT) with Size => 2; for MR_SPI_MODE_CHRL_Field use - (Mr_Spi_Mode_Chrl_Field_Reset => 0, - Val_8_Bit => 3); + (MR_SPI_MODE_CHRL_Field_Reset => 0, + Val_8_BIT => 3); subtype USART0_MR_SPI_MODE_CPHA_Field is ATSAM3X8E.Bit; subtype USART0_MR_SPI_MODE_CPOL_Field is ATSAM3X8E.Bit; @@ -412,11 +411,11 @@ package ATSAM3X8E.USART is type USART0_MR_SPI_MODE_Register is record -- USART Mode of Operation USART_MODE : MR_SPI_MODE_USART_MODE_Field := - Mr_Spi_Mode_Usart_Mode_Field_Reset; + MR_SPI_MODE_USART_MODE_Field_Reset; -- Clock Selection - USCLKS : MR_SPI_MODE_USCLKS_Field := ATSAM3X8E.USART.Mck; + USCLKS : MR_SPI_MODE_USCLKS_Field := ATSAM3X8E.USART.MCK; -- Character Length. - CHRL : MR_SPI_MODE_CHRL_Field := Mr_Spi_Mode_Chrl_Field_Reset; + CHRL : MR_SPI_MODE_CHRL_Field := MR_SPI_MODE_CHRL_Field_Reset; -- SPI Clock Phase CPHA : USART0_MR_SPI_MODE_CPHA_Field := 16#0#; -- unspecified @@ -1425,19 +1424,19 @@ package ATSAM3X8E.USART is -- Transmitter Preamble Pattern type MAN_TX_PP_Field is (-- The preamble is composed of '1's - All_One, + ALL_ONE, -- The preamble is composed of '0's - All_Zero, + ALL_ZERO, -- The preamble is composed of '01's - Zero_One, + ZERO_ONE, -- The preamble is composed of '10's - One_Zero) + ONE_ZERO) with Size => 2; for MAN_TX_PP_Field use - (All_One => 0, - All_Zero => 1, - Zero_One => 2, - One_Zero => 3); + (ALL_ONE => 0, + ALL_ZERO => 1, + ZERO_ONE => 2, + ONE_ZERO => 3); subtype USART0_MAN_TX_MPOL_Field is ATSAM3X8E.Bit; subtype USART0_MAN_RX_PL_Field is ATSAM3X8E.UInt4; @@ -1445,19 +1444,19 @@ package ATSAM3X8E.USART is -- Receiver Preamble Pattern detected type MAN_RX_PP_Field is (-- The preamble is composed of '1's - All_One, + ALL_ONE, -- The preamble is composed of '0's - All_Zero, + ALL_ZERO, -- The preamble is composed of '01's - Zero_One, + ZERO_ONE, -- The preamble is composed of '10's - One_Zero) + ONE_ZERO) with Size => 2; for MAN_RX_PP_Field use - (All_One => 0, - All_Zero => 1, - Zero_One => 2, - One_Zero => 3); + (ALL_ONE => 0, + ALL_ZERO => 1, + ZERO_ONE => 2, + ONE_ZERO => 3); subtype USART0_MAN_RX_MPOL_Field is ATSAM3X8E.Bit; subtype USART0_MAN_ONE_Field is ATSAM3X8E.Bit; @@ -1470,7 +1469,7 @@ package ATSAM3X8E.USART is -- unspecified Reserved_4_7 : ATSAM3X8E.UInt4 := 16#0#; -- Transmitter Preamble Pattern - TX_PP : MAN_TX_PP_Field := ATSAM3X8E.USART.All_One; + TX_PP : MAN_TX_PP_Field := ATSAM3X8E.USART.ALL_ONE; -- unspecified Reserved_10_11 : ATSAM3X8E.UInt2 := 16#0#; -- Transmitter Manchester Polarity @@ -1482,7 +1481,7 @@ package ATSAM3X8E.USART is -- unspecified Reserved_20_23 : ATSAM3X8E.UInt4 := 16#0#; -- Receiver Preamble Pattern detected - RX_PP : MAN_RX_PP_Field := ATSAM3X8E.USART.All_One; + RX_PP : MAN_RX_PP_Field := ATSAM3X8E.USART.ALL_ONE; -- unspecified Reserved_26_27 : ATSAM3X8E.UInt2 := 16#0#; -- Receiver Manchester Polarity @@ -1516,16 +1515,16 @@ package ATSAM3X8E.USART is -- LIN Node Action type LINMR_NACT_Field is (-- The USART transmits the response. - Publish, + PUBLISH, -- The USART receives the response. - Subscribe, + SUBSCRIBE, -- The USART does not transmit and does not receive the response. - Ignore) + IGNORE) with Size => 2; for LINMR_NACT_Field use - (Publish => 0, - Subscribe => 1, - Ignore => 2); + (PUBLISH => 0, + SUBSCRIBE => 1, + IGNORE => 2); subtype USART0_LINMR_PARDIS_Field is ATSAM3X8E.Bit; subtype USART0_LINMR_CHKDIS_Field is ATSAM3X8E.Bit; @@ -1539,7 +1538,7 @@ package ATSAM3X8E.USART is -- LIN Mode Register type USART0_LINMR_Register is record -- LIN Node Action - NACT : LINMR_NACT_Field := ATSAM3X8E.USART.Publish; + NACT : LINMR_NACT_Field := ATSAM3X8E.USART.PUBLISH; -- Parity Disable PARDIS : USART0_LINMR_PARDIS_Field := 16#0#; -- Checksum Disable @@ -1757,8 +1756,8 @@ package ATSAM3X8E.USART is type USART0_Disc is (Default, - Spi_Mode, - Lin_Mode); + SPI_MODE, + LIN_MODE); -- Universal Synchronous Asynchronous Receiver Transmitter 0 type USART_Peripheral @@ -1849,7 +1848,7 @@ package ATSAM3X8E.USART is -- Channel Status Register CSR : aliased USART0_CSR_Register; pragma Volatile_Full_Access (CSR); - when Spi_Mode => + when SPI_MODE => -- Control Register CR_SPI_MODE : aliased USART0_CR_SPI_MODE_Register; pragma Volatile_Full_Access (CR_SPI_MODE); @@ -1868,7 +1867,7 @@ package ATSAM3X8E.USART is -- Channel Status Register CSR_SPI_MODE : aliased USART0_CSR_SPI_MODE_Register; pragma Volatile_Full_Access (CSR_SPI_MODE); - when Lin_Mode => + when LIN_MODE => -- Interrupt Enable Register IER_LIN_MODE : aliased USART0_IER_LIN_MODE_Register; pragma Volatile_Full_Access (IER_LIN_MODE); diff --git a/arduino-due/atsam3x8e/atsam3x8e.ads b/arduino-due/atsam3x8e/atsam3x8e.ads index 44dd4ee..8138631 100644 --- a/arduino-due/atsam3x8e/atsam3x8e.ads +++ b/arduino-due/atsam3x8e/atsam3x8e.ads @@ -1,4 +1,3 @@ -pragma Ada_2012; pragma Style_Checks (Off); -- This spec has been automatically generated from ATSAM3X8E.svd diff --git a/arduino-due/build_runtime.gpr b/arduino-due/build_runtime.gpr index 7339477..e277b61 100644 --- a/arduino-due/build_runtime.gpr +++ b/arduino-due/build_runtime.gpr @@ -1,4 +1,4 @@ --- Copyright (C) 2016-2018, 2020 Free Software Foundation, Inc. +-- Copyright (C) 2016-2021 Free Software Foundation, Inc. -- This file is part of the Cortex GNAT RTS package. -- @@ -21,7 +21,7 @@ with "../FreeRTOS"; library project Build_Runtime is - for Languages use ("Ada", "C"); + for Languages use ("Ada", "C", "ASM"); for Library_Auto_Init use "False"; for Library_Name use "gnat"; @@ -95,7 +95,7 @@ library project Build_Runtime is for Switches ("s-assert.adb") use ALL_ADAFLAGS & ("-g"); for Switches ("a-tags.adb") use ALL_ADAFLAGS & ("-g"); for Switches ("last_chance_handler.c") use ALL_CFLAGS & ("-g", "-O0"); - for Switches ("hardfault_handling.adb") use ALL_ADAFLAGS & ("-g", "-O0"); + for Switches ("s-harhan.adb") use ALL_ADAFLAGS & ("-g", "-O0"); end Compiler; package Install is diff --git a/common/a-cobove.adb b/common/a-cobove.adb index 386b9db..ee9884e 100644 --- a/common/a-cobove.adb +++ b/common/a-cobove.adb @@ -6,7 +6,7 @@ -- -- -- B o d y -- -- -- --- Copyright (C) 2004-2013, 2016, Free Software Foundation, Inc. -- +-- Copyright (C) 2004-2021, Free Software Foundation, Inc. -- -- -- -- GNAT is free software; you can redistribute it and/or modify it under -- -- terms of the GNU General Public License as published by the Free Soft- -- @@ -40,7 +40,7 @@ with System; use type System.Address; package body Ada.Containers.Bounded_Vectors is - pragma Warnings (Off, "others choice is redundant"); + pragma Warnings (Off, "*others* choice is redundant"); ----------------------- -- Local Subprograms -- diff --git a/common/a-cobove.ads b/common/a-cobove.ads index 4d72f5f..b115f96 100644 --- a/common/a-cobove.ads +++ b/common/a-cobove.ads @@ -6,7 +6,7 @@ -- -- -- S p e c -- -- -- --- Copyright (C) 2004-2013, 2016, Free Software Foundation, Inc. -- +-- Copyright (C) 2004-2021, Free Software Foundation, Inc. -- -- -- -- This specification is derived from the Ada Reference Manual for use with -- -- GNAT. The copyright notice above, and the license provisions that follow -- @@ -378,7 +378,7 @@ private function "=" (L, R : Elements_Array) return Boolean is abstract; type Vector (Capacity : Count_Type) is tagged record - Elements : Elements_Array (1 .. Capacity) := (others => <>); + Elements : Elements_Array (1 .. Capacity); Last : Extended_Index := No_Index; -- Busy : Natural := 0; -- Lock : Natural := 0; diff --git a/common/a-cohata.ads b/common/a-cohata.ads index 1a77970..9ea6fe9 100644 --- a/common/a-cohata.ads +++ b/common/a-cohata.ads @@ -6,7 +6,7 @@ -- -- -- S p e c -- -- -- --- Copyright (C) 2004-2011, Free Software Foundation, Inc. -- +-- Copyright (C) 2004-2021, Free Software Foundation, Inc. -- -- -- -- GNAT is free software; you can redistribute it and/or modify it under -- -- terms of the GNU General Public License as published by the Free Soft- -- @@ -68,7 +68,7 @@ package Ada.Containers.Hash_Tables is Busy : Natural := 0; Lock : Natural := 0; Free : Count_Type'Base := -1; - Nodes : Nodes_Type (1 .. Capacity) := (others => <>); + Nodes : Nodes_Type (1 .. Capacity); Buckets : Buckets_Type (1 .. Modulus) := (others => 0); end record; end Generic_Bounded_Hash_Table_Types; diff --git a/common/common.gpr b/common/common.gpr index 0f219f5..a924e3a 100644 --- a/common/common.gpr +++ b/common/common.gpr @@ -1,4 +1,4 @@ --- Copyright (C) 2018, 2020 Free Software Foundation, Inc. +-- Copyright (C) 2018-2021 Free Software Foundation, Inc. -- This file is part of the Cortex GNAT RTS package. -- @@ -19,14 +19,21 @@ abstract project Common is type Compiler_Release is - ("gcc6", "gnat-gpl-2017", "gcc7", "gcc8", "gnat-ce-2020"); + ("gcc6", "gnat-gpl-2017", "gcc7", "gcc8", "gnat-ce-2020", "gcc11"); Release : Compiler_Release := external ("RELEASE", "gcc8"); + Release_Path := Release; + case Release is + when "gcc11" => + Release_Path := "gnat-ce-2020"; + when others => + null; + end case; type Install_Locally is ("yes", "no"); Local : Install_Locally := external ("INSTALL_LOCALLY", "yes"); Paths := (project'Project_Dir, project'Project_Dir & "math", - project'Project_Dir & Release); + project'Project_Dir & Release_Path); end Common; diff --git a/common/math/a-numeri.ads b/common/math/a-numeri.ads index 805fa56..6304ce1 100644 --- a/common/math/a-numeri.ads +++ b/common/math/a-numeri.ads @@ -21,10 +21,13 @@ package Ada.Numerics is Pi : constant := 3.14159_26535_89793_23846_26433_83279_50288_41971_69399_37511; - ["03C0"] : constant := Pi; + -- ["03C0"] : constant := Pi; -- This is the Greek letter Pi (for Ada 2005 AI-388). Note that it is -- conforming to have this constant present even in Ada 95 mode, as there -- is no way for a normal mode Ada 95 program to reference this identifier. + -- ???This is removed for now, because nobody uses it, and it causes + -- trouble for tools other than the compiler. If people want to use the + -- Greek letter in their programs, they can easily define it themselves. e : constant := 2.71828_18284_59045_23536_02874_71352_66249_77572_47093_69996; diff --git a/common/s-aridou.adb b/common/s-aridou.adb new file mode 100644 index 0000000..05a8c9f --- /dev/null +++ b/common/s-aridou.adb @@ -0,0 +1,678 @@ +------------------------------------------------------------------------------ +-- -- +-- GNAT RUN-TIME COMPONENTS -- +-- -- +-- S Y S T E M . A R I T H _ D O U B L E -- +-- -- +-- B o d y -- +-- -- +-- Copyright (C) 1992-2020, Free Software Foundation, Inc. -- +-- -- +-- GNAT is free software; you can redistribute it and/or modify it under -- +-- terms of the GNU General Public License as published by the Free Soft- -- +-- ware Foundation; either version 3, or (at your option) any later ver- -- +-- sion. GNAT is distributed in the hope that it will be useful, but WITH- -- +-- OUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY -- +-- or FITNESS FOR A PARTICULAR PURPOSE. -- +-- -- +-- As a special exception under Section 7 of GPL version 3, you are granted -- +-- additional permissions described in the GCC Runtime Library Exception, -- +-- version 3.1, as published by the Free Software Foundation. -- +-- -- +-- You should have received a copy of the GNU General Public License and -- +-- a copy of the GCC Runtime Library Exception along with this program; -- +-- see the files COPYING3 and COPYING.RUNTIME respectively. If not, see -- +-- . -- +-- -- +-- GNAT was originally developed by the GNAT team at New York University. -- +-- Extensive contributions were provided by Ada Core Technologies Inc. -- +-- -- +------------------------------------------------------------------------------ + +with Ada.Unchecked_Conversion; + +package body System.Arith_Double is + + pragma Suppress (Overflow_Check); + pragma Suppress (Range_Check); + + function To_Uns is new Ada.Unchecked_Conversion (Double_Int, Double_Uns); + function To_Int is new Ada.Unchecked_Conversion (Double_Uns, Double_Int); + + Double_Size : constant Natural := Double_Int'Size; + Single_Size : constant Natural := Double_Int'Size / 2; + + ----------------------- + -- Local Subprograms -- + ----------------------- + + function "+" (A, B : Single_Uns) return Double_Uns is + (Double_Uns (A) + Double_Uns (B)); + function "+" (A : Double_Uns; B : Single_Uns) return Double_Uns is + (A + Double_Uns (B)); + -- Length doubling additions + + function "*" (A, B : Single_Uns) return Double_Uns is + (Double_Uns (A) * Double_Uns (B)); + -- Length doubling multiplication + + function "/" (A : Double_Uns; B : Single_Uns) return Double_Uns is + (A / Double_Uns (B)); + -- Length doubling division + + function "&" (Hi, Lo : Single_Uns) return Double_Uns is + (Shift_Left (Double_Uns (Hi), Single_Size) or Double_Uns (Lo)); + -- Concatenate hi, lo values to form double result + + function "abs" (X : Double_Int) return Double_Uns is + (if X = Double_Int'First + then 2 ** (Double_Size - 1) + else Double_Uns (Double_Int'(abs X))); + -- Convert absolute value of X to unsigned. Note that we can't just use + -- the expression of the Else since it overflows for X = Double_Int'First. + + function "rem" (A : Double_Uns; B : Single_Uns) return Double_Uns is + (A rem Double_Uns (B)); + -- Length doubling remainder + + function Le3 (X1, X2, X3, Y1, Y2, Y3 : Single_Uns) return Boolean; + -- Determines if (3 * Single_Size)-bit value X1&X2&X3 <= Y1&Y2&Y3 + + function Lo (A : Double_Uns) return Single_Uns is + (Single_Uns (A and (2 ** Single_Size - 1))); + -- Low order half of double value + + function Hi (A : Double_Uns) return Single_Uns is + (Single_Uns (Shift_Right (A, Single_Size))); + -- High order half of double value + + procedure Sub3 (X1, X2, X3 : in out Single_Uns; Y1, Y2, Y3 : Single_Uns); + -- Computes X1&X2&X3 := X1&X2&X3 - Y1&Y1&Y3 mod 2 ** (3 * Single_Size) + + function To_Neg_Int (A : Double_Uns) return Double_Int; + -- Convert to negative integer equivalent. If the input is in the range + -- 0 .. 2 ** (Double_Size - 1), then the corresponding nonpositive signed + -- integer (obtained by negating the given value) is returned, otherwise + -- constraint error is raised. + + function To_Pos_Int (A : Double_Uns) return Double_Int; + -- Convert to positive integer equivalent. If the input is in the range + -- 0 .. 2 ** (Double_Size - 1) - 1, then the corresponding non-negative + -- signed integer is returned, otherwise constraint error is raised. + + procedure Raise_Error; + pragma No_Return (Raise_Error); + -- Raise constraint error with appropriate message + + -------------------------- + -- Add_With_Ovflo_Check -- + -------------------------- + + function Add_With_Ovflo_Check (X, Y : Double_Int) return Double_Int is + R : constant Double_Int := To_Int (To_Uns (X) + To_Uns (Y)); + + begin + if X >= 0 then + if Y < 0 or else R >= 0 then + return R; + end if; + + else -- X < 0 + if Y > 0 or else R < 0 then + return R; + end if; + end if; + + Raise_Error; + end Add_With_Ovflo_Check; + + ------------------- + -- Double_Divide -- + ------------------- + + procedure Double_Divide + (X, Y, Z : Double_Int; + Q, R : out Double_Int; + Round : Boolean) + is + Xu : constant Double_Uns := abs X; + Yu : constant Double_Uns := abs Y; + + Yhi : constant Single_Uns := Hi (Yu); + Ylo : constant Single_Uns := Lo (Yu); + + Zu : constant Double_Uns := abs Z; + Zhi : constant Single_Uns := Hi (Zu); + Zlo : constant Single_Uns := Lo (Zu); + + T1, T2 : Double_Uns; + Du, Qu, Ru : Double_Uns; + Den_Pos : Boolean; + + begin + if Yu = 0 or else Zu = 0 then + Raise_Error; + end if; + + -- Set final signs (RM 4.5.5(27-30)) + + Den_Pos := (Y < 0) = (Z < 0); + + -- Compute Y * Z. Note that if the result overflows Double_Uns, then + -- the rounded result is zero, except for the very special case where + -- X = -2 ** (Double_Size - 1) and abs(Y*Z) = 2 ** Double_Size, when + -- Round is True. + + if Yhi /= 0 then + if Zhi /= 0 then + + -- Handle the special case when Round is True + + if Yhi = 1 + and then Zhi = 1 + and then Ylo = 0 + and then Zlo = 0 + and then X = Double_Int'First + and then Round + then + Q := (if Den_Pos then -1 else 1); + else + Q := 0; + end if; + + R := X; + return; + else + T2 := Yhi * Zlo; + end if; + + else + T2 := Ylo * Zhi; + end if; + + T1 := Ylo * Zlo; + T2 := T2 + Hi (T1); + + if Hi (T2) /= 0 then + + -- Handle the special case when Round is True + + if Hi (T2) = 1 + and then Lo (T2) = 0 + and then Lo (T1) = 0 + and then X = Double_Int'First + and then Round + then + Q := (if Den_Pos then -1 else 1); + else + Q := 0; + end if; + + R := X; + return; + end if; + + Du := Lo (T2) & Lo (T1); + + -- Check overflow case of largest negative number divided by -1 + + if X = Double_Int'First and then Du = 1 and then not Den_Pos then + Raise_Error; + end if; + + -- Perform the actual division + + pragma Assert (Du /= 0); + -- Multiplication of 2-limb arguments Yu and Zu leads to 4-limb result + -- (where each limb is a single value). Cases where 4 limbs are needed + -- require Yhi/=0 and Zhi/=0 and lead to early exit. Remaining cases + -- where 3 limbs are needed correspond to Hi(T2)/=0 and lead to early + -- exit. Thus, at this point, the result fits in 2 limbs which are + -- exactly Lo(T2) and Lo(T1), which corresponds to the value of Du. + -- As the case where one of Yu or Zu is null also led to early exit, + -- we have Du/=0 here. + Qu := Xu / Du; + Ru := Xu rem Du; + + -- Deal with rounding case + + if Round and then Ru > (Du - Double_Uns'(1)) / Double_Uns'(2) then + Qu := Qu + Double_Uns'(1); + end if; + + -- Case of dividend (X) sign positive + + if X >= 0 then + R := To_Int (Ru); + Q := (if Den_Pos then To_Int (Qu) else -To_Int (Qu)); + + -- Case of dividend (X) sign negative + + -- We perform the unary minus operation on the unsigned value + -- before conversion to signed, to avoid a possible overflow + -- for value -2 ** (Double_Size - 1), both for computing R and Q. + + else + R := To_Int (-Ru); + Q := (if Den_Pos then To_Int (-Qu) else To_Int (Qu)); + end if; + end Double_Divide; + + --------- + -- Le3 -- + --------- + + function Le3 (X1, X2, X3, Y1, Y2, Y3 : Single_Uns) return Boolean is + begin + if X1 < Y1 then + return True; + elsif X1 > Y1 then + return False; + elsif X2 < Y2 then + return True; + elsif X2 > Y2 then + return False; + else + return X3 <= Y3; + end if; + end Le3; + + ------------------------------- + -- Multiply_With_Ovflo_Check -- + ------------------------------- + + function Multiply_With_Ovflo_Check (X, Y : Double_Int) return Double_Int is + Xu : constant Double_Uns := abs X; + Xhi : constant Single_Uns := Hi (Xu); + Xlo : constant Single_Uns := Lo (Xu); + + Yu : constant Double_Uns := abs Y; + Yhi : constant Single_Uns := Hi (Yu); + Ylo : constant Single_Uns := Lo (Yu); + + T1, T2 : Double_Uns; + + begin + if Xhi /= 0 then + if Yhi /= 0 then + Raise_Error; + else + T2 := Xhi * Ylo; + end if; + + elsif Yhi /= 0 then + T2 := Xlo * Yhi; + + else -- Yhi = Xhi = 0 + T2 := 0; + end if; + + -- Here we have T2 set to the contribution to the upper half of the + -- result from the upper halves of the input values. + + T1 := Xlo * Ylo; + T2 := T2 + Hi (T1); + + if Hi (T2) /= 0 then + Raise_Error; + end if; + + T2 := Lo (T2) & Lo (T1); + + if X >= 0 then + if Y >= 0 then + return To_Pos_Int (T2); + pragma Annotate (CodePeer, Intentional, "precondition", + "Intentional Unsigned->Signed conversion"); + else + return To_Neg_Int (T2); + end if; + else -- X < 0 + if Y < 0 then + return To_Pos_Int (T2); + pragma Annotate (CodePeer, Intentional, "precondition", + "Intentional Unsigned->Signed conversion"); + else + return To_Neg_Int (T2); + end if; + end if; + + end Multiply_With_Ovflo_Check; + + ----------------- + -- Raise_Error -- + ----------------- + + procedure Raise_Error is + begin + raise Constraint_Error with "Double arithmetic overflow"; + end Raise_Error; + + ------------------- + -- Scaled_Divide -- + ------------------- + + procedure Scaled_Divide + (X, Y, Z : Double_Int; + Q, R : out Double_Int; + Round : Boolean) + is + Xu : constant Double_Uns := abs X; + Xhi : constant Single_Uns := Hi (Xu); + Xlo : constant Single_Uns := Lo (Xu); + + Yu : constant Double_Uns := abs Y; + Yhi : constant Single_Uns := Hi (Yu); + Ylo : constant Single_Uns := Lo (Yu); + + Zu : Double_Uns := abs Z; + Zhi : Single_Uns := Hi (Zu); + Zlo : Single_Uns := Lo (Zu); + + D : array (1 .. 4) of Single_Uns; + -- The dividend, four digits (D(1) is high order) + + Qd : array (1 .. 2) of Single_Uns; + -- The quotient digits, two digits (Qd(1) is high order) + + S1, S2, S3 : Single_Uns; + -- Value to subtract, three digits (S1 is high order) + + Qu : Double_Uns; + Ru : Double_Uns; + -- Unsigned quotient and remainder + + Mask : Single_Uns; + -- Mask of bits used to compute the scaling factor below + + Scale : Natural; + -- Scaling factor used for multiple-precision divide. Dividend and + -- Divisor are multiplied by 2 ** Scale, and the final remainder is + -- divided by the scaling factor. The reason for this scaling is to + -- allow more accurate estimation of quotient digits. + + Shift : Natural; + -- Shift factor used to compute the scaling factor above + + T1, T2, T3 : Double_Uns; + -- Temporary values + + begin + -- First do the multiplication, giving the four digit dividend + + T1 := Xlo * Ylo; + D (4) := Lo (T1); + D (3) := Hi (T1); + + if Yhi /= 0 then + T1 := Xlo * Yhi; + T2 := D (3) + Lo (T1); + D (3) := Lo (T2); + D (2) := Hi (T1) + Hi (T2); + + if Xhi /= 0 then + T1 := Xhi * Ylo; + T2 := D (3) + Lo (T1); + D (3) := Lo (T2); + T3 := D (2) + Hi (T1); + T3 := T3 + Hi (T2); + D (2) := Lo (T3); + D (1) := Hi (T3); + + T1 := (D (1) & D (2)) + Double_Uns'(Xhi * Yhi); + D (1) := Hi (T1); + D (2) := Lo (T1); + + else + D (1) := 0; + end if; + + else + if Xhi /= 0 then + T1 := Xhi * Ylo; + T2 := D (3) + Lo (T1); + D (3) := Lo (T2); + D (2) := Hi (T1) + Hi (T2); + + else + D (2) := 0; + end if; + + D (1) := 0; + end if; + + -- Now it is time for the dreaded multiple precision division. First an + -- easy case, check for the simple case of a one digit divisor. + + if Zhi = 0 then + if D (1) /= 0 or else D (2) >= Zlo then + Raise_Error; + + -- Here we are dividing at most three digits by one digit + + else + T1 := D (2) & D (3); + T2 := Lo (T1 rem Zlo) & D (4); + + Qu := Lo (T1 / Zlo) & Lo (T2 / Zlo); + Ru := T2 rem Zlo; + end if; + + -- If divisor is double digit and dividend is too large, raise error + + elsif (D (1) & D (2)) >= Zu then + Raise_Error; + + -- This is the complex case where we definitely have a double digit + -- divisor and a dividend of at least three digits. We use the classical + -- multiple-precision division algorithm (see section (4.3.1) of Knuth's + -- "The Art of Computer Programming", Vol. 2 for a description + -- (algorithm D). + + else + -- First normalize the divisor so that it has the leading bit on. + -- We do this by finding the appropriate left shift amount. + + Shift := Single_Size / 2; + Mask := Shift_Left (2 ** (Single_Size / 2) - 1, Shift); + Scale := 0; + + while Shift /= 0 loop + if (Hi (Zu) and Mask) = 0 then + Scale := Scale + Shift; + Zu := Shift_Left (Zu, Shift); + end if; + + Shift := Shift / 2; + Mask := Shift_Left (Mask, Shift); + end loop; + + Zhi := Hi (Zu); + Zlo := Lo (Zu); + + pragma Assert (Zhi /= 0); + -- We have Hi(Zu)/=0 before normalization. The sequence of Shift_Left + -- operations results in the leading bit of Zu being 1 by moving the + -- leftmost 1-bit in Zu to leading position, thus Zhi=Hi(Zu)/=0 here. + + -- Note that when we scale up the dividend, it still fits in four + -- digits, since we already tested for overflow, and scaling does + -- not change the invariant that (D (1) & D (2)) < Zu. + + T1 := Shift_Left (D (1) & D (2), Scale); + D (1) := Hi (T1); + T2 := Shift_Left (0 & D (3), Scale); + D (2) := Lo (T1) or Hi (T2); + T3 := Shift_Left (0 & D (4), Scale); + D (3) := Lo (T2) or Hi (T3); + D (4) := Lo (T3); + + -- Loop to compute quotient digits, runs twice for Qd(1) and Qd(2) + + for J in 0 .. 1 loop + + -- Compute next quotient digit. We have to divide three digits by + -- two digits. We estimate the quotient by dividing the leading + -- two digits by the leading digit. Given the scaling we did above + -- which ensured the first bit of the divisor is set, this gives + -- an estimate of the quotient that is at most two too high. + + Qd (J + 1) := (if D (J + 1) = Zhi + then 2 ** Single_Size - 1 + else Lo ((D (J + 1) & D (J + 2)) / Zhi)); + + -- Compute amount to subtract + + T1 := Qd (J + 1) * Zlo; + T2 := Qd (J + 1) * Zhi; + S3 := Lo (T1); + T1 := Hi (T1) + Lo (T2); + S2 := Lo (T1); + S1 := Hi (T1) + Hi (T2); + + -- Adjust quotient digit if it was too high + + -- We use the version of the algorithm in the 2nd Edition of + -- "The Art of Computer Programming". This had a bug not + -- discovered till 1995, see Vol 2 errata: + -- http://www-cs-faculty.stanford.edu/~uno/err2-2e.ps.gz. + -- Under rare circumstances the expression in the test could + -- overflow. This version was further corrected in 2005, see + -- Vol 2 errata: + -- http://www-cs-faculty.stanford.edu/~uno/all2-pre.ps.gz. + -- This implementation is not impacted by these bugs, due to the + -- use of a word-size comparison done in function Le3 instead of + -- a comparison on two-word integer quantities in the original + -- algorithm. + + loop + exit when Le3 (S1, S2, S3, D (J + 1), D (J + 2), D (J + 3)); + Qd (J + 1) := Qd (J + 1) - 1; + Sub3 (S1, S2, S3, 0, Zhi, Zlo); + end loop; + + -- Now subtract S1&S2&S3 from D1&D2&D3 ready for next step + + Sub3 (D (J + 1), D (J + 2), D (J + 3), S1, S2, S3); + end loop; + + -- The two quotient digits are now set, and the remainder of the + -- scaled division is in D3&D4. To get the remainder for the + -- original unscaled division, we rescale this dividend. + + -- We rescale the divisor as well, to make the proper comparison + -- for rounding below. + + Qu := Qd (1) & Qd (2); + Ru := Shift_Right (D (3) & D (4), Scale); + Zu := Shift_Right (Zu, Scale); + end if; + + -- Deal with rounding case + + if Round and then Ru > (Zu - Double_Uns'(1)) / Double_Uns'(2) then + + -- Protect against wrapping around when rounding, by signaling + -- an overflow when the quotient is too large. + + if Qu = Double_Uns'Last then + Raise_Error; + end if; + + Qu := Qu + Double_Uns'(1); + end if; + + -- Set final signs (RM 4.5.5(27-30)) + + -- Case of dividend (X * Y) sign positive + + if (X >= 0 and then Y >= 0) or else (X < 0 and then Y < 0) then + R := To_Pos_Int (Ru); + Q := (if Z > 0 then To_Pos_Int (Qu) else To_Neg_Int (Qu)); + + -- Case of dividend (X * Y) sign negative + + else + R := To_Neg_Int (Ru); + Q := (if Z > 0 then To_Neg_Int (Qu) else To_Pos_Int (Qu)); + end if; + end Scaled_Divide; + + ---------- + -- Sub3 -- + ---------- + + procedure Sub3 (X1, X2, X3 : in out Single_Uns; Y1, Y2, Y3 : Single_Uns) is + begin + if Y3 > X3 then + if X2 = 0 then + X1 := X1 - 1; + end if; + + X2 := X2 - 1; + end if; + + X3 := X3 - Y3; + + if Y2 > X2 then + X1 := X1 - 1; + end if; + + X2 := X2 - Y2; + X1 := X1 - Y1; + end Sub3; + + ------------------------------- + -- Subtract_With_Ovflo_Check -- + ------------------------------- + + function Subtract_With_Ovflo_Check (X, Y : Double_Int) return Double_Int is + R : constant Double_Int := To_Int (To_Uns (X) - To_Uns (Y)); + + begin + if X >= 0 then + if Y > 0 or else R >= 0 then + return R; + end if; + + else -- X < 0 + if Y <= 0 or else R < 0 then + return R; + end if; + end if; + + Raise_Error; + end Subtract_With_Ovflo_Check; + + ---------------- + -- To_Neg_Int -- + ---------------- + + function To_Neg_Int (A : Double_Uns) return Double_Int is + R : constant Double_Int := + (if A = 2 ** (Double_Size - 1) then Double_Int'First else -To_Int (A)); + -- Note that we can't just use the expression of the Else, because it + -- overflows for A = 2 ** (Double_Size - 1). + begin + if R <= 0 then + return R; + else + Raise_Error; + end if; + end To_Neg_Int; + + ---------------- + -- To_Pos_Int -- + ---------------- + + function To_Pos_Int (A : Double_Uns) return Double_Int is + R : constant Double_Int := To_Int (A); + begin + if R >= 0 then + return R; + else + Raise_Error; + end if; + end To_Pos_Int; + +end System.Arith_Double; diff --git a/common/s-aridou.ads b/common/s-aridou.ads new file mode 100644 index 0000000..f9c03e5 --- /dev/null +++ b/common/s-aridou.ads @@ -0,0 +1,94 @@ +------------------------------------------------------------------------------ +-- -- +-- GNAT COMPILER COMPONENTS -- +-- -- +-- S Y S T E M . A R I T H _ D O U B L E -- +-- -- +-- S p e c -- +-- -- +-- Copyright (C) 1992-2020, Free Software Foundation, Inc. -- +-- -- +-- GNAT is free software; you can redistribute it and/or modify it under -- +-- terms of the GNU General Public License as published by the Free Soft- -- +-- ware Foundation; either version 3, or (at your option) any later ver- -- +-- sion. GNAT is distributed in the hope that it will be useful, but WITH- -- +-- OUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY -- +-- or FITNESS FOR A PARTICULAR PURPOSE. -- +-- -- +-- As a special exception under Section 7 of GPL version 3, you are granted -- +-- additional permissions described in the GCC Runtime Library Exception, -- +-- version 3.1, as published by the Free Software Foundation. -- +-- -- +-- You should have received a copy of the GNU General Public License and -- +-- a copy of the GCC Runtime Library Exception along with this program; -- +-- see the files COPYING3 and COPYING.RUNTIME respectively. If not, see -- +-- . -- +-- -- +-- GNAT was originally developed by the GNAT team at New York University. -- +-- Extensive contributions were provided by Ada Core Technologies Inc. -- +-- -- +------------------------------------------------------------------------------ + +-- This package provides software routines for doing arithmetic on "double" +-- signed integer values in cases where either overflow checking is required, +-- or intermediate results are longer than the result type. + +generic + + type Double_Int is range <>; + + type Double_Uns is mod <>; + + type Single_Uns is mod <>; + + with function Shift_Left (A : Double_Uns; B : Natural) return Double_Uns + is <>; + + with function Shift_Right (A : Double_Uns; B : Natural) return Double_Uns + is <>; + + with function Shift_Left (A : Single_Uns; B : Natural) return Single_Uns + is <>; + +package System.Arith_Double is + pragma Pure; + + function Add_With_Ovflo_Check (X, Y : Double_Int) return Double_Int; + -- Raises Constraint_Error if sum of operands overflows Double_Int, + -- otherwise returns the signed integer sum. + + function Subtract_With_Ovflo_Check (X, Y : Double_Int) return Double_Int; + -- Raises Constraint_Error if difference of operands overflows Double_Int, + -- otherwise returns the signed integer difference. + + function Multiply_With_Ovflo_Check (X, Y : Double_Int) return Double_Int; + pragma Convention (C, Multiply_With_Ovflo_Check); + -- Raises Constraint_Error if product of operands overflows Double_Int, + -- otherwise returns the signed integer product. Gigi may also call this + -- routine directly. + + procedure Scaled_Divide + (X, Y, Z : Double_Int; + Q, R : out Double_Int; + Round : Boolean); + -- Performs the division of (X * Y) / Z, storing the quotient in Q + -- and the remainder in R. Constraint_Error is raised if Z is zero, + -- or if the quotient does not fit in Double_Int. Round indicates if + -- the result should be rounded. If Round is False, then Q, R are + -- the normal quotient and remainder from a truncating division. + -- If Round is True, then Q is the rounded quotient. The remainder + -- R is not affected by the setting of the Round flag. + + procedure Double_Divide + (X, Y, Z : Double_Int; + Q, R : out Double_Int; + Round : Boolean); + -- Performs the division X / (Y * Z), storing the quotient in Q and + -- the remainder in R. Constraint_Error is raised if Y or Z is zero, + -- or if the quotient does not fit in Double_Int. Round indicates if the + -- result should be rounded. If Round is False, then Q, R are the normal + -- quotient and remainder from a truncating division. If Round is True, + -- then Q is the rounded quotient. The remainder R is not affected by the + -- setting of the Round flag. + +end System.Arith_Double; diff --git a/common/s-arit64.adb b/common/s-arit64.adb index ce4f75a..a4d60f2 100644 --- a/common/s-arit64.adb +++ b/common/s-arit64.adb @@ -6,7 +6,7 @@ -- -- -- B o d y -- -- -- --- Copyright (C) 1992-2013, Free Software Foundation, Inc. -- +-- Copyright (C) 1992-2020, Free Software Foundation, Inc. -- -- -- -- GNAT is free software; you can redistribute it and/or modify it under -- -- terms of the GNU General Public License as published by the Free Soft- -- @@ -29,645 +29,36 @@ -- -- ------------------------------------------------------------------------------ -with Interfaces; use Interfaces; -with Ada.Unchecked_Conversion; +with System.Arith_Double; package body System.Arith_64 is - pragma Suppress (Overflow_Check); - pragma Suppress (Range_Check); + subtype Uns64 is Interfaces.Unsigned_64; + subtype Uns32 is Interfaces.Unsigned_32; - subtype Uns64 is Unsigned_64; - function To_Uns is new Ada.Unchecked_Conversion (Int64, Uns64); - function To_Int is new Ada.Unchecked_Conversion (Uns64, Int64); + use Interfaces; - subtype Uns32 is Unsigned_32; + package Impl is new Arith_Double (Int64, Uns64, Uns32); - ----------------------- - -- Local Subprograms -- - ----------------------- + function Add_With_Ovflo_Check64 (X, Y : Int64) return Int64 + renames Impl.Add_With_Ovflo_Check; - function "+" (A, B : Uns32) return Uns64; - function "+" (A : Uns64; B : Uns32) return Uns64; - pragma Inline ("+"); - -- Length doubling additions + function Subtract_With_Ovflo_Check64 (X, Y : Int64) return Int64 + renames Impl.Subtract_With_Ovflo_Check; - function "*" (A, B : Uns32) return Uns64; - pragma Inline ("*"); - -- Length doubling multiplication + function Multiply_With_Ovflo_Check64 (X, Y : Int64) return Int64 + renames Impl.Multiply_With_Ovflo_Check; - function "/" (A : Uns64; B : Uns32) return Uns64; - pragma Inline ("/"); - -- Length doubling division - - function "rem" (A : Uns64; B : Uns32) return Uns64; - pragma Inline ("rem"); - -- Length doubling remainder - - function "&" (Hi, Lo : Uns32) return Uns64; - pragma Inline ("&"); - -- Concatenate hi, lo values to form 64-bit result - - function Le3 (X1, X2, X3 : Uns32; Y1, Y2, Y3 : Uns32) return Boolean; - -- Determines if 96 bit value X1&X2&X3 <= Y1&Y2&Y3 - - function Lo (A : Uns64) return Uns32; - pragma Inline (Lo); - -- Low order half of 64-bit value - - function Hi (A : Uns64) return Uns32; - pragma Inline (Hi); - -- High order half of 64-bit value - - procedure Sub3 (X1, X2, X3 : in out Uns32; Y1, Y2, Y3 : Uns32); - -- Computes X1&X2&X3 := X1&X2&X3 - Y1&Y1&Y3 with mod 2**96 wrap - - function To_Neg_Int (A : Uns64) return Int64; - -- Convert to negative integer equivalent. If the input is in the range - -- 0 .. 2 ** 63, then the corresponding negative signed integer (obtained - -- by negating the given value) is returned, otherwise constraint error - -- is raised. - - function To_Pos_Int (A : Uns64) return Int64; - -- Convert to positive integer equivalent. If the input is in the range - -- 0 .. 2 ** 63-1, then the corresponding non-negative signed integer is - -- returned, otherwise constraint error is raised. - - procedure Raise_Error; - pragma No_Return (Raise_Error); - -- Raise constraint error with appropriate message - - --------- - -- "&" -- - --------- - - function "&" (Hi, Lo : Uns32) return Uns64 is - begin - return Shift_Left (Uns64 (Hi), 32) or Uns64 (Lo); - end "&"; - - --------- - -- "*" -- - --------- - - function "*" (A, B : Uns32) return Uns64 is - begin - return Uns64 (A) * Uns64 (B); - end "*"; - - --------- - -- "+" -- - --------- - - function "+" (A, B : Uns32) return Uns64 is - begin - return Uns64 (A) + Uns64 (B); - end "+"; - - function "+" (A : Uns64; B : Uns32) return Uns64 is - begin - return A + Uns64 (B); - end "+"; - - --------- - -- "/" -- - --------- - - function "/" (A : Uns64; B : Uns32) return Uns64 is - begin - return A / Uns64 (B); - end "/"; - - ----------- - -- "rem" -- - ----------- - - function "rem" (A : Uns64; B : Uns32) return Uns64 is - begin - return A rem Uns64 (B); - end "rem"; - - -------------------------- - -- Add_With_Ovflo_Check -- - -------------------------- - - function Add_With_Ovflo_Check (X, Y : Int64) return Int64 is - R : constant Int64 := To_Int (To_Uns (X) + To_Uns (Y)); - - begin - if X >= 0 then - if Y < 0 or else R >= 0 then - return R; - end if; - - else -- X < 0 - if Y > 0 or else R < 0 then - return R; - end if; - end if; - - Raise_Error; - end Add_With_Ovflo_Check; - - ------------------- - -- Double_Divide -- - ------------------- - - procedure Double_Divide + procedure Scaled_Divide64 (X, Y, Z : Int64; Q, R : out Int64; Round : Boolean) - is - Xu : constant Uns64 := To_Uns (abs X); - Yu : constant Uns64 := To_Uns (abs Y); - - Yhi : constant Uns32 := Hi (Yu); - Ylo : constant Uns32 := Lo (Yu); - - Zu : constant Uns64 := To_Uns (abs Z); - Zhi : constant Uns32 := Hi (Zu); - Zlo : constant Uns32 := Lo (Zu); - - T1, T2 : Uns64; - Du, Qu, Ru : Uns64; - Den_Pos : Boolean; - - begin - if Yu = 0 or else Zu = 0 then - Raise_Error; - end if; - - -- Compute Y * Z. Note that if the result overflows 64 bits unsigned, - -- then the rounded result is clearly zero (since the dividend is at - -- most 2**63 - 1, the extra bit of precision is nice here). - - if Yhi /= 0 then - if Zhi /= 0 then - Q := 0; - R := X; - return; - else - T2 := Yhi * Zlo; - end if; - - else - T2 := (if Zhi /= 0 then Ylo * Zhi else 0); - end if; - - T1 := Ylo * Zlo; - T2 := T2 + Hi (T1); - - if Hi (T2) /= 0 then - Q := 0; - R := X; - return; - end if; + renames Impl.Scaled_Divide; - Du := Lo (T2) & Lo (T1); - - -- Set final signs (RM 4.5.5(27-30)) - - Den_Pos := (Y < 0) = (Z < 0); - - -- Check overflow case of largest negative number divided by 1 - - if X = Int64'First and then Du = 1 and then not Den_Pos then - Raise_Error; - end if; - - -- Perform the actual division - - Qu := Xu / Du; - Ru := Xu rem Du; - - -- Deal with rounding case - - if Round and then Ru > (Du - Uns64'(1)) / Uns64'(2) then - Qu := Qu + Uns64'(1); - end if; - - -- Case of dividend (X) sign positive - - if X >= 0 then - R := To_Int (Ru); - Q := (if Den_Pos then To_Int (Qu) else -To_Int (Qu)); - - -- Case of dividend (X) sign negative - - else - R := -To_Int (Ru); - Q := (if Den_Pos then -To_Int (Qu) else To_Int (Qu)); - end if; - end Double_Divide; - - -------- - -- Hi -- - -------- - - function Hi (A : Uns64) return Uns32 is - begin - return Uns32 (Shift_Right (A, 32)); - end Hi; - - --------- - -- Le3 -- - --------- - - function Le3 (X1, X2, X3 : Uns32; Y1, Y2, Y3 : Uns32) return Boolean is - begin - if X1 < Y1 then - return True; - elsif X1 > Y1 then - return False; - elsif X2 < Y2 then - return True; - elsif X2 > Y2 then - return False; - else - return X3 <= Y3; - end if; - end Le3; - - -------- - -- Lo -- - -------- - - function Lo (A : Uns64) return Uns32 is - begin - return Uns32 (A and 16#FFFF_FFFF#); - end Lo; - - ------------------------------- - -- Multiply_With_Ovflo_Check -- - ------------------------------- - - function Multiply_With_Ovflo_Check (X, Y : Int64) return Int64 is - Xu : constant Uns64 := To_Uns (abs X); - Xhi : constant Uns32 := Hi (Xu); - Xlo : constant Uns32 := Lo (Xu); - - Yu : constant Uns64 := To_Uns (abs Y); - Yhi : constant Uns32 := Hi (Yu); - Ylo : constant Uns32 := Lo (Yu); - - T1, T2 : Uns64; - - begin - if Xhi /= 0 then - if Yhi /= 0 then - Raise_Error; - else - T2 := Xhi * Ylo; - end if; - - elsif Yhi /= 0 then - T2 := Xlo * Yhi; - - else -- Yhi = Xhi = 0 - T2 := 0; - end if; - - -- Here we have T2 set to the contribution to the upper half - -- of the result from the upper halves of the input values. - - T1 := Xlo * Ylo; - T2 := T2 + Hi (T1); - - if Hi (T2) /= 0 then - Raise_Error; - end if; - - T2 := Lo (T2) & Lo (T1); - - if X >= 0 then - if Y >= 0 then - return To_Pos_Int (T2); - else - return To_Neg_Int (T2); - end if; - else -- X < 0 - if Y < 0 then - return To_Pos_Int (T2); - else - return To_Neg_Int (T2); - end if; - end if; - - end Multiply_With_Ovflo_Check; - - ----------------- - -- Raise_Error -- - ----------------- - - procedure Raise_Error is - begin - raise Constraint_Error with "64-bit arithmetic overflow"; - end Raise_Error; - - ------------------- - -- Scaled_Divide -- - ------------------- - - procedure Scaled_Divide + procedure Double_Divide64 (X, Y, Z : Int64; Q, R : out Int64; Round : Boolean) - is - Xu : constant Uns64 := To_Uns (abs X); - Xhi : constant Uns32 := Hi (Xu); - Xlo : constant Uns32 := Lo (Xu); - - Yu : constant Uns64 := To_Uns (abs Y); - Yhi : constant Uns32 := Hi (Yu); - Ylo : constant Uns32 := Lo (Yu); - - Zu : Uns64 := To_Uns (abs Z); - Zhi : Uns32 := Hi (Zu); - Zlo : Uns32 := Lo (Zu); - - D : array (1 .. 4) of Uns32; - -- The dividend, four digits (D(1) is high order) - - Qd : array (1 .. 2) of Uns32; - -- The quotient digits, two digits (Qd(1) is high order) - - S1, S2, S3 : Uns32; - -- Value to subtract, three digits (S1 is high order) - - Qu : Uns64; - Ru : Uns64; - -- Unsigned quotient and remainder - - Scale : Natural; - -- Scaling factor used for multiple-precision divide. Dividend and - -- Divisor are multiplied by 2 ** Scale, and the final remainder - -- is divided by the scaling factor. The reason for this scaling - -- is to allow more accurate estimation of quotient digits. - - T1, T2, T3 : Uns64; - -- Temporary values - - begin - -- First do the multiplication, giving the four digit dividend - - T1 := Xlo * Ylo; - D (4) := Lo (T1); - D (3) := Hi (T1); - - if Yhi /= 0 then - T1 := Xlo * Yhi; - T2 := D (3) + Lo (T1); - D (3) := Lo (T2); - D (2) := Hi (T1) + Hi (T2); - - if Xhi /= 0 then - T1 := Xhi * Ylo; - T2 := D (3) + Lo (T1); - D (3) := Lo (T2); - T3 := D (2) + Hi (T1); - T3 := T3 + Hi (T2); - D (2) := Lo (T3); - D (1) := Hi (T3); - - T1 := (D (1) & D (2)) + Uns64'(Xhi * Yhi); - D (1) := Hi (T1); - D (2) := Lo (T1); - - else - D (1) := 0; - end if; - - else - if Xhi /= 0 then - T1 := Xhi * Ylo; - T2 := D (3) + Lo (T1); - D (3) := Lo (T2); - D (2) := Hi (T1) + Hi (T2); - - else - D (2) := 0; - end if; - - D (1) := 0; - end if; - - -- Now it is time for the dreaded multiple precision division. First - -- an easy case, check for the simple case of a one digit divisor. - - if Zhi = 0 then - if D (1) /= 0 or else D (2) >= Zlo then - Raise_Error; - - -- Here we are dividing at most three digits by one digit - - else - T1 := D (2) & D (3); - T2 := Lo (T1 rem Zlo) & D (4); - - Qu := Lo (T1 / Zlo) & Lo (T2 / Zlo); - Ru := T2 rem Zlo; - end if; - - -- If divisor is double digit and too large, raise error - - elsif (D (1) & D (2)) >= Zu then - Raise_Error; - - -- This is the complex case where we definitely have a double digit - -- divisor and a dividend of at least three digits. We use the classical - -- multiple division algorithm (see section (4.3.1) of Knuth's "The Art - -- of Computer Programming", Vol. 2 for a description (algorithm D). - - else - -- First normalize the divisor so that it has the leading bit on. - -- We do this by finding the appropriate left shift amount. - - Scale := 0; - - if (Zhi and 16#FFFF0000#) = 0 then - Scale := 16; - Zu := Shift_Left (Zu, 16); - end if; - - if (Hi (Zu) and 16#FF00_0000#) = 0 then - Scale := Scale + 8; - Zu := Shift_Left (Zu, 8); - end if; - - if (Hi (Zu) and 16#F000_0000#) = 0 then - Scale := Scale + 4; - Zu := Shift_Left (Zu, 4); - end if; - - if (Hi (Zu) and 16#C000_0000#) = 0 then - Scale := Scale + 2; - Zu := Shift_Left (Zu, 2); - end if; - - if (Hi (Zu) and 16#8000_0000#) = 0 then - Scale := Scale + 1; - Zu := Shift_Left (Zu, 1); - end if; - - Zhi := Hi (Zu); - Zlo := Lo (Zu); - - -- Note that when we scale up the dividend, it still fits in four - -- digits, since we already tested for overflow, and scaling does - -- not change the invariant that (D (1) & D (2)) >= Zu. - - T1 := Shift_Left (D (1) & D (2), Scale); - D (1) := Hi (T1); - T2 := Shift_Left (0 & D (3), Scale); - D (2) := Lo (T1) or Hi (T2); - T3 := Shift_Left (0 & D (4), Scale); - D (3) := Lo (T2) or Hi (T3); - D (4) := Lo (T3); - - -- Loop to compute quotient digits, runs twice for Qd(1) and Qd(2) - - for J in 0 .. 1 loop - - -- Compute next quotient digit. We have to divide three digits by - -- two digits. We estimate the quotient by dividing the leading - -- two digits by the leading digit. Given the scaling we did above - -- which ensured the first bit of the divisor is set, this gives - -- an estimate of the quotient that is at most two too high. - - Qd (J + 1) := (if D (J + 1) = Zhi - then 2 ** 32 - 1 - else Lo ((D (J + 1) & D (J + 2)) / Zhi)); - - -- Compute amount to subtract - - T1 := Qd (J + 1) * Zlo; - T2 := Qd (J + 1) * Zhi; - S3 := Lo (T1); - T1 := Hi (T1) + Lo (T2); - S2 := Lo (T1); - S1 := Hi (T1) + Hi (T2); - - -- Adjust quotient digit if it was too high - - loop - exit when Le3 (S1, S2, S3, D (J + 1), D (J + 2), D (J + 3)); - Qd (J + 1) := Qd (J + 1) - 1; - Sub3 (S1, S2, S3, 0, Zhi, Zlo); - end loop; - - -- Now subtract S1&S2&S3 from D1&D2&D3 ready for next step - - Sub3 (D (J + 1), D (J + 2), D (J + 3), S1, S2, S3); - end loop; - - -- The two quotient digits are now set, and the remainder of the - -- scaled division is in D3&D4. To get the remainder for the - -- original unscaled division, we rescale this dividend. - - -- We rescale the divisor as well, to make the proper comparison - -- for rounding below. - - Qu := Qd (1) & Qd (2); - Ru := Shift_Right (D (3) & D (4), Scale); - Zu := Shift_Right (Zu, Scale); - end if; - - -- Deal with rounding case - - if Round and then Ru > (Zu - Uns64'(1)) / Uns64'(2) then - Qu := Qu + Uns64 (1); - end if; - - -- Set final signs (RM 4.5.5(27-30)) - - -- Case of dividend (X * Y) sign positive - - if (X >= 0 and then Y >= 0) or else (X < 0 and then Y < 0) then - R := To_Pos_Int (Ru); - Q := (if Z > 0 then To_Pos_Int (Qu) else To_Neg_Int (Qu)); - - -- Case of dividend (X * Y) sign negative - - else - R := To_Neg_Int (Ru); - Q := (if Z > 0 then To_Neg_Int (Qu) else To_Pos_Int (Qu)); - end if; - end Scaled_Divide; - - ---------- - -- Sub3 -- - ---------- - - procedure Sub3 (X1, X2, X3 : in out Uns32; Y1, Y2, Y3 : Uns32) is - begin - if Y3 > X3 then - if X2 = 0 then - X1 := X1 - 1; - end if; - - X2 := X2 - 1; - end if; - - X3 := X3 - Y3; - - if Y2 > X2 then - X1 := X1 - 1; - end if; - - X2 := X2 - Y2; - X1 := X1 - Y1; - end Sub3; - - ------------------------------- - -- Subtract_With_Ovflo_Check -- - ------------------------------- - - function Subtract_With_Ovflo_Check (X, Y : Int64) return Int64 is - R : constant Int64 := To_Int (To_Uns (X) - To_Uns (Y)); - - begin - if X >= 0 then - if Y > 0 or else R >= 0 then - return R; - end if; - - else -- X < 0 - if Y <= 0 or else R < 0 then - return R; - end if; - end if; - - Raise_Error; - end Subtract_With_Ovflo_Check; - - ---------------- - -- To_Neg_Int -- - ---------------- - - function To_Neg_Int (A : Uns64) return Int64 is - R : constant Int64 := -To_Int (A); - - begin - if R <= 0 then - return R; - else - Raise_Error; - end if; - end To_Neg_Int; - - ---------------- - -- To_Pos_Int -- - ---------------- - - function To_Pos_Int (A : Uns64) return Int64 is - R : constant Int64 := To_Int (A); - - begin - if R >= 0 then - return R; - else - Raise_Error; - end if; - end To_Pos_Int; + renames Impl.Double_Divide; end System.Arith_64; diff --git a/common/s-arit64.ads b/common/s-arit64.ads index 4eb1153..8b5c623 100644 --- a/common/s-arit64.ads +++ b/common/s-arit64.ads @@ -6,7 +6,7 @@ -- -- -- S p e c -- -- -- --- Copyright (C) 1992-2012, Free Software Foundation, Inc. -- +-- Copyright (C) 1992-2021, Free Software Foundation, Inc. -- -- -- -- GNAT is free software; you can redistribute it and/or modify it under -- -- terms of the GNU General Public License as published by the Free Soft- -- @@ -33,6 +33,8 @@ -- signed integer values in cases where either overflow checking is -- required, or intermediate results are longer than 64 bits. +-- For Cortex GNAT RTS, re-imported from the FSF GCC 11 release. + pragma Restrictions (No_Elaboration_Code); -- Allow direct call from gigi generated code @@ -43,42 +45,66 @@ package System.Arith_64 is subtype Int64 is Interfaces.Integer_64; - function Add_With_Ovflo_Check (X, Y : Int64) return Int64; + function Add_With_Ovflo_Check64 (X, Y : Int64) return Int64; -- Raises Constraint_Error if sum of operands overflows 64 bits, -- otherwise returns the 64-bit signed integer sum. - function Subtract_With_Ovflo_Check (X, Y : Int64) return Int64; + function Add_With_Ovflo_Check (X, Y : Int64) return Int64 + renames Add_With_Ovflo_Check64; + -- Renamed subprogram to preserve compatibility with earlier versions + + function Subtract_With_Ovflo_Check64 (X, Y : Int64) return Int64; -- Raises Constraint_Error if difference of operands overflows 64 -- bits, otherwise returns the 64-bit signed integer difference. - function Multiply_With_Ovflo_Check (X, Y : Int64) return Int64; - pragma Export (C, Multiply_With_Ovflo_Check, "__gnat_mulv64"); + function Subtract_With_Ovflo_Check (X, Y : Int64) return Int64 + renames Subtract_With_Ovflo_Check64; + -- Renamed subprogram to preserve compatibility with earlier versions + + function Multiply_With_Ovflo_Check64 (X, Y : Int64) return Int64; + pragma Export (C, Multiply_With_Ovflo_Check64, "__gnat_mulv64"); -- Raises Constraint_Error if product of operands overflows 64 -- bits, otherwise returns the 64-bit signed integer product. - -- GIGI may also call this routine directly. + -- Gigi may also call this routine directly. - procedure Scaled_Divide + function Multiply_With_Ovflo_Check (X, Y : Int64) return Int64 + renames Multiply_With_Ovflo_Check64; + -- Renamed subprogram to preserve compatibility with earlier versions + + procedure Scaled_Divide64 (X, Y, Z : Int64; Q, R : out Int64; Round : Boolean); -- Performs the division of (X * Y) / Z, storing the quotient in Q -- and the remainder in R. Constraint_Error is raised if Z is zero, - -- or if the quotient does not fit in 64-bits. Round indicates if + -- or if the quotient does not fit in 64 bits. Round indicates if -- the result should be rounded. If Round is False, then Q, R are -- the normal quotient and remainder from a truncating division. -- If Round is True, then Q is the rounded quotient. The remainder -- R is not affected by the setting of the Round flag. - procedure Double_Divide + procedure Scaled_Divide + (X, Y, Z : Int64; + Q, R : out Int64; + Round : Boolean) renames Scaled_Divide64; + -- Renamed procedure to preserve compatibility with earlier versions + + procedure Double_Divide64 (X, Y, Z : Int64; Q, R : out Int64; Round : Boolean); -- Performs the division X / (Y * Z), storing the quotient in Q and -- the remainder in R. Constraint_Error is raised if Y or Z is zero, - -- or if the quotient does not fit in 64-bits. Round indicates if the + -- or if the quotient does not fit in 64 bits. Round indicates if the -- result should be rounded. If Round is False, then Q, R are the normal -- quotient and remainder from a truncating division. If Round is True, -- then Q is the rounded quotient. The remainder R is not affected by the -- setting of the Round flag. + procedure Double_Divide + (X, Y, Z : Int64; + Q, R : out Int64; + Round : Boolean) renames Double_Divide64; + -- Renamed procedure to preserve compatibility with earlier versions + end System.Arith_64; diff --git a/common/s-stalib.ads b/common/s-stalib.ads index 28b16d8..ad3b526 100644 --- a/common/s-stalib.ads +++ b/common/s-stalib.ads @@ -6,7 +6,7 @@ -- -- -- S p e c -- -- -- --- Copyright (C) 1992-2013, 2016, Free Software Foundation, Inc. -- +-- Copyright (C) 1992-2020, Free Software Foundation, Inc. -- -- -- -- GNAT is free software; you can redistribute it and/or modify it under -- -- terms of the GNU General Public License as published by the Free Soft- -- @@ -47,10 +47,6 @@ pragma Restrictions (No_Elaboration_Code); pragma Compiler_Unit_Warning; -pragma Polling (Off); --- We must turn polling off for this unit, because otherwise we get --- elaboration circularities with Ada.Exceptions if polling is on. - with Ada.Unchecked_Conversion; package System.Standard_Library is @@ -106,7 +102,6 @@ package System.Standard_Library is Lang : Character; -- A character indicating the language raising the exception. -- Set to "A" for exceptions defined by an Ada program. - -- Set to "V" for imported VMS exceptions. -- Set to "C" for imported C++ exceptions. Name_Length : Natural; @@ -122,9 +117,8 @@ package System.Standard_Library is -- identities and names. Foreign_Data : Address; - -- Data for imported exceptions. This represents the exception code - -- for the handling of Import/Export_Exception for the VMS case. - -- This represents the address of the RTTI for the C++ case. + -- Data for imported exceptions. Not used in the Ada case. This + -- represents the address of the RTTI for the C++ case. Raise_Hook : Raise_Action; -- This field can be used to place a "hook" on an exception. If the @@ -222,12 +216,23 @@ package System.Standard_Library is -- This is the default behavior. Every_Raise, - -- Denotes every possible raise event, either explicit or due to - -- a specific language rule, within the context of a task or not. - - Unhandled_Raise - -- Denotes the raise events corresponding to exceptions for which - -- there is no user defined handler. + -- Denotes the initial raise event for any exception occurrence, either + -- explicit or due to a specific language rule, within the context of a + -- task or not. + + Unhandled_Raise, + -- Denotes the raise events corresponding to exceptions for which there + -- is no user defined handler. This includes unhandled exceptions in + -- task bodies. + + Unhandled_Raise_In_Main + -- Same as Unhandled_Raise, except exceptions in task bodies are not + -- included. Same as RM_Convention, except (1) the message is printed as + -- soon as the environment task completes due to an unhandled exception + -- (before awaiting the termination of dependent tasks, and before + -- library-level finalization), and (2) a symbolic traceback is given + -- if possible. This is the default behavior if the binder switch -E is + -- used. ); -- Provide a way to denote different kinds of automatic traces related -- to exceptions that can be requested. @@ -243,7 +248,7 @@ package System.Standard_Library is -- procedure Abort_Undefer_Direct; -- pragma Inline (Abort_Undefer_Direct); -- -- A little procedure that just calls Abort_Undefer.all, for use in - -- clean up procedures, which only permit a simple subprogram name. + -- -- clean up procedures, which only permit a simple subprogram name. -- procedure Adafinal; -- Performs the Ada Runtime finalization the first time it is invoked. diff --git a/microbit/adainclude/interrupt_vectors.s b/microbit/adainclude/interrupt_vectors.s new file mode 100644 index 0000000..e4f06c1 --- /dev/null +++ b/microbit/adainclude/interrupt_vectors.s @@ -0,0 +1,78 @@ + @ Copyright (C) 2021 Free Software Foundation, Inc. + + @ This file is part of the Cortex GNAT RTS project. This file is + @ free software; you can redistribute it and/or modify it under + @ terms of the GNU General Public License as published by the Free + @ Software Foundation; either version 3, or (at your option) any + @ later version. This file is distributed in the hope that it will + @ be useful, but WITHOUT ANY WARRANTY; without even the implied + @ warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. + + @ As a special exception under Section 7 of GPL version 3, you are + @ granted additional permissions described in the GCC Runtime + @ Library Exception, version 3.1, as published by the Free Software + @ Foundation. + + @ You should have received a copy of the GNU General Public License + @ and a copy of the GCC Runtime Library Exception along with this + @ program; see the files COPYING3 and COPYING.RUNTIME respectively. + @ If not, see . + + @ This is the Vector Table, described for M0 processors in e.g. + @ https://developer.arm.com/documentation/dui0497/a/the-cortex-m0-processor/exception-model/vector-table + + @ The capitalized handlers are defined in startup.adb, using + @ weak symbols (they can't be defined here, unlike _fault, or + @ the linker satisfies the requirement immediately). + + .syntax unified + .cpu cortex-m4 + .thumb + + .text + .section .isr_vector + .align 2 + .global _isr_vector + .type _isr_vector, %object + +_isr_vector: + /* Startup */ + .word _estack /* top of stack, from linker script. */ + .word program_initialization /* entry point */ + + /* Cortex-M core interrupts */ + .word _fault /* -14 NMI. */ + .word HardFault_Handler /* -13 Hard fault. */ + .word _fault /* -12 Mem manage. */ + .word _fault /* -11 Bus fault. */ + .word _fault /* -10 Usage fault. */ + .word _fault /* -9 reserved. */ + .word _fault /* -8 reserved. */ + .word _fault /* -7 reserved. */ + .word _fault /* -6 reserved. */ + .word SVC_Handler /* -5 SVCall. */ + .word _fault /* -4 Breakpoint. */ + .word _fault /* -3 reserved. */ + .word PendSV_Handler /* -2 PendSV. */ + .word SysTick_Handler /* -1 Systick. */ + + /* MCU interrupts */ + .rept 17 /* 0 .. 16, standard */ + .word IRQ_Handler + .endr + + .word RTC1_IRQHandler /* 17, for clock */ + + .rept 8 /* 18 .. 25, standard */ + .word IRQ_Handler + .endr + + .size _isr_vector, . - _isr_vector + + .section .text + + .thumb_func + .type _fault, %function +_fault: b _fault + .size _fault, . - _fault + diff --git a/microbit/adainclude/startup.adb b/microbit/adainclude/startup.adb index d2db2da..9fc089c 100644 --- a/microbit/adainclude/startup.adb +++ b/microbit/adainclude/startup.adb @@ -1,4 +1,4 @@ --- Copyright (C) 2016-2018 Free Software Foundation, Inc. +-- Copyright (C) 2016-2021 Free Software Foundation, Inc. -- -- This file is part of the Cortex GNAT RTS project. This file is -- free software; you can redistribute it and/or modify it under @@ -18,7 +18,6 @@ -- program; see the files COPYING3 and COPYING.RUNTIME respectively. -- If not, see . -with Ada.Interrupts; with Interfaces; with System.Machine_Code; with System.Parameters; @@ -67,11 +66,11 @@ package body Startup is -- _edata: the first address after read/write data in SRAM -- _sbss: the start of BSS (to be initialized to zero) -- _ebss: the first address after BSS. + -- + -- _isr_vector is set up in interrupt_vectors.s. use System.Storage_Elements; - -- ISR_Vector : Storage_Element - -- with Import, Convention => Asm, External_Name => "_isr_vector"; Sdata : Storage_Element with Import, Convention => Asm, External_Name => "_sdata"; Edata : Storage_Element @@ -95,45 +94,12 @@ package body Startup is Bss : Storage_Array (1 .. Bss_Size) with Import, Convention => Ada, External_Name => "_sbss"; - -- type CP_Access is (Denied, Privileged, Reserved, Full) - -- with - -- Size => 2; - -- pragma Unreferenced (Privileged, Reserved); - -- type CP_Accesses is array (0 .. 15) of CP_Access - -- with - -- Component_Size => 2, - -- Size => 32; - -- type SCB_Registers is record - -- VTOR : System.Address; - -- CPACR : CP_Accesses := (others => Denied); - -- end record - -- with - -- Volatile; - -- for SCB_Registers use record - -- VTOR at 16#08# range 0 .. 31; - -- CPACR at 16#88# range 0 .. 31; - -- end record; - - -- SCB : SCB_Registers - -- with - -- Import, - -- Convention => Ada, - -- Address => System'To_Address (16#E000_ED00#); - begin -- Copy data to SRAM Data_In_Sram := Data_In_Flash; -- Initialize BSS in SRAM Bss := (others => 0); - -- -- Enable FPU - -- SCB.CPACR := (10 => Full, 11 => Full, others => Denied); - -- -- Wait for store to complete, restart pipeline - -- System.Machine_Code.Asm ("dsb", Volatile => True); - -- System.Machine_Code.Asm ("isb", Volatile => True); - - -- SCB.VTOR := ISR_Vector'Address; - Set_Up_Heap; Set_Up_Clock; @@ -144,29 +110,19 @@ package body Startup is System.FreeRTOS.Tasks.Start_Scheduler; end Program_Initialization; - ------------------------- - -- Interrupt vectors -- - ------------------------- + -------------------------- + -- Interrupt Handlers -- + -------------------------- - -- Vector Table, STM32F4xxxx Reference Manual DocID018909 Rev 11 - -- Table 62. + -- The interrupt vector is set up in interrupt_vectors.s, using + -- the handlers defined here. - procedure Dummy_Handler; - procedure Dummy_Handler is - IPSR : Interfaces.Unsigned_32 - with Volatile; -- don't want it to be optimised away - begin - System.Machine_Code.Asm - ("mrs %0, ipsr", - Outputs => Interfaces.Unsigned_32'Asm_Output ("=r", IPSR), - Volatile => True); - loop - null; - end loop; - end Dummy_Handler; + -- These handlers are all defined as Weak so that they can be + -- replaced by real handlers at link time. - -- The remaining handlers are all defined as Weak so that they can - -- be replaced by real handlers at link time. + -- If we defined the weak handlers in interrupt_vectors.s, the + -- references would be satisfied internally and so couldn't be + -- replaced by the real handler. procedure HardFault_Handler with Export, Convention => Ada, External_Name => "HardFault_Handler"; @@ -178,6 +134,7 @@ package body Startup is end loop; end HardFault_Handler; + -- Provided by FreeRTOS. procedure SVC_Handler with Export, Convention => Ada, External_Name => "SVC_Handler"; pragma Weak_External (SVC_Handler); @@ -188,6 +145,7 @@ package body Startup is end loop; end SVC_Handler; + -- Provided by FreeRTOS. procedure PendSV_Handler with Export, Convention => Ada, External_Name => "PendSV_Handler"; pragma Weak_External (PendSV_Handler); @@ -198,6 +156,7 @@ package body Startup is end loop; end PendSV_Handler; + -- Provided by FreeRTOS. procedure SysTick_Handler with Export, Convention => Ada, External_Name => "SysTick_Handler"; pragma Weak_External (SysTick_Handler); @@ -236,26 +195,4 @@ package body Startup is end loop; end IRQ_Handler; - type Handler is access procedure; - - use type Ada.Interrupts.Interrupt_ID; - Vectors : array (-14 .. Ada.Interrupts.Interrupt_ID'Last) of Handler := - (-9 .. -6 | -4 .. -3 => null, -- reserved - -14 => Dummy_Handler'Access, -- NMI - -13 => HardFault_Handler'Access, -- HardFault - -12 => Dummy_Handler'Access, -- MemManagement - -11 => Dummy_Handler'Access, -- BusFault - -10 => Dummy_Handler'Access, -- UsageFault - -5 => SVC_Handler'Access, -- SVCall - -2 => PendSV_Handler'Access, -- PendSV - -1 => SysTick_Handler'Access, -- SysTick - 0 .. 16 => IRQ_Handler'Access, - 17 => RTC1_IRQHandler'Access, - others => IRQ_Handler'Access) - with - Export, - Convention => Ada, - External_Name => "isr_vector"; - pragma Linker_Section (Vectors, ".isr_vector"); - end Startup; diff --git a/microbit/adalib/nrf51.ld b/microbit/adalib/nrf51.ld index 0a48242..58ec19c 100644 --- a/microbit/adalib/nrf51.ld +++ b/microbit/adalib/nrf51.ld @@ -1,6 +1,7 @@ /* The MIT License * * Copyright (c) 2007, 2008, 2009, 2010 Dado Sutter and Bogdan Marinescu + * Copyright (c) 2018-2021 Simon Wright * * Permission is hereby granted, free of charge, to any person obtaining * a copy of this software and associated documentation files (the @@ -48,20 +49,12 @@ MEMORY SECTIONS { - .isr_vector : - { - . = ALIGN(4); - _isr_vector = .; - LONG(_estack) - LONG(program_initialization + 1) - KEEP(*(.isr_vector)) - } > flash - .text : { . = ALIGN(4); - /* _text = .; */ - /* PROVIDE(stext = .);*/ + *(.isr_vector) + . = ALIGN(512); + *(.text) *(.text.*) *(.gnu.linkonce.t.*) diff --git a/microbit/build_runtime.gpr b/microbit/build_runtime.gpr index 4cd6dc1..2d0a707 100644 --- a/microbit/build_runtime.gpr +++ b/microbit/build_runtime.gpr @@ -1,4 +1,4 @@ --- Copyright (C) 2016-2020 Free Software Foundation, Inc. +-- Copyright (C) 2016-2021 Free Software Foundation, Inc. -- This file is part of the Cortex GNAT RTS package. -- @@ -21,7 +21,7 @@ with "../FreeRTOS"; library project Build_Runtime is - for Languages use ("Ada", "C"); + for Languages use ("Ada", "C", "ASM"); for Library_Auto_Init use "False"; for Library_Name use "gnat"; @@ -33,7 +33,6 @@ library project Build_Runtime is for Source_Dirs use Common.Paths & ( "adainclude", - "nrf51", FreeRTOS.Source, FreeRTOS.Portable_Base & "ARM_CM0" ); @@ -95,7 +94,7 @@ library project Build_Runtime is for Switches ("s-assert.adb") use ALL_ADAFLAGS & ("-g"); for Switches ("a-tags.adb") use ALL_ADAFLAGS & ("-g"); for Switches ("last_chance_handler.c") use ALL_CFLAGS & ("-g", "-O0"); - for Switches ("hardfault_handling.adb") use ALL_ADAFLAGS & ("-g", "-O0"); + for Switches ("s-harhan.adb") use ALL_ADAFLAGS & ("-g", "-O0"); for Switches ("nrf51-swi.ads") use ALL_ADAFLAGS & ("-gnatwU"); end Compiler; diff --git a/microbit/runtime.xml b/microbit/runtime.xml index 96a4e85..fddc7ca 100644 --- a/microbit/runtime.xml +++ b/microbit/runtime.xml @@ -18,8 +18,11 @@ Common_Required_Switches; end Compiler; + -- Note, we have to force the link of _isr_vector, because in the m0 + -- it can't be relocated, so not referenced from startup.adb. package Linker is for Required_Switches use Linker'Required_Switches & + ("-Wl,--require-defined=_isr_vector") & ("${RUNTIME_DIR(ada)}/adalib/libgnat.a") & Compiler.Common_Required_Switches & ("-nostdlib", "-lm", "-lgcc", "-lc"); diff --git a/stm32f4/adainclude/interrupt_vectors.s b/stm32f4/adainclude/interrupt_vectors.s new file mode 100644 index 0000000..2bec017 --- /dev/null +++ b/stm32f4/adainclude/interrupt_vectors.s @@ -0,0 +1,71 @@ + @ Copyright (C) 2021 Free Software Foundation, Inc. + + @ This file is part of the Cortex GNAT RTS project. This file is + @ free software; you can redistribute it and/or modify it under + @ terms of the GNU General Public License as published by the Free + @ Software Foundation; either version 3, or (at your option) any + @ later version. This file is distributed in the hope that it will + @ be useful, but WITHOUT ANY WARRANTY; without even the implied + @ warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. + + @ As a special exception under Section 7 of GPL version 3, you are + @ granted additional permissions described in the GCC Runtime + @ Library Exception, version 3.1, as published by the Free Software + @ Foundation. + + @ You should have received a copy of the GNU General Public License + @ and a copy of the GCC Runtime Library Exception along with this + @ program; see the files COPYING3 and COPYING.RUNTIME respectively. + @ If not, see . + + @ This is the Vector Table, described in STM32F4xxxx Reference + @ Manual DocID018909 Rev 11 Table 62. + + @ The capitalized handlers are defined in startup.adb, using + @ weak symbols (they can't be defined here, unlike _fault, or + @ the linker satisfies the requirement immediately). + + .syntax unified + .cpu cortex-m4 + .thumb + + .text + .section .isr_vector + .align 2 + .global _isr_vector + .type _isr_vector, %object + +_isr_vector: + /* Startup */ + .word _estack /* top of stack, from linker script. */ + .word program_initialization /* entry point */ + + /* Cortex-M core interrupts */ + .word _fault /* -14 NMI. */ + .word HardFault_Handler /* -13 Hard fault. */ + .word _fault /* -12 Mem manage. */ + .word _fault /* -11 Bus fault. */ + .word _fault /* -10 Usage fault. */ + .word _fault /* -9 reserved. */ + .word _fault /* -8 reserved. */ + .word _fault /* -7 reserved. */ + .word _fault /* -6 reserved. */ + .word SVC_Handler /* -5 SVCall. */ + .word _fault /* -4 Breakpoint. */ + .word _fault /* -3 reserved. */ + .word PendSV_Handler /* -2 PendSV. */ + .word SysTick_Handler /* -1 Systick. */ + + /* MCU interrupts, 0 .. 81 (to match System.Interrupts.Interrupt_ID */ + .rept 82 + .word IRQ_Handler + .endr + .size _isr_vector, . - _isr_vector + + .section .text + + .thumb_func + .type _fault, %function +_fault: b _fault + .size _fault, . - _fault + diff --git a/stm32f4/adainclude/startup-set_up_clock.adb b/stm32f4/adainclude/startup-set_up_clock.adb index 44cad87..384f7fd 100644 --- a/stm32f4/adainclude/startup-set_up_clock.adb +++ b/stm32f4/adainclude/startup-set_up_clock.adb @@ -1,4 +1,4 @@ --- Copyright (C) 2016 Free Software Foundation, Inc. +-- Copyright (C) 2016-2021 Free Software Foundation, Inc. -- -- This file is part of the Cortex GNAT RTS project. This file is -- free software; you can redistribute it and/or modify it under @@ -28,133 +28,95 @@ procedure Set_Up_Clock is begin -- Enable PWR clock - declare - APB1ENR : APB1ENR_Register; - begin - APB1ENR := RCC_Periph.APB1ENR; - APB1ENR.PWREN := 1; - RCC_Periph.APB1ENR := APB1ENR; - end; + RCC_Periph.APB1ENR.PWREN := 1; -- Set highest voltage for maximum frequency (168 MHz). -- DocID022152 Rev 6 Table 14. -- Postpone wait-until-ready until PLL is in use. - declare - CR : STM32F40x.PWR.CR_Register; - begin - CR := PWR_Periph.CR; - CR.VOS := 1; - PWR_Periph.CR := CR; - end; + PWR_Periph.CR.VOS := 1; -- Setup internal high-speed clock and wait for stabilisation. - declare - CR : STM32F40x.RCC.CR_Register; - begin - CR := RCC_Periph.CR; - CR.HSION := 1; - RCC_Periph.CR := CR; - loop - CR := RCC_Periph.CR; - exit when CR.HSIRDY = 1; - end loop; - end; + RCC_Periph.CR.HSION := 1; + loop + exit when RCC_Periph.CR.HSIRDY = 1; + end loop; -- Setup external high-speed clock and wait for stabilisation. - declare - CR : STM32F40x.RCC.CR_Register; - begin - CR := RCC_Periph.CR; - CR.HSEON := 1; - -- Don't set HSEBYP (i.e. don't bypass external oscillator) - RCC_Periph.CR := CR; - loop - CR := RCC_Periph.CR; - exit when CR.HSERDY = 1; - end loop; - end; + RCC_Periph.CR.HSEON := 1; + -- Don't set HSEBYP (i.e. don't bypass external oscillator) + loop + exit when RCC_Periph.CR.HSERDY = 1; + end loop; -- Setup internal low-speed clock and wait for stabilisation. - declare - CSR : STM32F40x.RCC.CSR_Register; - begin - CSR := RCC_Periph.CSR; - CSR.LSION := 1; - RCC_Periph.CSR := CSR; - loop - CSR := RCC_Periph.CSR; - exit when CSR.LSIRDY = 1; - end loop; - end; + RCC_Periph.CSR.LSION := 1; + loop + exit when RCC_Periph.CSR.LSIRDY = 1; + end loop; -- Activate the PLL at 168 MHz. -- See RM0090 5.1.4 for how to enter overdrive mode and enable -- SYSCLK of 180 MHz. declare - CR : STM32F40x.RCC.CR_Register; + PLLCFGR : constant PLLCFGR_Register + := (PLLM => 8, + PLLN => 336, -- no overdrive: 168 MHz + PLLP => 0, -- *2 + PLLSRC => 1, -- HSE + PLLQ => 7, + others => <>); begin - RCC_Periph.PLLCFGR := (PLLM => 8, - PLLN => 336, -- no overdrive: 168 MHz - PLLP => 0, -- *2 - PLLSRC => 1, -- HSE - PLLQ => 7, - others => <>); - CR := RCC_Periph.CR; - CR.PLLON := 1; - RCC_Periph.CR := CR; - loop - CR := RCC_Periph.CR; - exit when CR.PLLRDY = 1; - end loop; + RCC_Periph.PLLCFGR := PLLCFGR; end; + RCC_Periph.CR.PLLON := 1; + loop + exit when RCC_Periph.CR.PLLRDY = 1; + end loop; -- Wait until voltage supply scaling is ready (must be after PLL -- is ready). - declare - CSR : STM32F40x.PWR.CSR_Register; - begin - loop - CSR := PWR_Periph.CSR; - exit when CSR.VOSRDY = 1; - end loop; - end; + loop + exit when PWR_Periph.CSR.VOSRDY = 1; + end loop; -- Set flash latency to 5 wait states _before_ increasing the clock. declare - ACR : STM32F40x.FLASH.ACR_Register; + ACR : constant STM32F40x.FLASH.ACR_Register + := (LATENCY => 5, + PRFTEN => 1, + ICEN => 1, + DCEN => 1, + others => <>); use type STM32F40x.UInt3; begin - FLASH_Periph.ACR := (LATENCY => 5, - PRFTEN => 1, - ICEN => 1, - DCEN => 1, - others => <>); + FLASH_Periph.ACR := ACR; + -- Not sure we need to check this. loop - ACR := FLASH_Periph.ACR; - exit when ACR.LATENCY = 5; + exit when FLASH_Periph.ACR.LATENCY = 5; end loop; end; -- Configure clocks. - RCC_Periph.CFGR := - (SW => 2, -- clock source is PLL - HPRE => 0, -- AHB prescale = 1 - PPRE => (As_Array => True, - Arr => (5, -- APB lo speed prescale (PPRE1) = 4 - 4)), -- APB hi speed prescale (PPRE2) = 2 - MCO1 => 0, -- MCU clock output 1 HSI selected - MCO1PRE => 0, -- MCU clock output 1 prescale = 1 - MCO2 => 0, -- MCU clock output 2 SYSCLK selected - MCO2PRE => 7, -- MCU clock output 2 prescale = 5 - others => <>); declare - CFGR : STM32F40x.RCC.CFGR_Register; + CFGR : constant STM32F40x.RCC.CFGR_Register + := (SW => 2, -- clock source is PLL + HPRE => 0, -- AHB prescale = 1 + PPRE => (As_Array => True, + Arr => (5, -- APB lo speed prescale (PPRE1) = 4 + 4)), -- APB hi speed prescale (PPRE2) = 2 + MCO1 => 0, -- MCU clock output 1 HSI selected + MCO1PRE => 0, -- MCU clock output 1 prescale = 1 + MCO2 => 0, -- MCU clock output 2 SYSCLK selected + MCO2PRE => 7, -- MCU clock output 2 prescale = 5 + others => <>); use type STM32F40x.UInt2; begin + RCC_Periph.CFGR := CFGR; + + -- Wait until PLL running loop - CFGR := RCC_Periph.CFGR; - exit when CFGR.SWS = 2; -- PLL running + exit when RCC_Periph.CFGR.SWS = 2; end loop; end; diff --git a/stm32f4/adainclude/startup.adb b/stm32f4/adainclude/startup.adb index 254b489..63fd891 100644 --- a/stm32f4/adainclude/startup.adb +++ b/stm32f4/adainclude/startup.adb @@ -1,4 +1,4 @@ --- Copyright (C) 2016-2018 Free Software Foundation, Inc. +-- Copyright (C) 2016-2021 Free Software Foundation, Inc. -- -- This file is part of the Cortex GNAT RTS project. This file is -- free software; you can redistribute it and/or modify it under @@ -18,7 +18,6 @@ -- program; see the files COPYING3 and COPYING.RUNTIME respectively. -- If not, see . -with Ada.Interrupts.Names; with Interfaces; with System.Machine_Code; with System.Parameters; @@ -67,6 +66,8 @@ package body Startup is -- _edata: the first address after read/write data in SRAM -- _sbss: the start of BSS (to be initialized to zero) -- _ebss: the first address after BSS. + -- + -- _isr_vector is set up in interrupt_vectors.s. use System.Storage_Elements; @@ -144,29 +145,19 @@ package body Startup is System.FreeRTOS.Tasks.Start_Scheduler; end Program_Initialization; - ------------------------- - -- Interrupt vectors -- - ------------------------- + -------------------------- + -- Interrupt Handlers -- + -------------------------- - -- Vector Table, STM32F4xxxx Reference Manual DocID018909 Rev 11 - -- Table 62. + -- The interrupt vector is set up in interrupt_vectors.s, using + -- the handlers defined here. - procedure Dummy_Handler; - procedure Dummy_Handler is - IPSR : Interfaces.Unsigned_32 - with Volatile; -- don't want it to be optimised away - begin - System.Machine_Code.Asm - ("mrs %0, ipsr", - Outputs => Interfaces.Unsigned_32'Asm_Output ("=r", IPSR), - Volatile => True); - loop - null; - end loop; - end Dummy_Handler; + -- These handlers are all defined as Weak so that they can be + -- replaced by real handlers at link time. - -- The remaining handlers are all defined as Weak so that they can - -- be replaced by real handlers at link time. + -- If we defined the weak handlers in interrupt_vectors.s, the + -- references would be satisfied internally and so couldn't be + -- replaced by the real handler. procedure HardFault_Handler with Export, Convention => Ada, External_Name => "HardFault_Handler"; @@ -178,6 +169,7 @@ package body Startup is end loop; end HardFault_Handler; + -- Provided by FreeRTOS. procedure SVC_Handler with Export, Convention => Ada, External_Name => "SVC_Handler"; pragma Weak_External (SVC_Handler); @@ -188,6 +180,7 @@ package body Startup is end loop; end SVC_Handler; + -- Provided by FreeRTOS. procedure PendSV_Handler with Export, Convention => Ada, External_Name => "PendSV_Handler"; pragma Weak_External (PendSV_Handler); @@ -198,6 +191,7 @@ package body Startup is end loop; end PendSV_Handler; + -- Provided by FreeRTOS. procedure SysTick_Handler with Export, Convention => Ada, External_Name => "SysTick_Handler"; pragma Weak_External (SysTick_Handler); @@ -226,24 +220,4 @@ package body Startup is end loop; end IRQ_Handler; - type Handler is access procedure; - - use type Ada.Interrupts.Interrupt_ID; - Vectors : array (-14 .. Ada.Interrupts.Names.FPU_IRQ) of Handler := - (-9 .. -6 | -4 .. -3 => null, -- reserved - -14 => Dummy_Handler'Access, -- NMI - -13 => HardFault_Handler'Access, -- HardFault - -12 => Dummy_Handler'Access, -- MemManagement - -11 => Dummy_Handler'Access, -- BusFault - -10 => Dummy_Handler'Access, -- UsageFault - -5 => SVC_Handler'Access, -- SVCall - -2 => PendSV_Handler'Access, -- PendSV - -1 => SysTick_Handler'Access, -- SysTick - others => IRQ_Handler'Access) - with - Export, - Convention => Ada, - External_Name => "isr_vector"; - pragma Linker_Section (Vectors, ".isr_vector"); - end Startup; diff --git a/stm32f4/adalib/stm32f407-flash.ld b/stm32f4/adalib/stm32f407-flash.ld index e665c45..e8dc2b5 100644 --- a/stm32f4/adalib/stm32f407-flash.ld +++ b/stm32f4/adalib/stm32f407-flash.ld @@ -1,6 +1,7 @@ /* The MIT License * * Copyright (c) 2007, 2008, 2009, 2010 Dado Sutter and Bogdan Marinescu + * Copyright (c) 2012-2021 Simon Wright * * Permission is hereby granted, free of charge, to any person obtaining * a copy of this software and associated documentation files (the @@ -50,6 +51,8 @@ EXTERN(_init) START_OFFSET = DEFINED (START_OFFSET) ? START_OFFSET : 0; +/* Pick up the interrupt vectors from interrupt_vectors.s */ + MEMORY { flash (RX) : ORIGIN = 0x08000000 + START_OFFSET, @@ -60,20 +63,12 @@ MEMORY SECTIONS { - .isr_vector : - { - . = ALIGN(4); - _isr_vector = .; - LONG(_estack) - LONG(program_initialization + 1) - KEEP(*(.isr_vector)) - } > flash - .text : { . = ALIGN(4); - /* _text = .; */ - /* PROVIDE(stext = .);*/ + *(.isr_vector) + . = ALIGN(512); + *(.text) *(.text.*) *(.gnu.linkonce.t.*) @@ -159,7 +154,7 @@ SECTIONS } >sram end = .; - PROVIDE( _estack = 0x20020000); + PROVIDE(_estack = ORIGIN(sram) + LENGTH(sram)); /DISCARD/ : { *(.note.GNU-stack) *(.gnu_debuglink) *(.gnu.lto_*) } diff --git a/stm32f4/build_runtime.gpr b/stm32f4/build_runtime.gpr index 844b3d1..a1503cf 100644 --- a/stm32f4/build_runtime.gpr +++ b/stm32f4/build_runtime.gpr @@ -21,7 +21,7 @@ with "../FreeRTOS"; library project Build_Runtime is - for Languages use ("Ada", "C"); + for Languages use ("Ada", "C", "ASM"); for Library_Auto_Init use "False"; for Library_Name use "gnat"; @@ -94,7 +94,7 @@ library project Build_Runtime is for Switches ("s-assert.adb") use ALL_ADAFLAGS & ("-g"); for Switches ("a-tags.adb") use ALL_ADAFLAGS & ("-g"); for Switches ("last_chance_handler.c") use ALL_CFLAGS & ("-g", "-O0"); - for Switches ("hardfault_handling.adb") use ALL_ADAFLAGS & ("-g", "-O0"); + for Switches ("s-harhan.adb") use ALL_ADAFLAGS & ("-g", "-O0"); end Compiler; package Install is diff --git a/stm32f429i/adainclude/interrupt_vectors.s b/stm32f429i/adainclude/interrupt_vectors.s new file mode 100644 index 0000000..7855d65 --- /dev/null +++ b/stm32f429i/adainclude/interrupt_vectors.s @@ -0,0 +1,71 @@ + @ Copyright (C) 2021 Free Software Foundation, Inc. + + @ This file is part of the Cortex GNAT RTS project. This file is + @ free software; you can redistribute it and/or modify it under + @ terms of the GNU General Public License as published by the Free + @ Software Foundation; either version 3, or (at your option) any + @ later version. This file is distributed in the hope that it will + @ be useful, but WITHOUT ANY WARRANTY; without even the implied + @ warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. + + @ As a special exception under Section 7 of GPL version 3, you are + @ granted additional permissions described in the GCC Runtime + @ Library Exception, version 3.1, as published by the Free Software + @ Foundation. + + @ You should have received a copy of the GNU General Public License + @ and a copy of the GCC Runtime Library Exception along with this + @ program; see the files COPYING3 and COPYING.RUNTIME respectively. + @ If not, see . + + @ This is the Vector Table, described in STM32F4xxxx Reference + @ Manual DocID018909 Rev 11 Table 62. + + @ The capitalized handlers are defined in startup.adb, using + @ weak symbols (they can't be defined here, unlike _fault, or + @ the linker satisfies the requirement immediately). + + .syntax unified + .cpu cortex-m4 + .thumb + + .text + .section .isr_vector + .align 2 + .global _isr_vector + .type _isr_vector, %object + +_isr_vector: + /* Startup */ + .word _estack /* top of stack, from linker script. */ + .word program_initialization /* entry point */ + + /* Cortex-M core interrupts */ + .word _fault /* -14 NMI. */ + .word HardFault_Handler /* -13 Hard fault. */ + .word _fault /* -12 Mem manage. */ + .word _fault /* -11 Bus fault. */ + .word _fault /* -10 Usage fault. */ + .word _fault /* -9 reserved. */ + .word _fault /* -8 reserved. */ + .word _fault /* -7 reserved. */ + .word _fault /* -6 reserved. */ + .word SVC_Handler /* -5 SVCall. */ + .word _fault /* -4 Breakpoint. */ + .word _fault /* -3 reserved. */ + .word PendSV_Handler /* -2 PendSV. */ + .word SysTick_Handler /* -1 Systick. */ + + /* MCU interrupts, 0 .. 90 (to match System.Interrupts.Interrupt_ID */ + .rept 91 + .word IRQ_Handler + .endr + .size _isr_vector, . - _isr_vector + + .section .text + + .thumb_func + .type _fault, %function +_fault: b _fault + .size _fault, . - _fault + diff --git a/stm32f429i/adainclude/startup-set_up_clock.adb b/stm32f429i/adainclude/startup-set_up_clock.adb index f45c9dd..abb5bbe 100644 --- a/stm32f429i/adainclude/startup-set_up_clock.adb +++ b/stm32f429i/adainclude/startup-set_up_clock.adb @@ -1,4 +1,4 @@ --- Copyright (C) 2016 Free Software Foundation, Inc. +-- Copyright (C) 2016-2021 Free Software Foundation, Inc. -- -- This file is part of the Cortex GNAT RTS project. This file is -- free software; you can redistribute it and/or modify it under @@ -28,134 +28,96 @@ procedure Set_Up_Clock is begin -- Enable PWR clock - declare - APB1ENR : APB1ENR_Register; - begin - APB1ENR := RCC_Periph.APB1ENR; - APB1ENR.PWREN := 1; - RCC_Periph.APB1ENR := APB1ENR; - end; + RCC_Periph.APB1ENR.PWREN := 1; -- Set highest voltage for maximum frequency (168 MHz, or 180 MHz -- w/ overdrive). -- DocID024030 Rev 4 Table 17 Row V12. -- Postpone wait-until-ready until PLL is in use. - declare - CR : STM32F429x.PWR.CR_Register; - begin - CR := PWR_Periph.CR; - CR.VOS := 3; - PWR_Periph.CR := CR; - end; + PWR_Periph.CR.VOS := 3; -- Setup internal high-speed clock and wait for stabilisation. - declare - CR : STM32F429x.RCC.CR_Register; - begin - CR := RCC_Periph.CR; - CR.HSION := 1; - RCC_Periph.CR := CR; - loop - CR := RCC_Periph.CR; - exit when CR.HSIRDY = 1; - end loop; - end; + RCC_Periph.CR.HSION := 1; + loop + exit when RCC_Periph.CR.HSIRDY = 1; + end loop; -- Setup external high-speed clock and wait for stabilisation. - declare - CR : STM32F429x.RCC.CR_Register; - begin - CR := RCC_Periph.CR; - CR.HSEON := 1; - -- Don't set HSEBYP (i.e. don't bypass external oscillator) - RCC_Periph.CR := CR; - loop - CR := RCC_Periph.CR; - exit when CR.HSERDY = 1; - end loop; - end; + RCC_Periph.CR.HSEON := 1; + -- Don't set HSEBYP (i.e. don't bypass external oscillator) + loop + exit when RCC_Periph.CR.HSERDY = 1; + end loop; -- Setup internal low-speed clock and wait for stabilisation. - declare - CSR : STM32F429x.RCC.CSR_Register; - begin - CSR := RCC_Periph.CSR; - CSR.LSION := 1; - RCC_Periph.CSR := CSR; - loop - CSR := RCC_Periph.CSR; - exit when CSR.LSIRDY = 1; - end loop; - end; + RCC_Periph.CSR.LSION := 1; + loop + exit when RCC_Periph.CSR.LSIRDY = 1; + end loop; -- Activate the PLL at 168 MHz. -- See RM0090 5.1.4 for how to enter overdrive mode and enable -- SYSCLK of 180 MHz. declare - CR : STM32F429x.RCC.CR_Register; + PLLCFGR : constant STM32F429x.RCC.PLLCFGR_Register + := (PLLM => 8, + PLLN => 336, -- no overdrive: 168 MHz + PLLP => 0, -- *2 + PLLSRC => 1, -- HSE + PLLQ => 7, + others => <>); begin - RCC_Periph.PLLCFGR := (PLLM => 8, - PLLN => 336, -- no overdrive: 168 MHz - PLLP => 0, -- *2 - PLLSRC => 1, -- HSE - PLLQ => 7, - others => <>); - CR := RCC_Periph.CR; - CR.PLLON := 1; - RCC_Periph.CR := CR; - loop - CR := RCC_Periph.CR; - exit when CR.PLLRDY = 1; - end loop; + RCC_Periph.PLLCFGR := PLLCFGR; end; + RCC_Periph.CR.PLLON := 1; + loop + exit when RCC_Periph.CR.PLLRDY = 1; + end loop; -- Wait until voltage supply scaling is ready (must be after PLL -- is ready). - declare - CSR : STM32F429x.PWR.CSR_Register; - begin - loop - CSR := PWR_Periph.CSR; - exit when CSR.VOSRDY = 1; - end loop; - end; + loop + exit when PWR_Periph.CSR.VOSRDY = 1; + end loop; -- Set flash latency to 5 wait states _before_ increasing the clock. declare - ACR : STM32F429x.FLASH.ACR_Register; + ACR : constant STM32F429x.FLASH.ACR_Register + := (LATENCY => 5, + PRFTEN => 1, + ICEN => 1, + DCEN => 1, + others => <>); use type STM32F429x.UInt3; begin - FLASH_Periph.ACR := (LATENCY => 5, - PRFTEN => 1, - ICEN => 1, - DCEN => 1, - others => <>); + FLASH_Periph.ACR := ACR; + -- Not sure we need to check this. loop - ACR := FLASH_Periph.ACR; - exit when ACR.LATENCY = 5; + exit when FLASH_Periph.ACR.LATENCY = 5; end loop; end; -- Configure clocks. - RCC_Periph.CFGR := - (SW => 2, -- clock source is PLL - HPRE => 0, -- AHB prescale = 1 - PPRE => (As_Array => True, - Arr => (5, -- APB lo speed prescale (PPRE1) = 4 - 4)), -- APB hi speed prescale (PPRE2) = 2 - MCO1 => 0, -- MCU clock output 1 HSI selected - MCO1PRE => 0, -- MCU clock output 1 prescale = 1 - MCO2 => 0, -- MCU clock output 2 SYSCLK selected - MCO2PRE => 7, -- MCU clock output 2 prescale = 5 - others => <>); declare - CFGR : STM32F429x.RCC.CFGR_Register; + CFGR : constant STM32F429x.RCC.CFGR_Register + := (SW => 2, -- clock source is PLL + HPRE => 0, -- AHB prescale = 1 + PPRE => (As_Array => True, + Arr => (5, -- APB lo speed prescale (PPRE1) = 4 + 4)), -- APB hi speed prescale (PPRE2) = 2 + MCO1 => 0, -- MCU clock output 1 HSI selected + MCO1PRE => 0, -- MCU clock output 1 prescale = 1 + MCO2 => 0, -- MCU clock output 2 SYSCLK selected + MCO2PRE => 7, -- MCU clock output 2 prescale = 5 + others => <>); use type STM32F429x.UInt2; begin + RCC_Periph.CFGR := CFGR; + + -- Wait until PLL running loop - CFGR := RCC_Periph.CFGR; - exit when CFGR.SWS = 2; -- PLL running + exit when RCC_Periph.CFGR.SWS = 2; end loop; end; diff --git a/stm32f429i/adainclude/startup.adb b/stm32f429i/adainclude/startup.adb index 1683fbb..63fd891 100644 --- a/stm32f429i/adainclude/startup.adb +++ b/stm32f429i/adainclude/startup.adb @@ -1,4 +1,4 @@ --- Copyright (C) 2016-2018 Free Software Foundation, Inc. +-- Copyright (C) 2016-2021 Free Software Foundation, Inc. -- -- This file is part of the Cortex GNAT RTS project. This file is -- free software; you can redistribute it and/or modify it under @@ -18,7 +18,6 @@ -- program; see the files COPYING3 and COPYING.RUNTIME respectively. -- If not, see . -with Ada.Interrupts.Names; with Interfaces; with System.Machine_Code; with System.Parameters; @@ -67,6 +66,8 @@ package body Startup is -- _edata: the first address after read/write data in SRAM -- _sbss: the start of BSS (to be initialized to zero) -- _ebss: the first address after BSS. + -- + -- _isr_vector is set up in interrupt_vectors.s. use System.Storage_Elements; @@ -144,29 +145,19 @@ package body Startup is System.FreeRTOS.Tasks.Start_Scheduler; end Program_Initialization; - ------------------------- - -- Interrupt vectors -- - ------------------------- + -------------------------- + -- Interrupt Handlers -- + -------------------------- - -- Vector Table, STM32F4xxxx Reference Manual DocID018909 Rev 11 - -- Table 62. + -- The interrupt vector is set up in interrupt_vectors.s, using + -- the handlers defined here. - procedure Dummy_Handler; - procedure Dummy_Handler is - IPSR : Interfaces.Unsigned_32 - with Volatile; -- don't want it to be optimised away - begin - System.Machine_Code.Asm - ("mrs %0, ipsr", - Outputs => Interfaces.Unsigned_32'Asm_Output ("=r", IPSR), - Volatile => True); - loop - null; - end loop; - end Dummy_Handler; + -- These handlers are all defined as Weak so that they can be + -- replaced by real handlers at link time. - -- The remaining handlers are all defined as Weak so that they can - -- be replaced by real handlers at link time. + -- If we defined the weak handlers in interrupt_vectors.s, the + -- references would be satisfied internally and so couldn't be + -- replaced by the real handler. procedure HardFault_Handler with Export, Convention => Ada, External_Name => "HardFault_Handler"; @@ -178,6 +169,7 @@ package body Startup is end loop; end HardFault_Handler; + -- Provided by FreeRTOS. procedure SVC_Handler with Export, Convention => Ada, External_Name => "SVC_Handler"; pragma Weak_External (SVC_Handler); @@ -188,6 +180,7 @@ package body Startup is end loop; end SVC_Handler; + -- Provided by FreeRTOS. procedure PendSV_Handler with Export, Convention => Ada, External_Name => "PendSV_Handler"; pragma Weak_External (PendSV_Handler); @@ -198,6 +191,7 @@ package body Startup is end loop; end PendSV_Handler; + -- Provided by FreeRTOS. procedure SysTick_Handler with Export, Convention => Ada, External_Name => "SysTick_Handler"; pragma Weak_External (SysTick_Handler); @@ -226,24 +220,4 @@ package body Startup is end loop; end IRQ_Handler; - type Handler is access procedure; - - use type Ada.Interrupts.Interrupt_ID; - Vectors : array (-14 .. Ada.Interrupts.Names.DMA2D_IRQ) of Handler := - (-9 .. -6 | -4 .. -3 => null, -- reserved - -14 => Dummy_Handler'Access, -- NMI - -13 => HardFault_Handler'Access, -- HardFault - -12 => Dummy_Handler'Access, -- MemManagement - -11 => Dummy_Handler'Access, -- BusFault - -10 => Dummy_Handler'Access, -- UsageFault - -5 => SVC_Handler'Access, -- SVCall - -2 => PendSV_Handler'Access, -- PendSV - -1 => SysTick_Handler'Access, -- SysTick - others => IRQ_Handler'Access) - with - Export, - Convention => Ada, - External_Name => "isr_vector"; - pragma Linker_Section (Vectors, ".isr_vector"); - end Startup; diff --git a/stm32f429i/adalib/stm32f429i-flash.ld b/stm32f429i/adalib/stm32f429i-flash.ld index 9fd289c..cf8966f 100644 --- a/stm32f429i/adalib/stm32f429i-flash.ld +++ b/stm32f429i/adalib/stm32f429i-flash.ld @@ -1,6 +1,7 @@ /* The MIT License * * Copyright (c) 2007, 2008, 2009, 2010 Dado Sutter and Bogdan Marinescu + * Copyright (c) 2012-2021 Simon Wright * * Permission is hereby granted, free of charge, to any person obtaining * a copy of this software and associated documentation files (the @@ -49,20 +50,12 @@ MEMORY SECTIONS { - .isr_vector : - { - . = ALIGN(4); - _isr_vector = .; - LONG(_estack) - LONG(program_initialization + 1) - KEEP(*(.isr_vector)) - } > flash - .text : { . = ALIGN(4); - /* _text = .; */ - /* PROVIDE(stext = .);*/ + *(.isr_vector) + . = ALIGN(512); + *(.text) *(.text.*) *(.gnu.linkonce.t.*) @@ -148,7 +141,7 @@ SECTIONS } >sram end = .; - PROVIDE( _estack = 0x20030000); + PROVIDE(_estack = ORIGIN(sram) + LENGTH(sram)); /DISCARD/ : { *(.note.GNU-stack) *(.gnu_debuglink) *(.gnu.lto_*) } diff --git a/stm32f429i/build_runtime.gpr b/stm32f429i/build_runtime.gpr index ec7a0d6..3d7ebbf 100644 --- a/stm32f429i/build_runtime.gpr +++ b/stm32f429i/build_runtime.gpr @@ -21,7 +21,7 @@ with "../FreeRTOS"; library project Build_Runtime is - for Languages use ("Ada", "C"); + for Languages use ("Ada", "C", "ASM"); for Library_Auto_Init use "False"; for Library_Name use "gnat"; @@ -94,7 +94,7 @@ library project Build_Runtime is for Switches ("s-assert.adb") use ALL_ADAFLAGS & ("-g"); for Switches ("a-tags.adb") use ALL_ADAFLAGS & ("-g"); for Switches ("last_chance_handler.c") use ALL_CFLAGS & ("-g", "-O0"); - for Switches ("hardfault_handling.adb") use ALL_ADAFLAGS & ("-g", "-O0"); + for Switches ("s-harhan.adb") use ALL_ADAFLAGS & ("-g", "-O0"); end Compiler; package Install is diff --git a/test-microbit/circle.adb b/test-microbit/circle.adb index cb0f8fe..9358aa5 100644 --- a/test-microbit/circle.adb +++ b/test-microbit/circle.adb @@ -1,4 +1,4 @@ --- Copyright (C) 2018,2020 Free Software Foundation, Inc. +-- Copyright (C) 2018-2021 Free Software Foundation, Inc. -- This file is part of the Cortex GNAT RTS package. -- @@ -16,8 +16,10 @@ -- along with this program; see the file COPYING3. If not, see -- . -with Hardfault_Handling; -pragma Unreferenced (Hardfault_Handling); +pragma Warnings (Off, "internal GNAT unit"); +with System.Hardfault_Handling; +pragma Warnings (On, "internal GNAT unit"); +pragma Unreferenced (System.Hardfault_Handling); with Lights; pragma Unreferenced (Lights); diff --git a/test-microbit/events.adb b/test-microbit/events.adb index dea22c9..02e5a29 100644 --- a/test-microbit/events.adb +++ b/test-microbit/events.adb @@ -1,4 +1,4 @@ --- Copyright (C) 2020 Free Software Foundation, Inc. +-- Copyright (C) 2020-2021 Free Software Foundation, Inc. -- This file is part of the Cortex GNAT RTS package. -- @@ -18,8 +18,12 @@ with Event_Support; with Ada.Real_Time.Timing_Events; --- with Hardfault_Handling; --- pragma Unreferenced (Hardfault_Handling); + +pragma Warnings (Off, "internal GNAT unit"); +with System.Hardfault_Handling; +pragma Warnings (On, "internal GNAT unit"); +pragma Unreferenced (System.Hardfault_Handling); + procedure Events is -- Environment_Task_Storage_Size : constant Natural := 1536 -- with @@ -36,5 +40,6 @@ begin (Ada.Real_Time.Timing_Events.Timing_Event (Event_Support.Slow)); Event_Support.Handler (Ada.Real_Time.Timing_Events.Timing_Event (Event_Support.Quick)); + delay until Ada.Real_Time.Time_Last; end Events;