{"payload":{"pageCount":2,"repositories":[{"type":"Public","name":"DECA_board","owner":"DECAfpga","isFork":false,"description":"Documentation and tools related to DECA FPGA board","allTopics":["deca","fpga"],"primaryLanguage":{"name":"Python","color":"#3572A5"},"pullRequestCount":0,"issueCount":0,"starsCount":20,"forksCount":9,"license":null,"participation":null,"lastUpdated":{"hasBeenPushedTo":true,"timestamp":"2024-01-14T00:00:43.027Z"}},{"type":"Public","name":"DECA_binaries","owner":"DECAfpga","isFork":false,"description":"sof & svf binaries of Arcades, Computers & Consoles cores for DECA board","allTopics":["deca","fpga"],"primaryLanguage":null,"pullRequestCount":0,"issueCount":0,"starsCount":2,"forksCount":0,"license":null,"participation":null,"lastUpdated":{"hasBeenPushedTo":true,"timestamp":"2024-01-13T23:01:01.051Z"}},{"type":"Public","name":"Next186_mist","owner":"DECAfpga","isFork":true,"description":"","allTopics":[],"primaryLanguage":{"name":"VHDL","color":"#adb2cb"},"pullRequestCount":0,"issueCount":0,"starsCount":0,"forksCount":10,"license":"GNU General Public License v3.0","participation":null,"lastUpdated":{"hasBeenPushedTo":true,"timestamp":"2024-01-13T22:41:57.410Z"}},{"type":"Public","name":"Oric_Mist_48K","owner":"DECAfpga","isFork":true,"description":"Oric Atmos Mist core","allTopics":[],"primaryLanguage":{"name":"VHDL","color":"#adb2cb"},"pullRequestCount":0,"issueCount":0,"starsCount":0,"forksCount":10,"license":null,"participation":null,"lastUpdated":{"hasBeenPushedTo":true,"timestamp":"2024-01-08T20:01:55.725Z"}},{"type":"Public","name":"NeoGeo_FPGA","owner":"DECAfpga","isFork":true,"description":"NeoGeo FPGA","allTopics":[],"primaryLanguage":{"name":"VHDL","color":"#adb2cb"},"pullRequestCount":0,"issueCount":0,"starsCount":0,"forksCount":76,"license":"GNU General Public License v2.0","participation":null,"lastUpdated":{"hasBeenPushedTo":true,"timestamp":"2023-10-11T16:40:58.526Z"}},{"type":"Public","name":"apple2efpga","owner":"DECAfpga","isFork":true,"description":"FPGA implementation of an Apple//e (enhanced) - Demistified for Deca, Neptuno and Uareloaded. [This fork is only a mirror, not for development]","allTopics":["fpga","computers","cape","cyc1000","demistify","3pins","mergefork"],"primaryLanguage":{"name":"GLSL","color":"#5686a5"},"pullRequestCount":0,"issueCount":0,"starsCount":0,"forksCount":11,"license":null,"participation":null,"lastUpdated":{"hasBeenPushedTo":true,"timestamp":"2023-10-11T16:40:51.624Z"}},{"type":"Public","name":"Arcade_Galaga","owner":"DECAfpga","isFork":false,"description":"Galaga Arcade Core","allTopics":["fpga","bram","arcades"],"primaryLanguage":{"name":"VHDL","color":"#adb2cb"},"pullRequestCount":0,"issueCount":0,"starsCount":8,"forksCount":3,"license":null,"participation":null,"lastUpdated":{"hasBeenPushedTo":true,"timestamp":"2023-08-04T17:36:04.193Z"}},{"type":"Public","name":"FlappyBird","owner":"DECAfpga","isFork":true,"description":"Flappy Bird core for MiSTer, MiST, DeMiSTify, Xilinx, GoWin, ...","allTopics":["bram","arcades","demistify","mergefork"],"primaryLanguage":{"name":"Verilog","color":"#b2b7f8"},"pullRequestCount":0,"issueCount":0,"starsCount":0,"forksCount":7,"license":null,"participation":null,"lastUpdated":{"hasBeenPushedTo":true,"timestamp":"2023-07-09T10:56:01.744Z"}},{"type":"Public","name":"PCXT_DeMiSTify","owner":"DECAfpga","isFork":true,"description":"PCXT deMiSTified ","allTopics":["computers","cape","demistify","mergefork"],"primaryLanguage":{"name":"Verilog","color":"#b2b7f8"},"pullRequestCount":0,"issueCount":0,"starsCount":0,"forksCount":10,"license":"GNU General Public License v3.0","participation":null,"lastUpdated":{"hasBeenPushedTo":true,"timestamp":"2023-06-16T16:16:55.718Z"}},{"type":"Public","name":"sdram_sram_v1.3_mister","owner":"DECAfpga","isFork":true,"description":"Dual 32 MB SDRAM + 2 MB SRAM MiSTer module with 3 extra pins for DECA retro cape 2","allTopics":["deca","mergefork"],"primaryLanguage":null,"pullRequestCount":0,"issueCount":0,"starsCount":1,"forksCount":2,"license":null,"participation":null,"lastUpdated":{"hasBeenPushedTo":true,"timestamp":"2023-06-14T18:27:05.740Z"}},{"type":"Public","name":"ep_DeMiSTify","owner":"DECAfpga","isFork":true,"description":"Elan Enterprise FPGA implementation","allTopics":["computers","cape","demistify","mergefork"],"primaryLanguage":{"name":"VHDL","color":"#adb2cb"},"pullRequestCount":0,"issueCount":0,"starsCount":0,"forksCount":7,"license":null,"participation":null,"lastUpdated":{"hasBeenPushedTo":true,"timestamp":"2023-05-21T21:15:02.643Z"}},{"type":"Public","name":"Mist_FPGA","owner":"DECAfpga","isFork":true,"description":"","allTopics":[],"primaryLanguage":{"name":"VHDL","color":"#adb2cb"},"pullRequestCount":0,"issueCount":0,"starsCount":0,"forksCount":34,"license":null,"participation":null,"lastUpdated":{"hasBeenPushedTo":true,"timestamp":"2023-05-14T22:03:10.646Z"}},{"type":"Public","name":"jtbin","owner":"DECAfpga","isFork":true,"description":"Binary files for MiSTerFPGA, Pocket and other platforms","allTopics":[],"primaryLanguage":{"name":"Arc","color":"#aa2afe"},"pullRequestCount":0,"issueCount":0,"starsCount":0,"forksCount":69,"license":null,"participation":null,"lastUpdated":{"hasBeenPushedTo":true,"timestamp":"2023-05-12T15:36:52.563Z"}},{"type":"Public","name":"archimedes","owner":"DECAfpga","isFork":true,"description":"Acorn Archimedes core DeMiSTified, ported to TC64 and de10lite","allTopics":["computers","cape","demistify","3pins","mergefork"],"primaryLanguage":{"name":"Assembly","color":"#6E4C13"},"pullRequestCount":0,"issueCount":0,"starsCount":0,"forksCount":6,"license":null,"participation":null,"lastUpdated":{"hasBeenPushedTo":true,"timestamp":"2023-04-27T21:22:46.015Z"}},{"type":"Public","name":"c64_DeMiSTify","owner":"DECAfpga","isFork":true,"description":"c64 demistified core. Audio I2S on i2s branch","allTopics":["computers","demistify","3pins","mergefork"],"primaryLanguage":{"name":"VHDL","color":"#adb2cb"},"pullRequestCount":0,"issueCount":0,"starsCount":0,"forksCount":7,"license":null,"participation":null,"lastUpdated":{"hasBeenPushedTo":true,"timestamp":"2023-04-20T17:22:09.931Z"}},{"type":"Public","name":"DECA_board_test","owner":"DECAfpga","isFork":false,"description":"Deca board test project","allTopics":["fpga","deca","others"],"primaryLanguage":{"name":"Verilog","color":"#b2b7f8"},"pullRequestCount":0,"issueCount":0,"starsCount":0,"forksCount":0,"license":null,"participation":null,"lastUpdated":{"hasBeenPushedTo":true,"timestamp":"2023-04-06T20:20:14.976Z"}},{"type":"Public","name":"NES","owner":"DECAfpga","isFork":false,"description":"NES core","allTopics":["cape","consoles","fpga"],"primaryLanguage":{"name":"VHDL","color":"#adb2cb"},"pullRequestCount":0,"issueCount":0,"starsCount":2,"forksCount":0,"license":null,"participation":null,"lastUpdated":{"hasBeenPushedTo":true,"timestamp":"2023-04-06T19:10:25.437Z"}},{"type":"Public","name":"TatungEinstein_DeMiSTify","owner":"DECAfpga","isFork":true,"description":"Demistification of Tatung Einstein micro computer","allTopics":["fpga","computers","bram","cape","demistify","mergefork","sockit"],"primaryLanguage":{"name":"VHDL","color":"#adb2cb"},"pullRequestCount":0,"issueCount":0,"starsCount":0,"forksCount":9,"license":null,"participation":null,"lastUpdated":{"hasBeenPushedTo":true,"timestamp":"2023-04-06T08:42:56.763Z"}},{"type":"Public","name":"deca-mandelbrot","owner":"DECAfpga","isFork":true,"description":"The Terasic DECA board as a mandelbrot accelerator. [This fork is only a mirror, not for development]","allTopics":["fpga","others","mergefork"],"primaryLanguage":{"name":"Python","color":"#3572A5"},"pullRequestCount":0,"issueCount":0,"starsCount":0,"forksCount":4,"license":"BSD 3-Clause \"New\" or \"Revised\" License","participation":null,"lastUpdated":{"hasBeenPushedTo":true,"timestamp":"2023-04-06T08:42:26.988Z"}},{"type":"Public","name":"DECA_retro_cape_2","owner":"DECAfpga","isFork":true,"description":"Retro cape (addon) for DECA FPGA","allTopics":["deca","mergefork"],"primaryLanguage":{"name":"HTML","color":"#e34c26"},"pullRequestCount":0,"issueCount":0,"starsCount":0,"forksCount":2,"license":null,"participation":null,"lastUpdated":{"hasBeenPushedTo":true,"timestamp":"2023-04-02T10:41:03.525Z"}},{"type":"Public","name":"FpgaRiscV","owner":"DECAfpga","isFork":true,"description":"VexRiscv cpu on FPGA. [This fork is only a mirror, not for development]","allTopics":["fpga","others","mergefork"],"primaryLanguage":{"name":"Verilog","color":"#b2b7f8"},"pullRequestCount":0,"issueCount":0,"starsCount":0,"forksCount":4,"license":null,"participation":null,"lastUpdated":{"hasBeenPushedTo":true,"timestamp":"2022-09-04T08:47:24.214Z"}},{"type":"Public","name":"BrianHG-DDR3-Controller","owner":"DECAfpga","isFork":true,"description":"DDR3 Controller, 16 read, 16 write ports, configurable widths, priority, auto-burst size & smart cache for each port. Fully documented source code. TestBenches included. [This fork is only a mirror, not for development]","allTopics":["fpga","others","mergefork"],"primaryLanguage":{"name":"SystemVerilog","color":"#DAE1C2"},"pullRequestCount":0,"issueCount":0,"starsCount":3,"forksCount":29,"license":null,"participation":null,"lastUpdated":{"hasBeenPushedTo":true,"timestamp":"2022-09-04T08:46:48.230Z"}},{"type":"Public","name":"SDRAMStressTest","owner":"DECAfpga","isFork":true,"description":"Uses the SDRAM controller from TurboGrafx16 to give an SDRAM chip a heavy workout.","allTopics":["fpga","others","cape","demistify","sockit"],"primaryLanguage":{"name":"Assembly","color":"#6E4C13"},"pullRequestCount":0,"issueCount":0,"starsCount":0,"forksCount":4,"license":"GNU General Public License v3.0","participation":null,"lastUpdated":{"hasBeenPushedTo":true,"timestamp":"2022-08-05T20:42:23.100Z"}},{"type":"Public","name":".github","owner":"DECAfpga","isFork":false,"description":"","allTopics":[],"primaryLanguage":null,"pullRequestCount":0,"issueCount":0,"starsCount":0,"forksCount":0,"license":null,"participation":null,"lastUpdated":{"hasBeenPushedTo":true,"timestamp":"2022-07-15T17:42:45.503Z"}},{"type":"Public","name":"gameboy","owner":"DECAfpga","isFork":true,"description":"Nintendo Gameboy core - DeMiSTified for Deca, NeptUNO and Unamiga Reloaded","allTopics":["fpga","cape","cyc1000","consoles","demistify"],"primaryLanguage":{"name":"Assembly","color":"#6E4C13"},"pullRequestCount":0,"issueCount":0,"starsCount":0,"forksCount":9,"license":null,"participation":null,"lastUpdated":{"hasBeenPushedTo":true,"timestamp":"2022-07-15T17:33:21.385Z"}},{"type":"Public","name":"MemTest","owner":"DECAfpga","isFork":false,"description":"MemTest for SDRAM Mister modules","allTopics":["fpga","others","cape"],"primaryLanguage":{"name":"VHDL","color":"#adb2cb"},"pullRequestCount":0,"issueCount":0,"starsCount":1,"forksCount":1,"license":null,"participation":null,"lastUpdated":{"hasBeenPushedTo":true,"timestamp":"2022-07-14T21:07:02.012Z"}},{"type":"Public","name":"MSX1","owner":"DECAfpga","isFork":false,"description":"MSX1 core","allTopics":["computers","cape","sockit","fpga"],"primaryLanguage":{"name":"VHDL","color":"#adb2cb"},"pullRequestCount":0,"issueCount":0,"starsCount":0,"forksCount":2,"license":"GNU General Public License v3.0","participation":null,"lastUpdated":{"hasBeenPushedTo":true,"timestamp":"2022-07-14T21:01:49.437Z"}},{"type":"Public","name":"Next186","owner":"DECAfpga","isFork":false,"description":"Next186 core","allTopics":["computers","cape","fpga"],"primaryLanguage":{"name":"Verilog","color":"#b2b7f8"},"pullRequestCount":0,"issueCount":0,"starsCount":0,"forksCount":1,"license":null,"participation":null,"lastUpdated":{"hasBeenPushedTo":true,"timestamp":"2022-07-14T19:38:13.674Z"}},{"type":"Public","name":"NES_Demistify","owner":"DECAfpga","isFork":true,"description":"NES core deMiSTified","allTopics":["fpga","cape","consoles","demistify","3pins"],"primaryLanguage":{"name":"Assembly","color":"#6E4C13"},"pullRequestCount":0,"issueCount":0,"starsCount":0,"forksCount":9,"license":null,"participation":null,"lastUpdated":{"hasBeenPushedTo":true,"timestamp":"2022-07-14T18:36:03.853Z"}},{"type":"Public","name":"VIC20_MiST","owner":"DECAfpga","isFork":true,"description":"VIC-20 for MiST & DeMiSTified for Deca and others. See README.md in board folder","allTopics":["fpga","computers","cape","cyc1000","demistify","mergefork"],"primaryLanguage":{"name":"Assembly","color":"#6E4C13"},"pullRequestCount":0,"issueCount":0,"starsCount":0,"forksCount":12,"license":"GNU General Public License v2.0","participation":null,"lastUpdated":{"hasBeenPushedTo":true,"timestamp":"2022-07-14T17:00:45.335Z"}}],"repositoryCount":44,"userInfo":null,"searchable":true,"definitions":[],"typeFilters":[{"id":"all","text":"All"},{"id":"public","text":"Public"},{"id":"source","text":"Sources"},{"id":"fork","text":"Forks"},{"id":"archived","text":"Archived"},{"id":"template","text":"Templates"}],"compactMode":false},"title":"DECAfpga repositories"}