[BUG] Failure to Trigger NX Exception Under Specific Microarchitectural Conditions

[youzi27]

Is there an existing CVA6 bug for this?

• I have searched the existing bug issues

Bug Description

Description
I have encountered a bug where the NX (Inexact) bit in the fflags register fails to be set under certain microarchitectural conditions, specifically after clearing the fflags register(necessary) and then executing an operation that should simultaneously trigger both Overflow (OF) and Inexact (NX) exceptions. This behavior deviates from the expected IEEE 754 standard compliance.

Steps to Reproduce

main:
fsflags a2, zero
la t0, value_ft1
la t1, value_ft3
fld ft1, 0(t0) 
fld ft3, 0(t1) 
fdiv.d ft3, ft1, ft3
frflags a2

.section .data
.align 8
value_ft1:
    .dword 0x403d000000000000
value_ft3:
    .dword 0x0000000000000001

Expected Behavior:
fflags = 0x5
Actual Behavior:
fflags = 0x4

Note:
This is a different issue from pulp-platform/fpu_div_sqrt_mvp#15, as they have different triggering conditions. The previous trigger method has already been fixed; now, we are facing a different new bug.