Missing ALU in the 5 stage Micro-Architectural Setup plus a few other issues.

[akarxxx1030]

In order to carry forward a branch instruction in the RV32I RISCV Implementation, an ALU to add the current PC value to the offset value (label present within the branch instruction) is required which is multiplexed to the output of the adder (adding the current PC value and 04). The Zero bit which is also prevalent at the output of the ALU is utilised with the branch bit which decides the control signal fed to the multiplexer (deciding PCcurrent+04 or PCcurrent+offset(if branch)). The microarchitecture is thus found to be misleading in a few certain cases. I hope it is looked into. A multiplexer utilised to choose whether the output of the ALU is fed into the data memory or not is missing as well.