RISC-V ISA option not working with FleaOhm target

[MayaPosch]

I have successfully synthesised f32c (fleafpga_ohm_xram_sdram_vector project) for the FleaOhm board using the MIPS ISA and confirmed that it appears to run fine on this target. After switching the configuration setting in the top level file from ARCH_MI32 to ARCH_RV32 and resynthesising, the resulting SoC does not appear to be booting, with the status LED only briefly lighting up after flashing.

On a sidenote, I had to update the project file to include all USB-related files, as well as the current XCF files and some more. This target appears to be somewhat out of date now.

What is the current status of the RISC-V ISA support in f32c?

[gornjas]

f32c/rv32 only supports zero-wait-state block ram, so any of the xram projects won't work.