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nano.c
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nano.c
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/*
This is free and unencumbered software released into the public domain.
Anyone is free to copy, modify, publish, use, compile, sell, or
distribute this software, either in source code form or as a compiled
binary, for any purpose, commercial or non-commercial, and by any
means.
In jurisdictions that recognize copyright laws, the author or authors
of this software dedicate any and all copyright interest in the
software to the public domain. We make this dedication for the benefit
of the public at large and to the detriment of our heirs and
successors. We intend this dedication to be an overt act of
relinquishment in perpetuity of all present and future rights to this
software under copyright law.
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
IN NO EVENT SHALL THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR
OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
OTHER DEALINGS IN THE SOFTWARE.
For more information, please refer to <http://unlicense.org/>
*/
/* jetgpio version 1.1 */
/* Nano classic extension */
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <stdint.h>
#include <errno.h>
#include <unistd.h>
#include <math.h>
#include <sys/fcntl.h>
#include <sys/mman.h>
#include <sys/ioctl.h>
#include <sys/stat.h>
#include <sys/file.h>
#include <sys/types.h>
#include <sys/poll.h>
#include <linux/i2c-dev.h>
#include <linux/i2c.h>
#include <linux/spi/spidev.h>
#include <linux/types.h>
#include <linux/gpio.h>
#include <pthread.h>
#include "jetgpio.h"
static int fd_GPIO;
static volatile GPIO_CNF_Init pin_CNF;
static volatile GPIO_CNF_Init pin_OE;
static volatile GPIO_CNF_Init pin_ENB;
static volatile GPIO_CNF_Init pin_LVL;
static volatile GPIO_CNF_Init pin_MUX;
static volatile GPIO_CNF_Init pin_CFG;
PISRFunc ISRFunc_CFG[41];
static volatile GPIO_PWM pinPWM_Init;
static volatile GPIO_PWM *pinPWM;
static i2cInfo_t i2cInfo[2];
static int i2c_speed[2];
static SPIInfo_t SpiInfo[2];
static volatile GPIO_CNF *pin3;
static volatile GPIO_CNF *pin5;
static volatile GPIO_CNF *pin7;
static volatile GPIO_CNF *pin8;
static volatile GPIO_CNF *pin10;
static volatile GPIO_CNF *pin11;
static volatile GPIO_CNF *pin12;
static volatile GPIO_CNF *pin13;
static volatile GPIO_CNF *pin15;
static volatile GPIO_CNF *pin16;
static volatile GPIO_CNF *pin18;
static volatile GPIO_CNF *pin19;
static volatile GPIO_CNF *pin21;
static volatile GPIO_CNF *pin22;
static volatile GPIO_CNF *pin23;
static volatile GPIO_CNF *pin24;
static volatile GPIO_CNF *pin26;
static volatile GPIO_CNF *pin27;
static volatile GPIO_CNF *pin28;
static volatile GPIO_CNF *pin29;
static volatile GPIO_CNF *pin31;
static volatile GPIO_CNF *pin32;
static volatile GPIO_CNF *pin33;
static volatile GPIO_CNF *pin35;
static volatile GPIO_CNF *pin36;
static volatile GPIO_CNF *pin37;
static volatile GPIO_CNF *pin38;
static volatile GPIO_CNF *pin40;
static volatile uint32_t *pinmux3;
static volatile uint32_t *pinmux5;
static volatile uint32_t *pinmux7;
static volatile uint32_t *pinmux8;
static volatile uint32_t *pinmux10;
static volatile uint32_t *pinmux11;
static volatile uint32_t *pinmux12;
static volatile uint32_t *pinmux13;
static volatile uint32_t *pinmux15;
static volatile uint32_t *pinmux16;
static volatile uint32_t *pinmux18;
static volatile uint32_t *pinmux19;
static volatile uint32_t *pinmux21;
static volatile uint32_t *pinmux22;
static volatile uint32_t *pinmux23;
static volatile uint32_t *pinmux24;
static volatile uint32_t *pinmux26;
static volatile uint32_t *pinmux27;
static volatile uint32_t *pinmux28;
static volatile uint32_t *pinmux29;
static volatile uint32_t *pinmux31;
static volatile uint32_t *pinmux32;
static volatile uint32_t *pinmux33;
static volatile uint32_t *pinmux35;
static volatile uint32_t *pinmux36;
static volatile uint32_t *pinmux37;
static volatile uint32_t *pinmux38;
static volatile uint32_t *pinmux40;
static volatile uint32_t *pincfg3;
static volatile uint32_t *pincfg5;
static volatile uint32_t *pincfg7;
static volatile uint32_t *pincfg8;
static volatile uint32_t *pincfg10;
static volatile uint32_t *pincfg11;
static volatile uint32_t *pincfg12;
static volatile uint32_t *pincfg13;
static volatile uint32_t *pincfg15;
static volatile uint32_t *pincfg16;
static volatile uint32_t *pincfg18;
static volatile uint32_t *pincfg19;
static volatile uint32_t *pincfg21;
static volatile uint32_t *pincfg22;
static volatile uint32_t *pincfg23;
static volatile uint32_t *pincfg24;
static volatile uint32_t *pincfg26;
static volatile uint32_t *pincfg27;
static volatile uint32_t *pincfg28;
static volatile uint32_t *pincfg29;
static volatile uint32_t *pincfg31;
static volatile uint32_t *pincfg32;
static volatile uint32_t *pincfg33;
static volatile uint32_t *pincfg35;
static volatile uint32_t *pincfg36;
static volatile uint32_t *pincfg37;
static volatile uint32_t *pincfg38;
static volatile uint32_t *pincfg40;
static volatile uint32_t *controller_clk_out_enb_l;
static volatile uint32_t *controller_clk_out_enb_h;
static volatile uint32_t *controller_clk_out_enb_l_set;
static volatile uint32_t *controller_rst_devices_h;
static volatile uint32_t *clk_source_spi1;
static volatile uint32_t *clk_source_spi2;
static volatile uint32_t *apbdev_pmc_pwr_det_val;
static void *baseCNF;
static void *basePINMUX;
static void *baseCFG;
static void *basePWM;
static void *baseCAR;
static void *basePMC;
static volatile unsigned global_int;
static pthread_t callThd[28];
static pthread_attr_t attr;
static int pth_err;
static void *status_thread;
static int thread_n = 0;
static unsigned pin_tracker = 0;
int gpioInitialise(void){
int status = 1;
// Getting the page size
int pagesize = sysconf(_SC_PAGESIZE); //getpagesize();
// read physical memory (needs root)
fd_GPIO = open("/dev/mem", O_RDWR | O_SYNC);
if (fd_GPIO < 0) {
perror("/dev/mem");
fprintf(stderr, "Please run this program as root (for example with sudo)\n");
return -1;
}
// Mapping GPIO_CNF
baseCNF = mmap(0, pagesize, PROT_READ | PROT_WRITE, MAP_SHARED, fd_GPIO, base_CNF);
if (baseCNF == MAP_FAILED) {
return -2;
}
// Mapping GPIO_PINMUX
basePINMUX = mmap(0, pagesize, PROT_READ | PROT_WRITE, MAP_SHARED, fd_GPIO, base_PINMUX);
if (basePINMUX == MAP_FAILED) {
return -3;
}
// Mapping GPIO_CFG
baseCFG = mmap(0, pagesize, PROT_READ | PROT_WRITE, MAP_SHARED, fd_GPIO, base_CFG);
if (baseCFG == MAP_FAILED) {
return -4;
}
// Mapping GPIO_PWM
basePWM = mmap(0, pagesize, PROT_READ | PROT_WRITE, MAP_SHARED, fd_GPIO, base_PWM);
if (basePWM == MAP_FAILED) {
return -5;
}
// Mapping CAR
baseCAR = mmap(0, pagesize, PROT_READ | PROT_WRITE, MAP_SHARED, fd_GPIO, CAR);
if (baseCAR == MAP_FAILED) {
return -6;
}
// Mapping PMC
basePMC = mmap(NULL, pagesize, PROT_READ | PROT_WRITE, MAP_SHARED, fd_GPIO, base_PMC);
if (basePMC == MAP_FAILED) {
return -7;
}
// Pointer to CNF3
pin3 = (GPIO_CNF volatile *)((char *)baseCNF + CNF_3);
pin_CNF.pin3 = pin3->CNF[0];
pin_OE.pin3 = pin3->OE[0];
pin_ENB.pin3 = pin3->INT_ENB[0];
pin_LVL.pin3 = pin3->INT_LVL[0];
// Pointer to PINMUX3
pinmux3 = (uint32_t volatile *)((char *)basePINMUX + PINMUX_3);
pin_MUX.pin3 = *pinmux3;
// Pointer to PINCFG3
pincfg3 = (uint32_t volatile *)((char *)baseCFG + CFG_3);
pin_CFG.pin3 = *pincfg3;
// Pointer to CNF5
pin5 = (GPIO_CNF volatile *)((char *)baseCNF + CNF_5);
pin_CNF.pin5 = pin5->CNF[0];
pin_OE.pin5 = pin5->OE[0];
pin_ENB.pin5 = pin5->INT_ENB[0];
pin_LVL.pin5 = pin5->INT_LVL[0];
// Pointer to PINMUX5
pinmux5 = (uint32_t volatile *)((char *)basePINMUX + PINMUX_5);
pin_MUX.pin5 = *pinmux5;
// Pointer to PINCFG5
pincfg5 = (uint32_t volatile *)((char *)baseCFG + CFG_5);
pin_CFG.pin5 = *pincfg5;
// Pointer to CNF7
pin7 = (GPIO_CNF volatile *)((char *)baseCNF + CNF_7);
pin_CNF.pin7 = pin7->CNF[0];
pin_OE.pin7 = pin7->OE[0];
pin_ENB.pin7 = pin7->INT_ENB[0];
pin_LVL.pin7 = pin7->INT_LVL[0];
// Pointer to PINMUX7
pinmux7 = (uint32_t volatile *)((char *)basePINMUX + PINMUX_7);
pin_MUX.pin7 = *pinmux7;
// Pointer to PINCFG7
pincfg7 = (uint32_t volatile *)((char *)baseCFG + CFG_7);
pin_CFG.pin7 = *pincfg7;
// Pointer to CNF8
pin8 = (GPIO_CNF volatile *)((char *)baseCNF + CNF_8);
pin_CNF.pin8 = pin8->CNF[0];
pin_OE.pin8 = pin8->OE[0];
pin_ENB.pin8 = pin8->INT_ENB[0];
pin_LVL.pin8 = pin8->INT_LVL[0];
// Pointer to PINMUX8
pinmux8 = (uint32_t volatile *)((char *)basePINMUX + PINMUX_8);
pin_MUX.pin8 = *pinmux8;
// Pointer to PINCFG8
pincfg8 = (uint32_t volatile *)((char *)baseCFG + CFG_8);
pin_CFG.pin8 = *pincfg8;
// Pointer to CNF10
pin10 = (GPIO_CNF volatile *)((char *)baseCNF + CNF_10);
pin_CNF.pin10 = pin10->CNF[0];
pin_OE.pin10 = pin10->OE[0];
pin_ENB.pin10 = pin10->INT_ENB[0];
pin_LVL.pin10 = pin10->INT_LVL[0];
// Pointer to PINMUX10
pinmux10 = (uint32_t volatile *)((char *)basePINMUX + PINMUX_10);
pin_MUX.pin10 = *pinmux10;
// Pointer to PINCFG10
pincfg10 = (uint32_t volatile *)((char *)baseCFG + CFG_10);
pin_CFG.pin10 = *pincfg10;
// Pointer to CNF11
pin11 = (GPIO_CNF volatile *)((char *)baseCNF + CNF_11);
pin_CNF.pin11 = pin11->CNF[0];
pin_OE.pin11 = pin11->OE[0];
pin_ENB.pin11 = pin11->INT_ENB[0];
pin_LVL.pin11 = pin11->INT_LVL[0];
// Pointer to PINMUX11
pinmux11 = (uint32_t volatile *)((char *)basePINMUX + PINMUX_11);
pin_MUX.pin11 = *pinmux11;
// Pointer to PINCFG11
pincfg11 = (uint32_t volatile *)((char *)baseCFG + CFG_11);
pin_CFG.pin11 = *pincfg11;
// Pointer to CNF12
pin12 = (GPIO_CNF volatile *)((char *)baseCNF + CNF_12);
pin_CNF.pin12 = pin12->CNF[0];
pin_OE.pin12 = pin12->OE[0];
pin_ENB.pin12 = pin12->INT_ENB[0];
pin_LVL.pin12 = pin12->INT_LVL[0];
// Pointer to PINMUX12
pinmux12 = (uint32_t volatile *)((char *)basePINMUX + PINMUX_12);
pin_MUX.pin12 = *pinmux12;
// Pointer to PINCFG12
pincfg12 = (uint32_t volatile *)((char *)baseCFG + CFG_12);
pin_CFG.pin12 = *pincfg12;
// Pointer to CNF13
pin13 = (GPIO_CNF volatile *)((char *)baseCNF + CNF_13);
pin_CNF.pin13 = pin13->CNF[0];
pin_OE.pin13 = pin13->OE[0];
pin_ENB.pin13 = pin13->INT_ENB[0];
pin_LVL.pin13 = pin13->INT_LVL[0];
// Pointer to PINMUX13
pinmux13 = (uint32_t volatile *)((char *)basePINMUX + PINMUX_13);
pin_MUX.pin13 = *pinmux13;
// Pointer to PINCFG13
pincfg13 = (uint32_t volatile *)((char *)baseCFG + CFG_13);
pin_CFG.pin13 = *pincfg13;
// Pointer to CNF15
pin15 = (GPIO_CNF volatile *)((char *)baseCNF + CNF_15);
pin_CNF.pin15 = pin15->CNF[0];
pin_OE.pin15 = pin15->OE[0];
pin_ENB.pin15 = pin15->INT_ENB[0];
pin_LVL.pin15 = pin15->INT_LVL[0];
// Pointer to PINMUX15
pinmux15 = (uint32_t volatile *)((char *)basePINMUX + PINMUX_15);
pin_MUX.pin15 = *pinmux15;
// Pointer to PINCFG15
pincfg15 = (uint32_t volatile *)((char *)baseCFG + CFG_15);
pin_CFG.pin15 = *pincfg15;
// Pointer to CNF16
pin16 = (GPIO_CNF volatile *)((char *)baseCNF + CNF_16);
pin_CNF.pin16 = pin16->CNF[0];
pin_OE.pin16 = pin16->OE[0];
pin_ENB.pin16 = pin16->INT_ENB[0];
pin_LVL.pin16 = pin16->INT_LVL[0];
// Pointer to PINMUX16
pinmux16 = (uint32_t volatile *)((char *)basePINMUX + PINMUX_16);
pin_MUX.pin16 = *pinmux16;
// Pointer to PINCFG16
pincfg16 = (uint32_t volatile *)((char *)baseCFG + CFG_16);
pin_CFG.pin16 = *pincfg16;
// Pointer to CNF18
pin18 = (GPIO_CNF volatile *)((char *)baseCNF + CNF_18);
pin_CNF.pin18 = pin18->CNF[0];
pin_OE.pin18 = pin18->OE[0];
pin_ENB.pin18 = pin18->INT_ENB[0];
pin_LVL.pin18 = pin18->INT_LVL[0];
// Pointer to PINMUX18
pinmux18 = (uint32_t volatile *)((char *)basePINMUX + PINMUX_18);
pin_MUX.pin18 = *pinmux18;
// Pointer to PINCFG18
pincfg18 = (uint32_t volatile *)((char *)baseCFG + CFG_18);
pin_CFG.pin18 = *pincfg18;
// Pointer to CNF19
pin19 = (GPIO_CNF volatile *)((char *)baseCNF + CNF_19);
pin_CNF.pin19 = pin19->CNF[0];
pin_OE.pin19 = pin19->OE[0];
pin_ENB.pin19 = pin19->INT_ENB[0];
pin_LVL.pin19 = pin19->INT_LVL[0];
// Pointer to PINMUX19
pinmux19 = (uint32_t volatile *)((char *)basePINMUX + PINMUX_19);
pin_MUX.pin19 = *pinmux19;
// Pointer to PINCFG19
pincfg19 = (uint32_t volatile *)((char *)baseCFG + CFG_19);
pin_CFG.pin19 = *pincfg19;
// Pointer to CNF21
pin21 = (GPIO_CNF volatile *)((char *)baseCNF + CNF_21);
pin_CNF.pin21 = pin21->CNF[0];
pin_OE.pin21 = pin21->OE[0];
pin_ENB.pin21 = pin21->INT_ENB[0];
pin_LVL.pin21 = pin21->INT_LVL[0];
// Pointer to PINMUX21
pinmux21 = (uint32_t volatile *)((char *)basePINMUX + PINMUX_21);
pin_MUX.pin21 = *pinmux21;
// Pointer to PINCFG21
pincfg21 = (uint32_t volatile *)((char *)baseCFG + CFG_21);
pin_CFG.pin21 = *pincfg21;
// Pointer to CNF22
pin22 = (GPIO_CNF volatile *)((char *)baseCNF + CNF_22);
pin_CNF.pin22 = pin22->CNF[0];
pin_OE.pin22 = pin22->OE[0];
pin_ENB.pin22 = pin22->INT_ENB[0];
pin_LVL.pin22 = pin22->INT_LVL[0];
// Pointer to PINMUX22
pinmux22 = (uint32_t volatile *)((char *)basePINMUX + PINMUX_22);
pin_MUX.pin22 = *pinmux22;
// Pointer to PINCFG22
pincfg22 = (uint32_t volatile *)((char *)baseCFG + CFG_22);
pin_CFG.pin22 = *pincfg22;
// Pointer to CNF23
pin23 = (GPIO_CNF volatile *)((char *)baseCNF + CNF_23);
pin_CNF.pin23 = pin23->CNF[0];
pin_OE.pin23 = pin23->OE[0];
pin_ENB.pin23 = pin23->INT_ENB[0];
pin_LVL.pin23 = pin23->INT_LVL[0];
// Pointer to PINMUX23
pinmux23 = (uint32_t volatile *)((char *)basePINMUX + PINMUX_23);
pin_MUX.pin23 = *pinmux23;
// Pointer to PINCFG23
pincfg23 = (uint32_t volatile *)((char *)baseCFG + CFG_23);
pin_CFG.pin23 = *pincfg23;
// Pointer to CNF24
pin24 = (GPIO_CNF volatile *)((char *)baseCNF + CNF_24);
pin_CNF.pin24 = pin24->CNF[0];
pin_OE.pin24 = pin24->OE[0];
pin_ENB.pin24 = pin24->INT_ENB[0];
pin_LVL.pin24 = pin24->INT_LVL[0];
// Pointer to PINMUX24
pinmux24 = (uint32_t volatile *)((char *)basePINMUX + PINMUX_24);
pin_MUX.pin24 = *pinmux24;
// Pointer to PINCFG24
pincfg24 = (uint32_t volatile *)((char *)baseCFG + CFG_24);
pin_CFG.pin24 = *pincfg24;
// Pointer to CNF26
pin26 = (GPIO_CNF volatile *)((char *)baseCNF + CNF_26);
pin_CNF.pin26 = pin26->CNF[0];
pin_OE.pin26 = pin26->OE[0];
pin_ENB.pin26 = pin26->INT_ENB[0];
pin_LVL.pin26 = pin26->INT_LVL[0];
// Pointer to PINMUX26
pinmux26 = (uint32_t volatile *)((char *)basePINMUX + PINMUX_26);
pin_MUX.pin26 = *pinmux26;
// Pointer to PINCFG26
pincfg26 = (uint32_t volatile *)((char *)baseCFG + CFG_26);
pin_CFG.pin26 = *pincfg26;
// Pointer to CNF27
pin27 = (GPIO_CNF volatile *)((char *)baseCNF + CNF_27);
pin_CNF.pin27 = pin27->CNF[0];
pin_OE.pin27 = pin27->OE[0];
pin_ENB.pin27 = pin27->INT_ENB[0];
pin_LVL.pin27 = pin27->INT_LVL[0];
// Pointer to PINMUX27
pinmux27 = (uint32_t volatile *)((char *)basePINMUX + PINMUX_27);
pin_MUX.pin27 = *pinmux27;
// Pointer to PINCFG27
pincfg27 = (uint32_t volatile *)((char *)baseCFG + CFG_27);
pin_CFG.pin27 = *pincfg27;
// Pointer to CNF28
pin28 = (GPIO_CNF volatile *)((char *)baseCNF + CNF_28);
pin_CNF.pin28 = pin28->CNF[0];
pin_OE.pin28 = pin28->OE[0];
pin_ENB.pin28 = pin28->INT_ENB[0];
pin_LVL.pin28 = pin28->INT_LVL[0];
// Pointer to PINMUX28
pinmux28 = (uint32_t volatile *)((char *)basePINMUX + PINMUX_28);
pin_MUX.pin28 = *pinmux28;
// Pointer to PINCFG28
pincfg28 = (uint32_t volatile *)((char *)baseCFG + CFG_28);
pin_CFG.pin28 = *pincfg28;
// Pointer to CNF29
pin29 = (GPIO_CNF volatile *)((char *)baseCNF + CNF_29);
pin_CNF.pin29 = pin29->CNF[0];
pin_OE.pin29 = pin29->OE[0];
pin_ENB.pin29 = pin29->INT_ENB[0];
pin_LVL.pin29 = pin29->INT_LVL[0];
// Pointer to PINMUX29
pinmux29 = (uint32_t volatile *)((char *)basePINMUX + PINMUX_29);
pin_MUX.pin29 = *pinmux29;
// Pointer to PINCFG29
pincfg29 = (uint32_t volatile *)((char *)baseCFG + CFG_29);
pin_CFG.pin29 = *pincfg29;
// Pointer to CNF31
pin31 = (GPIO_CNF volatile *)((char *)baseCNF + CNF_31);
pin_CNF.pin31 = pin31->CNF[0];
pin_OE.pin31 = pin31->OE[0];
pin_ENB.pin31 = pin31->INT_ENB[0];
pin_LVL.pin31 = pin31->INT_LVL[0];
// Pointer to PINMUX31
pinmux31 = (uint32_t volatile *)((char *)basePINMUX + PINMUX_31);
pin_MUX.pin31 = *pinmux31;
// Pointer to PINCFG31
pincfg31 = (uint32_t volatile *)((char *)baseCFG + CFG_31);
pin_CFG.pin31 = *pincfg31;
// Pointer to CNF32
pin32 = (GPIO_CNF volatile *)((char *)baseCNF + CNF_32);
pin_CNF.pin32 = pin32->CNF[0];
pin_OE.pin32 = pin32->OE[0];
pin_ENB.pin32 = pin32->INT_ENB[0];
pin_LVL.pin32 = pin32->INT_LVL[0];
// Pointer to PINMUX32
pinmux32 = (uint32_t volatile *)((char *)basePINMUX + PINMUX_32);
pin_MUX.pin32 = *pinmux32;
// Pointer to PINCFG32
pincfg32 = (uint32_t volatile *)((char *)baseCFG + CFG_32);
pin_CFG.pin32 = *pincfg32;
// Pointer to CNF33
pin33 = (GPIO_CNF volatile *)((char *)baseCNF + CNF_33);
pin_CNF.pin33 = pin33->CNF[0];
pin_OE.pin33 = pin33->OE[0];
pin_ENB.pin33 = pin33->INT_ENB[0];
pin_LVL.pin33 = pin33->INT_LVL[0];
// Pointer to PINMUX33
pinmux33 = (uint32_t volatile *)((char *)basePINMUX + PINMUX_33);
pin_MUX.pin33 = *pinmux33;
// Pointer to PINCFG33
pincfg33 = (uint32_t volatile *)((char *)baseCFG + CFG_33);
pin_CFG.pin33 = *pincfg33;
// Pointer to CNF35
pin35 = (GPIO_CNF volatile *)((char *)baseCNF + CNF_35);
pin_CNF.pin35 = pin35->CNF[0];
pin_OE.pin35 = pin35->OE[0];
pin_ENB.pin35 = pin35->INT_ENB[0];
pin_LVL.pin35 = pin35->INT_LVL[0];
// Pointer to PINMUX35
pinmux35 = (uint32_t volatile *)((char *)basePINMUX + PINMUX_35);
pin_MUX.pin35 = *pinmux35;
// Pointer to PINCFG35
pincfg35 = (uint32_t volatile *)((char *)baseCFG + CFG_35);
pin_CFG.pin35 = *pincfg35;
// Pointer to CNF36
pin36 = (GPIO_CNF volatile *)((char *)baseCNF + CNF_36);
pin_CNF.pin36 = pin36->CNF[0];
pin_OE.pin36 = pin36->OE[0];
pin_ENB.pin36 = pin36->INT_ENB[0];
pin_LVL.pin36 = pin36->INT_LVL[0];
// Pointer to PINMUX36
pinmux36 = (uint32_t volatile *)((char *)basePINMUX + PINMUX_36);
pin_MUX.pin36 = *pinmux36;
// Pointer to PINCFG36
pincfg36 = (uint32_t volatile *)((char *)baseCFG + CFG_36);
pin_CFG.pin36 = *pincfg36;
// Pointer to CNF37
pin37 = (GPIO_CNF volatile *)((char *)baseCNF + CNF_37);
pin_CNF.pin37 = pin37->CNF[0];
pin_OE.pin37 = pin37->OE[0];
pin_ENB.pin37 = pin37->INT_ENB[0];
pin_LVL.pin37 = pin37->INT_LVL[0];
// Pointer to PINMUX37
pinmux37 = (uint32_t volatile *)((char *)basePINMUX + PINMUX_37);
pin_MUX.pin37 = *pinmux37;
// Pointer to PINCFG37
pincfg37 = (uint32_t volatile *)((char *)baseCFG + CFG_37);
pin_CFG.pin37 = *pincfg37;
// Pointer to CNF38
pin38 = (GPIO_CNF volatile *)((char *)baseCNF + CNF_38);
pin_CNF.pin38 = pin38->CNF[0];
pin_OE.pin38 = pin38->OE[0];
pin_ENB.pin38 = pin38->INT_ENB[0];
pin_LVL.pin38 = pin38->INT_LVL[0];
// Pointer to PINMUX38
pinmux38 = (uint32_t volatile *)((char *)basePINMUX + PINMUX_38);
pin_MUX.pin38 = *pinmux38;
// Pointer to PINCFG38
pincfg38 = (uint32_t volatile *)((char *)baseCFG + CFG_38);
pin_CFG.pin38 = *pincfg38;
// Pointer to CNF40
pin40 = (GPIO_CNF volatile *)((char *)baseCNF + CNF_40);
pin_CNF.pin40 = pin40->CNF[0];
pin_OE.pin40 = pin40->OE[0];
pin_ENB.pin40 = pin40->INT_ENB[0];
pin_LVL.pin40 = pin40->INT_LVL[0];
// Pointer to PINMUX40
pinmux40 = (uint32_t volatile *)((char *)basePINMUX + PINMUX_40);
pin_MUX.pin40 = *pinmux40;
// Pointer to PINCFG40
pincfg40 = (uint32_t volatile *)((char *)baseCFG + CFG_40);
pin_CFG.pin40 = *pincfg40;
// Pointer to PM3_PWMx
pinPWM = (GPIO_PWM volatile *)((char *)basePWM + PM3_PWM0);
pinPWM_Init = *pinPWM;
// Pointer to APBDEV_PMC_PWR_DET_VAL_0
apbdev_pmc_pwr_det_val = (uint32_t volatile *)((char *)basePMC + APBDEV_PMC_PWR_DET_VAL_0 + 0x400);
// Pointer to controller_clk_out_enb_l
controller_clk_out_enb_l = (uint32_t volatile *)((char *)baseCAR + CLK_RST_CONTROLLER_CLK_OUT_ENB_L_0);
// Pointer to controller_clk_out_enb_h
controller_clk_out_enb_h = (uint32_t volatile *)((char *)baseCAR + CLK_RST_CONTROLLER_CLK_OUT_ENB_H_0);
// Pointer to controller_rst_devices_h
controller_rst_devices_h = (uint32_t volatile *)((char *)baseCAR + CLK_RST_CONTROLLER_RST_DEVICES_H_0);
// Pointer to clksourcespi1
clk_source_spi1 = (uint32_t volatile *)((char *)baseCAR + CLK_RST_CONTROLLER_CLK_SOURCE_SPI1_0);
// Pointer to clksourcespi2
clk_source_spi2 = (uint32_t volatile *)((char *)baseCAR + CLK_RST_CONTROLLER_CLK_SOURCE_SPI2_0);
// Pointer to controller_clk_out_enb_h
controller_clk_out_enb_l_set = (uint32_t volatile *)((char *)baseCAR + CLK_RST_CONTROLLER_CLK_ENB_L_SET_0);
// Initialize i2c
i2cInfo[0].state = I2C_CLOSED;
i2cInfo[1].state = I2C_CLOSED;
// Initialize spi
SpiInfo[0].state = SPI_CLOSED;
SpiInfo[1].state = SPI_CLOSED;
// Global interrupt variable
global_int = 1;
// Power Controller it is enabled on boot
//*controller_clk_out_enb_l |= 0x00000100;
//*controller_clk_out_enb_l_set |= 0x00000100;
// Allocating memory for the struct
for (int j = 0; j < 41; j++) {
ISRFunc_CFG[j] = calloc (1, sizeof(ISRFunc));
}
return status;
}
void gpioTerminate(void){
// Stopping threads
global_int = 0;
// Cancelling threads to avoid blocking on read()
for(int i = 0;i < thread_n; i++) {
pthread_cancel(callThd[i]);
//printf("Thread number: %d cancelled\n",i);
}
//Joining threads
for(int j = 0;j < thread_n; j++) {
pthread_join(callThd[j], &status_thread);
//printf("Thread number: %d joined\n",j);
}
// Free allocated memory
for (int k = 0; k < 41; k++) {
free(ISRFunc_CFG[k]);
}
int pagesize = sysconf(_SC_PAGESIZE);
// Restoring registers to their previous state
if ((pin_tracker >> 28) & 1){
*pinPWM = pinPWM_Init;
}
if (pin_tracker & 1){
pin3->CNF[0] = pin_CNF.pin3;
pin3->OE[0] = pin_OE.pin3;
pin3->INT_ENB[0] = pin_ENB.pin3;
pin3->INT_LVL[0] = pin_LVL.pin3;
*pinmux3 = pin_MUX.pin3;
*pincfg3 = pin_CFG.pin3;
}
if ((pin_tracker >> 1) & 1){
pin5->CNF[0] = pin_CNF.pin5;
pin5->OE[0] = pin_OE.pin5;
pin5->INT_ENB[0] = pin_ENB.pin5;
pin5->INT_LVL[0] = pin_LVL.pin5;
*pinmux5 = pin_MUX.pin5;
*pincfg5 = pin_CFG.pin5;
}
if ((pin_tracker >> 2) & 1){
pin7->CNF[0] = pin_CNF.pin7;
pin7->OE[0] = pin_OE.pin7;
pin7->INT_ENB[0] = pin_ENB.pin7;
pin7->INT_LVL[0] = pin_LVL.pin7;
*pinmux7 = pin_MUX.pin7;
*pincfg7 = pin_CFG.pin7;
}
if ((pin_tracker >> 3) & 1){
pin8->CNF[0] = pin_CNF.pin8;
pin8->OE[0] = pin_OE.pin8;
pin8->INT_ENB[0] = pin_ENB.pin8;
pin8->INT_LVL[0] = pin_LVL.pin8;
*pinmux8 = pin_MUX.pin8;
*pincfg8 = pin_CFG.pin8;
}
if ((pin_tracker >> 4) & 1){
pin10->CNF[0] = pin_CNF.pin10;
pin10->OE[0] = pin_OE.pin10;
pin10->INT_ENB[0] = pin_ENB.pin10;
pin10->INT_LVL[0] = pin_LVL.pin10;
*pinmux10 = pin_MUX.pin10;
*pincfg10 = pin_CFG.pin10;
}
if ((pin_tracker >> 5) & 1){
pin11->CNF[0] = pin_CNF.pin11;
pin11->OE[0] = pin_OE.pin11;
pin11->INT_ENB[0] = pin_ENB.pin11;
pin11->INT_LVL[0] = pin_LVL.pin11;
*pinmux11 = pin_MUX.pin11;
*pincfg11 = pin_CFG.pin11;
}
if ((pin_tracker >> 6) & 1){
pin12->CNF[0] = pin_CNF.pin12;
pin12->OE[0] = pin_OE.pin12;
pin12->INT_ENB[0] = pin_ENB.pin12;
pin12->INT_LVL[0] = pin_LVL.pin12;
*pinmux12 = pin_MUX.pin12;
*pincfg12 = pin_CFG.pin12;
}
if (((pin_tracker >> 7) & 1) || ((pin_tracker >> 30) & 1)){
pin13->CNF[0] = pin_CNF.pin13;
pin13->OE[0] = pin_OE.pin13;
pin13->INT_ENB[0] = pin_ENB.pin13;
pin13->INT_LVL[0] = pin_LVL.pin13;
*pinmux13 = pin_MUX.pin13;
*pincfg13 = pin_CFG.pin13;
}
if ((pin_tracker >> 8) & 1){
pin15->CNF[0] = pin_CNF.pin15;
pin15->OE[0] = pin_OE.pin15;
pin15->INT_ENB[0] = pin_ENB.pin15;
pin15->INT_LVL[0] = pin_LVL.pin15;
*pinmux15 = pin_MUX.pin15;
*pincfg15 = pin_CFG.pin15;
}
if ((pin_tracker >> 9) & 1){
pin16->CNF[0] = pin_CNF.pin16;
pin16->OE[0] = pin_OE.pin16;
pin16->INT_ENB[0] = pin_ENB.pin16;
pin16->INT_LVL[0] = pin_LVL.pin16;
*pinmux16 = pin_MUX.pin16;
*pincfg16 = pin_CFG.pin16;
}
if (((pin_tracker >> 10) & 1) || ((pin_tracker >> 30) & 1)){
pin18->CNF[0] = pin_CNF.pin18;
pin18->OE[0] = pin_OE.pin18;
pin18->INT_ENB[0] = pin_ENB.pin18;
pin18->INT_LVL[0] = pin_LVL.pin18;
*pinmux18 = pin_MUX.pin18;
*pincfg18 = pin_CFG.pin18;
}
if (((pin_tracker >> 11) & 1) || ((pin_tracker >> 29) & 1)){
pin19->CNF[0] = pin_CNF.pin19;
pin19->OE[0] = pin_OE.pin19;
pin19->INT_ENB[0] = pin_ENB.pin19;
pin19->INT_LVL[0] = pin_LVL.pin19;
*pinmux19 = pin_MUX.pin19;
*pincfg19 = pin_CFG.pin19;
}
if (((pin_tracker >> 12) & 1) || ((pin_tracker >> 29) & 1)){
pin21->CNF[0] = pin_CNF.pin21;
pin21->OE[0] = pin_OE.pin21;
pin21->INT_ENB[0] = pin_ENB.pin21;
pin21->INT_LVL[0] = pin_LVL.pin21;
*pinmux21 = pin_MUX.pin21;
*pincfg21 = pin_CFG.pin21;
}
if (((pin_tracker >> 13) & 1) || ((pin_tracker >> 30) & 1)){
pin22->CNF[0] = pin_CNF.pin22;
pin22->OE[0] = pin_OE.pin22;
pin22->INT_ENB[0] = pin_ENB.pin22;
pin22->INT_LVL[0] = pin_LVL.pin22;
*pinmux22 = pin_MUX.pin22;
*pincfg22 = pin_CFG.pin22;
}
if (((pin_tracker >> 14) & 1) || ((pin_tracker >> 29) & 1)){
pin23->CNF[0] = pin_CNF.pin23;
pin23->OE[0] = pin_OE.pin23;
pin23->INT_ENB[0] = pin_ENB.pin23;
pin23->INT_LVL[0] = pin_LVL.pin23;
*pinmux23 = pin_MUX.pin23;
*pincfg23 = pin_CFG.pin23;
}
if (((pin_tracker >> 15) & 1) || ((pin_tracker >> 29) & 1)){
pin24->CNF[0] = pin_CNF.pin24;
pin24->OE[0] = pin_OE.pin24;
pin24->INT_ENB[0] = pin_ENB.pin24;
pin24->INT_LVL[0] = pin_LVL.pin24;
*pinmux24 = pin_MUX.pin24;
*pincfg24 = pin_CFG.pin24;
}
if ((pin_tracker >> 16) & 1){
pin26->CNF[0] = pin_CNF.pin26;
pin26->OE[0] = pin_OE.pin26;
pin26->INT_ENB[0] = pin_ENB.pin26;
pin26->INT_LVL[0] = pin_LVL.pin26;
*pinmux26 = pin_MUX.pin26;
*pincfg26 = pin_CFG.pin26;
}
if ((pin_tracker >> 17) & 1){
pin27->CNF[0] = pin_CNF.pin27;
pin27->OE[0] = pin_OE.pin27;
pin27->INT_ENB[0] = pin_ENB.pin27;
pin27->INT_LVL[0] = pin_LVL.pin27;
*pinmux27 = pin_MUX.pin27;
*pincfg27 = pin_CFG.pin27;
}
if ((pin_tracker >> 18) & 1){
pin28->CNF[0] = pin_CNF.pin28;
pin28->OE[0] = pin_OE.pin28;
pin28->INT_ENB[0] = pin_ENB.pin28;
pin28->INT_LVL[0] = pin_LVL.pin28;
*pinmux28 = pin_MUX.pin28;
*pincfg28 = pin_CFG.pin28;
}
if ((pin_tracker >> 19) & 1){
pin29->CNF[0] = pin_CNF.pin29;
pin29->OE[0] = pin_OE.pin29;
pin29->INT_ENB[0] = pin_ENB.pin29;
pin29->INT_LVL[0] = pin_LVL.pin29;
*pinmux29 = pin_MUX.pin29;
*pincfg29 = pin_CFG.pin29;
}
if ((pin_tracker >> 20) & 1){
pin31->CNF[0] = pin_CNF.pin31;
pin31->OE[0] = pin_OE.pin31;
pin31->INT_ENB[0] = pin_ENB.pin31;
pin31->INT_LVL[0] = pin_LVL.pin31;
*pinmux31 = pin_MUX.pin31;
*pincfg31 = pin_CFG.pin31;
}
if (((pin_tracker >> 21) & 1) || ((pin_tracker >> 28) & 1)){
pin32->CNF[0] = pin_CNF.pin32;
pin32->OE[0] = pin_OE.pin32;
pin32->INT_ENB[0] = pin_ENB.pin32;
pin32->INT_LVL[0] = pin_LVL.pin32;
*pinmux32 = pin_MUX.pin32;
*pincfg32 = pin_CFG.pin32;
}
if (((pin_tracker >> 22) & 1) || ((pin_tracker >> 28) & 1)){
pin33->CNF[0] = pin_CNF.pin33;
pin33->OE[0] = pin_OE.pin33;
pin33->INT_ENB[0] = pin_ENB.pin33;
pin33->INT_LVL[0] = pin_LVL.pin33;
*pinmux33 = pin_MUX.pin33;
*pincfg33 = pin_CFG.pin33;
}
if ((pin_tracker >> 23) & 1){
pin35->CNF[0] = pin_CNF.pin35;
pin35->OE[0] = pin_OE.pin35;
pin35->INT_ENB[0] = pin_ENB.pin35;
pin35->INT_LVL[0] = pin_LVL.pin35;
*pinmux35 = pin_MUX.pin35;
*pincfg35 = pin_CFG.pin35;
}
if ((pin_tracker >> 24) & 1){
pin36->CNF[0] = pin_CNF.pin36;
pin36->OE[0] = pin_OE.pin36;
pin36->INT_ENB[0] = pin_ENB.pin36;
pin36->INT_LVL[0] = pin_LVL.pin36;
*pinmux36 = pin_MUX.pin36;
*pincfg36 = pin_CFG.pin36;
}
if (((pin_tracker >> 25) & 1) || ((pin_tracker >> 30) & 1)){
pin37->CNF[0] = pin_CNF.pin37;
pin37->OE[0] = pin_OE.pin37;
pin37->INT_ENB[0] = pin_ENB.pin37;
pin37->INT_LVL[0] = pin_LVL.pin37;
*pinmux37 = pin_MUX.pin37;
*pincfg37 = pin_CFG.pin37;
}
if ((pin_tracker >> 26) & 1){
pin38->CNF[0] = pin_CNF.pin38;
pin38->OE[0] = pin_OE.pin38;
pin38->INT_ENB[0] = pin_ENB.pin38;
pin38->INT_LVL[0] = pin_LVL.pin38;
*pinmux38 = pin_MUX.pin38;
*pincfg38 = pin_CFG.pin38;
}
if ((pin_tracker >> 27) & 1){
pin40->CNF[0] = pin_CNF.pin40;
pin40->OE[0] = pin_OE.pin40;
pin40->INT_ENB[0] = pin_ENB.pin40;
pin40->INT_LVL[0] = pin_LVL.pin40;
*pinmux40 = pin_MUX.pin40;
*pincfg40 = pin_CFG.pin40;
}
// Ummapping CNF registers
munmap(baseCNF, pagesize);
// Ummapping PINMUX registers
munmap(basePINMUX, pagesize);
// Ummapping CFG registers
munmap(baseCFG, pagesize);
// Ummapping PWM registers
munmap(basePWM, pagesize);
// Ummapping CAR registers
munmap(baseCAR, pagesize);
// Ummapping PMC registers
munmap(basePMC, pagesize);
// close /dev/mem